sim/common/sim-n-core.h

   1 /*  This file is part of the program psim.
   2
   3     Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
   4
   5     This program is free software; you can redistribute it and/or modify
   6     it under the terms of the GNU General Public License as published by
   7     the Free Software Foundation; either version 2 of the License, or
   8     (at your option) any later version.
   9
  10     This program is distributed in the hope that it will be useful,
  11     but WITHOUT ANY WARRANTY; without even the implied warranty of
  12     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13     GNU General Public License for more details.
  14
  15     You should have received a copy of the GNU General Public License
  16     along with this program; if not, write to the Free Software
  17     Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  18
  19     */
  20
  21
  22 #ifndef N
  23 #error "N must be #defined"
  24 #endif
  25
  26 #include "sim-xcat.h"
  27
  28 /* NOTE: see end of file for #undef of these macros */
  29 #define unsigned_N XCONCAT2(unsigned_,N)
  30 #define T2H_N XCONCAT2(T2H_,N)
  31 #define H2T_N XCONCAT2(H2T_,N)
  32
  33 #define sim_core_read_aligned_N XCONCAT2(sim_core_read_aligned_,N)
  34 #define sim_core_write_aligned_N XCONCAT2(sim_core_write_aligned_,N)
  35 #define sim_core_read_unaligned_N XCONCAT2(sim_core_read_unaligned_,N)
  36 #define sim_core_write_unaligned_N XCONCAT2(sim_core_write_unaligned_,N)
  37 #define sim_core_trace_N XCONCAT2(sim_core_trace_,N)
  38
  39
  40 /* TAGS: sim_core_trace_1 sim_core_trace_2 */
  41 /* TAGS: sim_core_trace_4 sim_core_trace_8 */
  42 /* TAGS: sim_core_trace_6 sim_core_trace_word */
  43
  44 STATIC_SIM_CORE(void)
  45 sim_core_trace_N (sim_cpu *cpu,
  46                   sim_cia cia,
  47                   char *transfer,
  48                   sim_core_maps map,
  49                   address_word addr,
  50                   unsigned_N val)
  51 {
  52 #if (N == 16)
  53   trace_printf (CPU_STATE (cpu), cpu,
  54                 "sim-n-core.h:%d: %s-%d %s:0x%08lx -> 0x%08lx%08lx%08lx%08lx\n",
  55                 __LINE__,
  56                 transfer, sizeof (unsigned_N),
  57                 sim_core_map_to_str (map),
  58                 (unsigned long) addr,
  59                 (unsigned long) V4_16 (val, 0),
  60                 (unsigned long) V4_16 (val, 1),
  61                 (unsigned long) V4_16 (val, 2),
  62                 (unsigned long) V4_16 (val, 3));
  63 #endif
  64 #if (N == 8)
  65   trace_printf (CPU_STATE (cpu), cpu,
  66                 "sim-n-core.h:%d: %s-%d %s:0x%08lx -> 0x%08lx%08lx\n",
  67                 __LINE__,
  68                 transfer, sizeof (unsigned_N),
  69                 sim_core_map_to_str (map),
  70                 (unsigned long) addr,
  71                 (unsigned long) V4_8 (val, 0),
  72                 (unsigned long) V4_8 (val, 1));
  73 #endif
  74 #if (N == 4)
  75   trace_printf (CPU_STATE (cpu), cpu,
  76                 "sim-n-core.h:%d: %s-%d %s:0x%08lx -> 0x%0*lx\n",
  77                 __LINE__,
  78                 transfer, sizeof (unsigned_N),
  79                 sim_core_map_to_str (map),
  80                 (unsigned long) addr,
  81                 sizeof (unsigned_N) * 2,
  82                 (unsigned long) val);
  83 #endif
  84 }
  85
  86
  87 /* TAGS: sim_core_read_aligned_1 sim_core_read_aligned_2 */
  88 /* TAGS: sim_core_read_aligned_4 sim_core_read_aligned_8 */
  89 /* TAGS: sim_core_read_aligned_16 sim_core_read_aligned_word */
  90
  91 INLINE_SIM_CORE(unsigned_N)
  92 sim_core_read_aligned_N(sim_cpu *cpu,
  93                         sim_cia cia,
  94                         sim_core_maps map,
  95                         address_word xaddr)
  96 {
  97   sim_cpu_core *cpu_core = CPU_CORE (cpu);
  98   sim_core_common *core = &cpu_core->common;
  99   unsigned_N val;
 100   sim_core_mapping *mapping;
 101   address_word addr;
 102 #if WITH_XOR_ENDIAN != 0
 103   if (WITH_XOR_ENDIAN)
 104     addr = xaddr ^ cpu_core->xor[(sizeof(unsigned_N) - 1) % WITH_XOR_ENDIAN];
 105   else
 106 #endif
 107     addr = xaddr;
 108   mapping = sim_core_find_mapping (core, map,
 109                                    addr,
 110                                    sizeof (unsigned_N),
 111                                    read_transfer,
 112                                    1 /*abort*/, cpu, cia);
 113 #if (WITH_DEVICES)
 114   if (WITH_CALLBACK_MEMORY && mapping->device != NULL) {
 115     unsigned_N data;
 116     if (device_io_read_buffer (mapping->device,
 117                                &data,
 118                                mapping->space,
 119                                addr,
 120                                sizeof (unsigned_N)) != sizeof (unsigned_N))
 121       device_error (mapping->device, "internal error - %s - io_read_buffer should not fail",
 122                     XSTRING (sim_core_read_aligned_N));
 123     val = T2H_N (data);
 124   }
 125   else
 126 #endif
 127     val = T2H_N (*(unsigned_N*) sim_core_translate (mapping, addr));
 128   PROFILE_COUNT_CORE (cpu, addr, sizeof (unsigned_N), map);
 129   if (TRACE_P (cpu, TRACE_CORE_IDX))
 130     sim_core_trace_N (cpu, __LINE__, "read", map, addr, val);
 131   return val;
 132 }
 133
 134 /* TAGS: sim_core_read_unaligned_1 sim_core_read_unaligned_2 */
 135 /* TAGS: sim_core_read_unaligned_4 sim_core_read_unaligned_8 */
 136 /* TAGS: sim_core_read_unaligned_16 sim_core_read_unaligned_word */
 137
 138 INLINE_SIM_CORE(unsigned_N)
 139 sim_core_read_unaligned_N(sim_cpu *cpu,
 140                           sim_cia cia,
 141                           sim_core_maps map,
 142                           address_word addr)
 143 {
 144   int alignment = sizeof (unsigned_N) - 1;
 145   /* if hardwired to forced alignment just do it */
 146   if (WITH_ALIGNMENT == FORCED_ALIGNMENT)
 147     return sim_core_read_aligned_N (cpu, cia, map, addr & ~alignment);
 148   else if ((addr & alignment) == 0)
 149     return sim_core_read_aligned_N (cpu, cia, map, addr);
 150   else
 151     switch (CURRENT_ALIGNMENT)
 152       {
 153       case STRICT_ALIGNMENT:
 154         SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map,
 155                          sizeof (unsigned_N), addr,
 156                          read_transfer, sim_core_unaligned_signal);
 157       case NONSTRICT_ALIGNMENT:
 158         {
 159           unsigned_N val;
 160           if (sim_core_xor_read_buffer (CPU_STATE (cpu), cpu, map, &val, addr,
 161                                         sizeof(unsigned_N))
 162               != sizeof(unsigned_N))
 163             SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map,
 164                              sizeof (unsigned_N), addr,
 165                              read_transfer, sim_core_unaligned_signal);
 166           val = T2H_N(val);
 167           PROFILE_COUNT_CORE (cpu, addr, sizeof (unsigned_N), map);
 168           return val;
 169         }
 170       case FORCED_ALIGNMENT:
 171         return sim_core_read_aligned_N (cpu, cia, map, addr & ~alignment);
 172       case MIXED_ALIGNMENT:
 173         sim_engine_abort (CPU_STATE (cpu), cpu, cia,
 174                           "internal error - %s - mixed alignment",
 175                           XSTRING (sim_core_read_unaligned_N));
 176       default:
 177         sim_engine_abort (CPU_STATE (cpu), cpu, cia,
 178                           "internal error - %s - bad switch",
 179                           XSTRING (sim_core_read_unaligned_N));
 180       }
 181 }
 182
 183 /* TAGS: sim_core_write_aligned_1 sim_core_write_aligned_2 */
 184 /* TAGS: sim_core_write_aligned_4 sim_core_write_aligned_8 */
 185 /* TAGS: sim_core_write_aligned_16 sim_core_write_aligned_word */
 186
 187 INLINE_SIM_CORE(void)
 188 sim_core_write_aligned_N(sim_cpu *cpu,
 189                          sim_cia cia,
 190                          sim_core_maps map,
 191                          address_word xaddr,
 192                          unsigned_N val)
 193 {
 194   sim_cpu_core *cpu_core = CPU_CORE (cpu);
 195   sim_core_common *core = &cpu_core->common;
 196   sim_core_mapping *mapping;
 197   address_word addr;
 198 #if WITH_XOR_ENDIAN != 0
 199   if (WITH_XOR_ENDIAN)
 200     addr = xaddr ^ cpu_core->xor[(sizeof(unsigned_N) - 1) % WITH_XOR_ENDIAN];
 201   else
 202 #endif
 203     addr = xaddr;
 204   mapping = sim_core_find_mapping(core, map,
 205                                   addr,
 206                                   sizeof (unsigned_N),
 207                                   write_transfer,
 208                                   1 /*abort*/, cpu, cia);
 209 #if (WITH_DEVICES)
 210   if (WITH_CALLBACK_MEMORY && mapping->device != NULL) {
 211     unsigned_N data = H2T_N (val);
 212     if (device_io_write_buffer (mapping->device,
 213                                 &data,
 214                                 mapping->space,
 215                                 addr,
 216                                 sizeof (unsigned_N), /* nr_bytes */
 217                                 cpu,
 218                                 cia) != sizeof (unsigned_N))
 219       device_error (mapping->device, "internal error - %s - io_write_buffer should not fail",
 220                     XSTRING (sim_core_write_aligned_N));
 221   }
 222   else
 223 #endif
 224     *(unsigned_N*) sim_core_translate (mapping, addr) = H2T_N (val);
 225   PROFILE_COUNT_CORE (cpu, addr, sizeof (unsigned_N), map);
 226   if (TRACE_P (cpu, TRACE_CORE_IDX))
 227     sim_core_trace_N (cpu, __LINE__, "write", map, addr, val);
 228 }
 229
 230 /* TAGS: sim_core_write_unaligned_1 sim_core_write_unaligned_2 */
 231 /* TAGS: sim_core_write_unaligned_4 sim_core_write_unaligned_8 */
 232 /* TAGS: sim_core_write_unaligned_16 sim_core_write_unaligned_word */
 233
 234 INLINE_SIM_CORE(void)
 235 sim_core_write_unaligned_N(sim_cpu *cpu,
 236                            sim_cia cia,
 237                            sim_core_maps map,
 238                            address_word addr,
 239                            unsigned_N val)
 240 {
 241   int alignment = sizeof (unsigned_N) - 1;
 242   /* if hardwired to forced alignment just do it */
 243   if (WITH_ALIGNMENT == FORCED_ALIGNMENT)
 244     sim_core_write_aligned_N (cpu, cia, map, addr & ~alignment, val);
 245   else if ((addr & alignment) == 0)
 246     sim_core_write_aligned_N (cpu, cia, map, addr, val);
 247   else
 248     switch (CURRENT_ALIGNMENT)
 249       {
 250       case STRICT_ALIGNMENT:
 251         SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map,
 252                          sizeof (unsigned_N), addr,
 253                          write_transfer, sim_core_unaligned_signal);
 254         break;
 255       case NONSTRICT_ALIGNMENT:
 256         {
 257           unsigned_N val = H2T_N (val);
 258           if (sim_core_xor_write_buffer (CPU_STATE (cpu), cpu, map, &val, addr,
 259                                          sizeof(unsigned_N))
 260               != sizeof(unsigned_N))
 261             SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map,
 262                              sizeof (unsigned_N), addr,
 263                              write_transfer, sim_core_unaligned_signal);
 264           PROFILE_COUNT_CORE (cpu, addr, sizeof (unsigned_N), map);
 265           break;
 266         }
 267       case FORCED_ALIGNMENT:
 268         sim_core_write_aligned_N (cpu, cia, map, addr & ~alignment, val);
 269         break;
 270       case MIXED_ALIGNMENT:
 271         sim_engine_abort (CPU_STATE (cpu), cpu, cia,
 272                           "internal error - %s - mixed alignment",
 273                           XSTRING (sim_core_write_unaligned_N));
 274         break;
 275       default:
 276         sim_engine_abort (CPU_STATE (cpu), cpu, cia,
 277                           "internal error - %s - bad switch",
 278                           XSTRING (sim_core_write_unaligned_N));
 279         break;
 280       }
 281 }
 282
 283
 284 /* NOTE: see start of file for #define of these macros */
 285 #undef unsigned_N
 286 #undef T2H_N
 287 #undef H2T_N
 288 #undef sim_core_read_aligned_N
 289 #undef sim_core_write_aligned_N
 290 #undef sim_core_read_unaligned_N
 291 #undef sim_core_write_unaligned_N
 292 #undef sim_core_trace_N