sim: trace: add a basic cpu register class
[binutils-gdb.git] / sim / common / tconfig.h
1 /* Default target configuration file.
2 To override this, create file `tconfig.in' in the simulator's
3 source directory. */
4
5 /* Define this if the simulator uses an instruction cache.
6 See the h8/300 simulator for an example.
7 This enables the `-c size' option to set the size of the cache.
8 The target is required to provide sim_set_simcache_size. */
9 /* #define SIM_HAVE_SIMCACHE */