[aarch64] Remove handling of ADR/ADRP from prologue analyzer
[binutils-gdb.git] / sim / cris / Makefile.in
1 # Makefile template for Configure for the CRIS simulator, based on a mix
2 # of the ones for m32r and i960.
3 #
4 # Copyright (C) 2004-2022 Free Software Foundation, Inc.
5 # Contributed by Axis Communications.
6 #
7 # This program is free software; you can redistribute it and/or modify
8 # it under the terms of the GNU General Public License as published by
9 # the Free Software Foundation; either version 3 of the License, or
10 # (at your option) any later version.
11 #
12 # This program is distributed in the hope that it will be useful,
13 # but WITHOUT ANY WARRANTY; without even the implied warranty of
14 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 # GNU General Public License for more details.
16 #
17 # You should have received a copy of the GNU General Public License
18 # along with this program. If not, see <http://www.gnu.org/licenses/>.
19
20 ## COMMON_PRE_CONFIG_FRAG
21
22 CRISV10F_OBJS = crisv10f.o cpuv10.o decodev10.o modelv10.o mloopv10f.o
23 CRISV32F_OBJS = crisv32f.o cpuv32.o decodev32.o modelv32.o mloopv32f.o
24
25 SIM_OBJS = \
26 $(SIM_NEW_COMMON_OBJS) \
27 cgen-utils.o cgen-trace.o cgen-scache.o \
28 cgen-run.o \
29 sim-if.o arch.o \
30 $(CRISV10F_OBJS) \
31 $(CRISV32F_OBJS) \
32 traps.o
33
34 SIM_EXTRA_HW_DEVICES = rv cris cris_900000xx
35
36 # Extra headers included by sim-main.h.
37 # FIXME: $(srccom)/cgen-ops.h should be in CGEN_INCLUDE_DEPS.
38 SIM_EXTRA_DEPS = \
39 $(CGEN_INCLUDE_DEPS) $(srccom)/cgen-ops.h \
40 arch.h cpuall.h cris-sim.h engv10.h engv32.h
41
42 SIM_EXTRA_CLEAN = cris-clean
43
44 ## COMMON_POST_CONFIG_FRAG
45
46 arch = cris
47
48 # rvdummy is just used for testing. It does nothing if
49 # --enable-sim-hardware isn't active.
50
51 all: rvdummy$(EXEEXT)
52
53 check: rvdummy$(EXEEXT)
54
55 rvdummy$(EXEEXT): rvdummy.o $(EXTRA_LIBDEPS)
56 $(ECHO_CCLD) $(CC) $(ALL_CFLAGS) -o rvdummy$(EXEEXT) rvdummy.o $(EXTRA_LIBS)
57
58 rvdummy.o: rvdummy.c $(remote_sim_h) $(callback_h)
59
60 # CRISV10 objs
61
62 CRISV10F_INCLUDE_DEPS = \
63 $(CGEN_MAIN_CPU_DEPS) \
64 cpuv10.h decodev10.h engv10.h
65
66 # CRISV32 objs
67
68 CRISV32F_INCLUDE_DEPS = \
69 $(CGEN_MAIN_CPU_DEPS) \
70 cpuv32.h decodev32.h engv32.h
71
72 cris-clean:
73 -rm -f stamp-arch
74 -rm -f tmp-* rvdummy$(EXEEXT)
75
76 # Useful when making CGEN-generated files manually, without --enable-cgen-maint.
77 stamps: stamp-arch stamp-v10fcpu stamp-v32fcpu
78
79 stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/cris.cpu Makefile
80 $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=crisv10,crisv32 \
81 archfile=$(CPU_DIR)/cris.cpu \
82 FLAGS="with-scache with-profile=fn"
83 $(SILENCE) touch $@
84 arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
85
86 # The sed-hack is supposed to be temporary, until we get CGEN to emit it.
87 stamp-v10fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/cris.cpu Makefile
88 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
89 archfile=$(CPU_DIR)/cris.cpu \
90 cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
91 $(SILENCE) $(SHELL) $(srcroot)/move-if-change $(srcdir)/semv10-switch.c $(srcdir)/semcrisv10f-switch.c
92 $(SILENCE) touch $@
93 cpuv10.h cpuv10.c semcrisv10f-switch.c modelv10.c decodev10.c decodev10.h: $(CGEN_MAINT) stamp-v10fcpu
94
95 stamp-v32fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/cris.cpu Makefile
96 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
97 archfile=$(CPU_DIR)/cris.cpu \
98 cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
99 $(SILENCE) $(SHELL) $(srcroot)/move-if-change $(srcdir)/semv32-switch.c $(srcdir)/semcrisv32f-switch.c
100 $(SILENCE) touch $@
101 cpuv32.h cpuv32.c semcrisv32f-switch.c modelv32.c decodev32.c decodev32.h: $(CGEN_MAINT) stamp-v32fcpu