RISC-V: Fallback for instructions longer than 64b
[binutils-gdb.git] / sim / cris / mloop.in
1 # Simulator main loop for CRIS. -*- C -*-
2 # Copyright (C) 2004-2022 Free Software Foundation, Inc.
3 # Contributed by Axis Communications.
4 #
5 # This file is part of the GNU simulators.
6 #
7 # This program is free software; you can redistribute it and/or modify
8 # it under the terms of the GNU General Public License as published by
9 # the Free Software Foundation; either version 3 of the License, or
10 # (at your option) any later version.
11 #
12 # This program is distributed in the hope that it will be useful,
13 # but WITHOUT ANY WARRANTY; without even the implied warranty of
14 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 # GNU General Public License for more details.
16 #
17 # You should have received a copy of the GNU General Public License
18 # along with this program. If not, see <http://www.gnu.org/licenses/>.
19
20 # Based on the fr30 file.
21
22 # Syntax:
23 # /bin/sh mainloop.in command
24 #
25 # Command is one of:
26 #
27 # init
28 # support
29 # extract-{simple,scache,pbb}
30 # {full,fast}-exec-{simple,scache,pbb}
31 #
32 # A target need only provide a "full" version of one of simple,scache,pbb.
33 # If the target wants it can also provide a fast version of same.
34 # It can't provide more than this, however for illustration's sake the CRIS
35 # port provides examples of all.
36
37 # ??? After a few more ports are done, revisit.
38 # Will eventually need to machine generate a lot of this.
39
40 case "x$1" in
41
42 xsupport)
43
44 cat <<EOF
45 #include <stdlib.h>
46
47 /* It seems we don't have a templated header file corresponding to
48 cris-tmpl.c, so we have to get out declarations the hackish way. */
49 extern void @cpu@_specific_init (SIM_CPU *current_cpu);
50
51 static INLINE const IDESC *
52 extract (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, ARGBUF *abuf,
53 int fast_p)
54 {
55 const IDESC *id = @cpu@_decode (current_cpu, pc, insn,
56 #if CGEN_INT_INSN_P
57 insn,
58 #endif
59 abuf);
60 @cpu@_fill_argbuf (current_cpu, abuf, id, pc, fast_p);
61 if (! fast_p)
62 {
63 int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc);
64 int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc);
65 @cpu@_fill_argbuf_tp (current_cpu, abuf, trace_p, profile_p);
66 }
67 return id;
68 }
69
70 /* This might not be used directly depending on the fast compile mode. */
71 ATTRIBUTE_UNUSED static INLINE SEM_PC
72 execute (SIM_CPU *current_cpu, SCACHE *sc, int fast_p)
73 {
74 SEM_PC vpc;
75
76 if (fast_p)
77 {
78 #if ! WITH_SEM_SWITCH_FAST
79 #if WITH_SCACHE
80 vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, sc);
81 #else
82 vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, &sc->argbuf);
83 #endif
84 #else
85 abort ();
86 #endif /* WITH_SEM_SWITCH_FAST */
87 }
88 else
89 {
90 #if ! WITH_SEM_SWITCH_FULL
91 ARGBUF *abuf = &sc->argbuf;
92 const IDESC *idesc = abuf->idesc;
93 #if WITH_SCACHE_PBB
94 int virtual_p = CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_VIRTUAL);
95 #else
96 int virtual_p = 0;
97 #endif
98
99 if (! virtual_p)
100 {
101 /* FIXME: call x-before */
102 if (ARGBUF_PROFILE_P (abuf))
103 PROFILE_COUNT_INSN (current_cpu, abuf->addr, idesc->num);
104 /* FIXME: Later make cover macros: PROFILE_INSN_{INIT,FINI}. */
105 if (PROFILE_MODEL_P (current_cpu)
106 && ARGBUF_PROFILE_P (abuf))
107 @cpu@_model_insn_before (current_cpu, 1 /*first_p*/);
108 CGEN_TRACE_INSN_INIT (current_cpu, abuf, 1);
109 CGEN_TRACE_INSN (current_cpu, idesc->idata,
110 (const struct argbuf *) abuf, abuf->addr);
111 }
112 #if WITH_SCACHE
113 vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, sc);
114 #else
115 vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, abuf);
116 #endif
117 if (! virtual_p)
118 {
119 /* FIXME: call x-after */
120 if (PROFILE_MODEL_P (current_cpu)
121 && ARGBUF_PROFILE_P (abuf))
122 {
123 int cycles;
124
125 cycles = (*idesc->timing->model_fn) (current_cpu, sc);
126 @cpu@_model_insn_after (current_cpu, 1 /*last_p*/, cycles);
127 }
128 CGEN_TRACE_INSN_FINI (current_cpu, abuf, 1);
129 }
130 #else
131 abort ();
132 #endif /* WITH_SEM_SWITCH_FULL */
133 }
134
135 return vpc;
136 }
137
138 EOF
139
140 ;;
141
142 xinit)
143
144 cat <<EOF
145 /* This seemed the only sane location to emit a call to a
146 model-specific init function. It may not work for all simulator
147 types. FIXME: Introduce a model-init hook. */
148
149 /* We use the same condition as the code that's expected to follow, so
150 GCC can consolidate the code with only one conditional. */
151 if (! CPU_IDESC_SEM_INIT_P (current_cpu))
152 @cpu@_specific_init (current_cpu);
153 EOF
154
155 ;;
156
157 xextract-simple | xextract-scache)
158
159 # Inputs: current_cpu, vpc, sc, FAST_P
160 # Outputs: sc filled in
161
162 cat <<EOF
163 {
164 CGEN_INSN_INT insn = GETIMEMUHI (current_cpu, vpc);
165 extract (current_cpu, vpc, insn, SEM_ARGBUF (sc), FAST_P);
166 }
167 EOF
168
169 ;;
170
171 xextract-pbb)
172
173 # Inputs: current_cpu, pc, sc, max_insns, FAST_P
174 # Outputs: sc, pc
175 # sc must be left pointing past the last created entry.
176 # pc must be left pointing past the last created entry.
177 # If the pbb is terminated by a cti insn, SET_CTI_VPC(sc) must be called
178 # to record the vpc of the cti insn.
179 # SET_INSN_COUNT(n) must be called to record number of real insns.
180
181 cat <<EOF
182 {
183 const IDESC *idesc;
184 int icount = 0;
185
186 /* Make sure the buffer doesn't overflow for profiled insns if
187 max_insns happens to not be a multiple of 3. */
188 if (!FAST_P)
189 max_insns -= 2 + 3;
190 else
191 /* There might be two real insns handled per loop. */
192 max_insns--;
193
194 while (max_insns > 0)
195 {
196 UHI insn = GETIMEMUHI (current_cpu, pc);
197 int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc);
198 int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc);
199 int befaft_p = profile_p || trace_p;
200
201 if (befaft_p)
202 {
203 @cpu@_emit_before (current_cpu, sc, pc, 1);
204 ++sc;
205 sc->argbuf.trace_p = trace_p;
206 sc->argbuf.profile_p = profile_p;
207 --max_insns;
208 }
209
210 idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P);
211 ++sc;
212 --max_insns;
213 ++icount;
214
215 if (befaft_p)
216 {
217 @cpu@_emit_after (current_cpu, sc, pc);
218 ++sc;
219 --max_insns;
220 }
221
222 pc += idesc->length;
223
224 if (IDESC_CTI_P (idesc))
225 {
226 SET_CTI_VPC (sc - 1);
227
228 /* Delay slot? Ignore for zero-instructions (bcc .+2) since
229 those are treated as exit insns to avoid runaway sessions
230 for invalid programs. */
231 if (insn != 0 && CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_DELAY_SLOT))
232 {
233 UHI insn;
234 trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc);
235 profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc);
236 befaft_p = profile_p || trace_p;
237
238 if (befaft_p)
239 {
240 @cpu@_emit_before (current_cpu, sc, pc, 1);
241 ++sc;
242 sc->argbuf.trace_p = trace_p;
243 sc->argbuf.profile_p = profile_p;
244 --max_insns;
245 }
246
247 insn = GETIMEMUHI (current_cpu, pc);
248 idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P);
249 ++sc;
250 --max_insns;
251 ++icount;
252
253 if (befaft_p)
254 {
255 @cpu@_emit_after (current_cpu, sc, pc);
256 ++sc;
257 --max_insns;
258 }
259 pc += idesc->length;
260 }
261 break;
262 }
263 }
264
265 Finish:
266 SET_INSN_COUNT (icount);
267 }
268 EOF
269
270 ;;
271
272 xfull-exec-* | xfast-exec-*)
273
274 # Inputs: current_cpu, sc, FAST_P
275 # Outputs: vpc
276 # vpc contains the address of the next insn to execute
277
278 cat <<EOF
279 {
280 #if (! FAST_P && WITH_SEM_SWITCH_FULL) || (FAST_P && WITH_SEM_SWITCH_FAST)
281 #define DEFINE_SWITCH
282 #include "sem@cpu@-switch.c"
283 #else
284 vpc = execute (current_cpu, vpc, FAST_P);
285 #endif
286 }
287 EOF
288
289 ;;
290
291 *)
292 echo "Invalid argument to mainloop.in: $1" >&2
293 exit 1
294 ;;
295
296 esac