1 /* Main header for the CRIS simulator, based on the m32r header.
2 Copyright (C) 2004-2022 Free Software Foundation, Inc.
3 Contributed by Axis Communications.
5 This file is part of the GNU simulators.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20 /* All FIXME:s present in m32r apply here too; I just refuse to blindly
21 carry them over, as I don't know if they're really things that need
27 /* This is a global setting. Different cpu families can't mix-n-match -scache
28 and -pbb. However some cpu families may use -simple while others use
29 one of -scache/-pbb. */
30 #define WITH_SCACHE_PBB 1
33 #include "sim-basics.h"
34 #include "cgen-types.h"
35 #include "cris-desc.h"
42 struct cris_sim_mmapped_page
{
44 struct cris_sim_mmapped_page
*prev
;
47 struct cris_thread_info
{
48 /* Identifier for this thread. */
49 unsigned int threadid
;
51 /* Identifier for parent thread. */
52 unsigned int parent_threadid
;
54 /* Signal to send to parent at exit. */
60 /* Only as storage to return the "set" value to the "get" method.
61 I'm not sure whether this is useful per-thread. */
72 char blocked_suspendsave
;
73 /* The handler stub unblocks the signal, so we don't need a separate
74 "temporary save" for that. */
77 /* Register context, swapped with _sim_cpu.cpu_data. */
80 /* Similar, temporary copy for the state at a signal call. */
81 void *cpu_context_atsignal
;
83 /* The number of the reading and writing ends of a pipe if waiting for
84 the reader, else 0. */
88 /* System time at last context switch when this thread ran. */
91 /* Nonzero if we just executed a syscall. */
94 /* Nonzero if any of sigaction[0..64].pending is true. */
97 /* Nonzero if in (rt_)sigsuspend call. Cleared at every sighandler
102 typedef int (*cris_interrupt_delivery_fn
) (SIM_CPU
*,
103 enum cris_interrupt_type
,
107 /* sim/common cpu base. */
110 /* Static parts of cgen. */
113 CRIS_MISC_PROFILE cris_misc_profile
;
114 #define CPU_CRIS_MISC_PROFILE(cpu) (& (cpu)->cris_misc_profile)
116 /* Copy of previous data; only valid when emitting trace-data after
118 CRIS_MISC_PROFILE cris_prev_misc_profile
;
119 #define CPU_CRIS_PREV_MISC_PROFILE(cpu) (& (cpu)->cris_prev_misc_profile)
122 cris_interrupt_delivery_fn deliver_interrupt
;
123 #define CPU_CRIS_DELIVER_INTERRUPT(cpu) (cpu->deliver_interrupt)
126 /* Simulator environment data. */
130 struct cris_sim_mmapped_page
*highest_mmapped_page
;
132 /* Number of syscalls performed or in progress, counting once extra
133 for every time a blocked thread (internally, when threading) polls
134 the (pipe) blockage. By default, this is also a time counter: to
135 minimize performance noise from minor compiler changes,
136 instructions take no time and syscalls always take 1ms. */
139 /* Number of execution contexts minus one. */
142 /* Current thread number; index into thread_data when m1threads != 0. */
145 /* When a new thread is created, it gets a unique number, which we
149 /* Thread-specific info, for simulator thread support, created at
150 "clone" call. Vector of [threads+1] when m1threads > 0. */
151 struct cris_thread_info
*thread_data
;
153 /* "If CLONE_SIGHAND is set, the calling process and the child pro-
154 cesses share the same table of signal handlers." ... "However, the
155 calling process and child processes still have distinct signal
156 masks and sets of pending signals." See struct cris_thread_info
157 for sigmasks and sigpendings. */
160 /* This is a hack to implement just the parts of fcntl F_GETFL that
161 are used in open+fdopen calls for the standard scenario: for such
162 a call we check that the last syscall was open, we check that the
163 passed fd is the same returned then, and so we return the same
164 flags passed to open. This way, we avoid complicating the
165 generic sim callback machinery by introducing fcntl
171 /* Function for initializing CPU thread context, which varies in size
172 with each CPU model. They should be in some constant parts or
173 initialized in *_init_cpu, but we can't modify that for now. */
174 void* (*make_thread_cpu_data
) (SIM_CPU
*, void *);
175 size_t thread_cpu_data_size
;
177 /* The register differs, so we dispatch to a CPU-specific function. */
178 void (*set_target_thread_data
) (SIM_CPU
*, USI
);
180 /* CPU-model specific parts go here.
181 Note that in files that don't need to access these pieces WANT_CPU_FOO
182 won't be defined and thus these parts won't appear. This is ok in the
183 sense that things work. It is a source of bugs though.
184 One has to of course be careful to not take the size of this
185 struct and no structure members accessed in non-cpu specific files can
187 #if defined (WANT_CPU_CRISV0F)
188 CRISV0F_CPU_DATA cpu_data
;
189 #elif defined (WANT_CPU_CRISV3F)
190 CRISV3F_CPU_DATA cpu_data
;
191 #elif defined (WANT_CPU_CRISV8F)
192 CRISV8F_CPU_DATA cpu_data
;
193 #elif defined (WANT_CPU_CRISV10F)
194 CRISV10F_CPU_DATA cpu_data
;
195 #elif defined (WANT_CPU_CRISV32F)
196 CRISV32F_CPU_DATA cpu_data
;
198 /* Let's assume all cpu_data have the same alignment requirements, so
199 they all are laid out at the same address. Since we can't get the
200 exact definition, we also assume that it has no higher alignment
201 requirements than a vector of, say, 16 pointers. (A single member
202 is often special-cased, and possibly two as well so we don't want
204 union { void *dummy
[16]; } cpu_data_placeholder
;
210 /* Catch address exceptions. */
211 extern SIM_CORE_SIGNAL_FN cris_core_signal
;
212 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
213 cris_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
216 /* Default memory size. */
217 #define CRIS_DEFAULT_MEM_SIZE 0x800000 /* 8M */
219 #endif /* SIM_MAIN_H */