sim/cris/sim-main.h

   1 /* Main header for the CRIS simulator, based on the m32r header.
   2    Copyright (C) 2004-2015 Free Software Foundation, Inc.
   3    Contributed by Axis Communications.
   4
   5 This file is part of the GNU simulators.
   6
   7 This program is free software; you can redistribute it and/or modify
   8 it under the terms of the GNU General Public License as published by
   9 the Free Software Foundation; either version 3 of the License, or
  10 (at your option) any later version.
  11
  12 This program is distributed in the hope that it will be useful,
  13 but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 GNU General Public License for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  19
  20 /* All FIXME:s present in m32r apply here too; I just refuse to blindly
  21    carry them over, as I don't know if they're really things that need
  22    fixing.  */
  23
  24 #ifndef SIM_MAIN_H
  25 #define SIM_MAIN_H
  26
  27 #define USING_SIM_BASE_H
  28
  29 struct _sim_cpu;
  30 typedef struct _sim_cpu SIM_CPU;
  31
  32 #include "symcat.h"
  33 #include "sim-basics.h"
  34 #include "cgen-types.h"
  35 #include "cris-desc.h"
  36 #include "cris-opc.h"
  37 #include "arch.h"
  38
  39 /* These must be defined before sim-base.h.  */
  40 typedef USI sim_cia;
  41
  42 #define SIM_ENGINE_HALT_HOOK(sd, cpu, cia) \
  43 do { \
  44   if (cpu) /* Null if ctrl-c.  */ \
  45     sim_pc_set ((cpu), (cia)); \
  46 } while (0)
  47 #define SIM_ENGINE_RESTART_HOOK(sd, cpu, cia) \
  48 do { \
  49   sim_pc_set ((cpu), (cia)); \
  50 } while (0)
  51
  52 #include "sim-base.h"
  53 #include "cgen-sim.h"
  54 #include "cris-sim.h"
  55 \f
  56 struct cris_sim_mmapped_page {
  57   USI addr;
  58   struct cris_sim_mmapped_page *prev;
  59 };
  60
  61 struct cris_thread_info {
  62   /* Identifier for this thread.  */
  63   unsigned int threadid;
  64
  65   /* Identifier for parent thread.  */
  66   unsigned int parent_threadid;
  67
  68   /* Signal to send to parent at exit.  */
  69   int exitsig;
  70
  71   /* Exit status.  */
  72   int exitval;
  73
  74   /* Only as storage to return the "set" value to the "get" method.
  75      I'm not sure whether this is useful per-thread.  */
  76   USI priority;
  77
  78   struct
  79   {
  80     USI altstack;
  81     USI options;
  82
  83     char action;
  84     char pending;
  85     char blocked;
  86     char blocked_suspendsave;
  87     /* The handler stub unblocks the signal, so we don't need a separate
  88        "temporary save" for that.  */
  89   } sigdata[64];
  90
  91   /* Register context, swapped with _sim_cpu.cpu_data.  */
  92   void *cpu_context;
  93
  94   /* Similar, temporary copy for the state at a signal call.   */
  95   void *cpu_context_atsignal;
  96
  97   /* The number of the reading and writing ends of a pipe if waiting for
  98      the reader, else 0.  */
  99   int pipe_read_fd;
 100   int pipe_write_fd;
 101
 102   /* System time at last context switch when this thread ran.  */
 103   USI last_execution;
 104
 105   /* Nonzero if we just executed a syscall.  */
 106   char at_syscall;
 107
 108   /* Nonzero if any of sigaction[0..64].pending is true.  */
 109   char sigpending;
 110
 111   /* Nonzero if in (rt_)sigsuspend call.  Cleared at every sighandler
 112      call.  */
 113   char sigsuspended;
 114 };
 115
 116 typedef int (*cris_interrupt_delivery_fn) (SIM_CPU *,
 117                                            enum cris_interrupt_type,
 118                                            unsigned int);
 119
 120 struct _sim_cpu {
 121   /* sim/common cpu base.  */
 122   sim_cpu_base base;
 123
 124   /* Static parts of cgen.  */
 125   CGEN_CPU cgen_cpu;
 126
 127   CRIS_MISC_PROFILE cris_misc_profile;
 128 #define CPU_CRIS_MISC_PROFILE(cpu) (& (cpu)->cris_misc_profile)
 129
 130   /* Copy of previous data; only valid when emitting trace-data after
 131      each insn.  */
 132   CRIS_MISC_PROFILE cris_prev_misc_profile;
 133 #define CPU_CRIS_PREV_MISC_PROFILE(cpu) (& (cpu)->cris_prev_misc_profile)
 134
 135 #if WITH_HW
 136   cris_interrupt_delivery_fn deliver_interrupt;
 137 #define CPU_CRIS_DELIVER_INTERRUPT(cpu) (cpu->deliver_interrupt)
 138 #endif
 139
 140   /* Simulator environment data.  */
 141   USI endmem;
 142   USI endbrk;
 143   USI stack_low;
 144   struct cris_sim_mmapped_page *highest_mmapped_page;
 145
 146   /* Number of syscalls performed or in progress, counting once extra
 147      for every time a blocked thread (internally, when threading) polls
 148      the (pipe) blockage.  By default, this is also a time counter: to
 149      minimize performance noise from minor compiler changes,
 150      instructions take no time and syscalls always take 1ms.  */
 151   USI syscalls;
 152
 153   /* Number of execution contexts minus one.  */
 154   int m1threads;
 155
 156   /* Current thread number; index into thread_data when m1threads != 0.  */
 157   int threadno;
 158
 159   /* When a new thread is created, it gets a unique number, which we
 160      count here.  */
 161   int max_threadid;
 162
 163   /* Thread-specific info, for simulator thread support, created at
 164      "clone" call.  Vector of [threads+1] when m1threads > 0.  */
 165   struct cris_thread_info *thread_data;
 166
 167   /* "If CLONE_SIGHAND is set, the calling process and the child pro-
 168      cesses share the same table of signal handlers." ... "However, the
 169      calling process and child processes still have distinct signal
 170      masks and sets of pending signals."  See struct cris_thread_info
 171      for sigmasks and sigpendings. */
 172   USI sighandler[64];
 173
 174   /* This is a hack to implement just the parts of fcntl F_GETFL that
 175      are used in open+fdopen calls for the standard scenario: for such
 176      a call we check that the last syscall was open, we check that the
 177      passed fd is the same returned then, and so we return the same
 178      flags passed to open.  This way, we avoid complicating the
 179      generic sim callback machinery by introducing fcntl
 180      mechanisms.  */
 181   USI last_syscall;
 182   USI last_open_fd;
 183   USI last_open_flags;
 184
 185   /* Function for initializing CPU thread context, which varies in size
 186      with each CPU model.  They should be in some constant parts or
 187      initialized in *_init_cpu, but we can't modify that for now.  */
 188   void* (*make_thread_cpu_data) (SIM_CPU *, void *);
 189   size_t thread_cpu_data_size;
 190
 191   /* The register differs, so we dispatch to a CPU-specific function.  */
 192   void (*set_target_thread_data) (SIM_CPU *, USI);
 193
 194   /* CPU-model specific parts go here.
 195      Note that in files that don't need to access these pieces WANT_CPU_FOO
 196      won't be defined and thus these parts won't appear.  This is ok in the
 197      sense that things work.  It is a source of bugs though.
 198      One has to of course be careful to not take the size of this
 199      struct and no structure members accessed in non-cpu specific files can
 200      go after here.  */
 201 #if defined (WANT_CPU_CRISV0F)
 202   CRISV0F_CPU_DATA cpu_data;
 203 #elif defined (WANT_CPU_CRISV3F)
 204   CRISV3F_CPU_DATA cpu_data;
 205 #elif defined (WANT_CPU_CRISV8F)
 206   CRISV8F_CPU_DATA cpu_data;
 207 #elif defined (WANT_CPU_CRISV10F)
 208   CRISV10F_CPU_DATA cpu_data;
 209 #elif defined (WANT_CPU_CRISV32F)
 210   CRISV32F_CPU_DATA cpu_data;
 211 #else
 212   /* Let's assume all cpu_data have the same alignment requirements, so
 213      they all are laid out at the same address.  Since we can't get the
 214      exact definition, we also assume that it has no higher alignment
 215      requirements than a vector of, say, 16 pointers.  (A single member
 216      is often special-cased, and possibly two as well so we don't want
 217      that).  */
 218   union { void *dummy[16]; } cpu_data_placeholder;
 219 #endif
 220 };
 221 \f
 222 /* The sim_state struct.  */
 223
 224 struct sim_state {
 225   sim_cpu *cpu[MAX_NR_PROCESSORS];
 226
 227   CGEN_STATE cgen_state;
 228
 229   sim_state_base base;
 230 };
 231 \f
 232 /* Misc.  */
 233
 234 /* Catch address exceptions.  */
 235 extern SIM_CORE_SIGNAL_FN cris_core_signal;
 236 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
 237 cris_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
 238                   (TRANSFER), (ERROR))
 239
 240 /* Default memory size.  */
 241 #define CRIS_DEFAULT_MEM_SIZE 0x800000 /* 8M */
 242
 243 extern device cris_devices;
 244
 245 #endif /* SIM_MAIN_H */