sim/d10v/d10v_sim.h

   1 #include <stdio.h>
   2 #include <ctype.h>
   3 #include "ansidecl.h"
   4 #include "opcode/d10v.h"
   5
   6 /* FIXME: host defines */
   7 typedef unsigned char uint8;
   8 typedef unsigned short uint16;
   9 typedef unsigned int uint32;
  10 typedef signed char int8;
  11 typedef signed short int16;
  12 typedef signed int int32;
  13 typedef signed long long int64;
  14
  15 /* FIXME: D10V defines */
  16 typedef uint16 reg_t;
  17
  18 struct simops
  19 {
  20   long opcode;
  21   long mask;
  22   int format;
  23   int cycles;
  24   int unit;
  25   int exec_type;
  26   void (*func)();
  27   int numops;
  28   int operands[9];
  29 };
  30
  31 struct _state
  32 {
  33   reg_t regs[16];               /* general-purpose registers */
  34   reg_t cregs[16];      /* control registers */
  35   int64 a[2];   /* accumulators */
  36   uint8 SM;
  37   uint8 EA;
  38   uint8 DB;
  39   uint8 IE;
  40   uint8 RP;
  41   uint8 MD;
  42   uint8 FX;
  43   uint8 ST;
  44   uint8 F0;
  45   uint8 F1;
  46   uint8 C;
  47   uint8 exe;
  48   uint8 *imem;
  49   uint8 *dmem;
  50   int   exception;
  51 } State;
  52
  53 extern uint16 OP[4];
  54 extern struct simops Simops[];
  55
  56 #define PC      (State.cregs[2])
  57 #define PSW     (State.cregs[0])
  58 #define BPSW    (State.cregs[1])
  59 #define BPC     (State.cregs[3])
  60 #define RPT_C   (State.cregs[7])
  61 #define RPT_S   (State.cregs[8])
  62 #define RPT_E   (State.cregs[9])
  63 #define MOD_S   (State.cregs[10])
  64 #define MOD_E   (State.cregs[11])
  65 #define IBA     (State.cregs[14])
  66
  67 #define SEXT3(x)        ((((x)&0x7)^(~3))+4)
  68
  69 /* sign-extend a 4-bit number */
  70 #define SEXT4(x)        ((((x)&0xf)^(~7))+8)
  71
  72 /* sign-extend an 8-bit number */
  73 #define SEXT8(x)        ((((x)&0xff)^(~0x7f))+0x80)
  74
  75 /* sign-extend a 16-bit number */
  76 #define SEXT16(x)       ((((x)&0xffff)^(~0x7fff))+0x8000)
  77
  78 /* sign-extend a 32-bit number */
  79 #define SEXT32(x)       ((((x)&0xffffffffLL)^(~0x7fffffffLL))+0x80000000LL)
  80
  81 /* sign extend a 40 bit number */
  82 #define SEXT40(x)       ((((x)&0xffffffffffLL)^(~0x7fffffffffLL))+0x8000000000LL)
  83
  84 #define MAX32   0x7fffffffLL
  85 #define MIN32   0xff80000000LL
  86 #define MASK32  0xffffffffLL
  87 #define MASK40  0xffffffffffLL
  88
  89 #define INC_ADDR(x,i)   x = ((State.MD && x == MOD_E) ? MOD_S : (x)+(i))
  90
  91 #define RB(x)   (*((uint8 *)((x)+State.imem)))
  92 #define SB(addr,data)   ( RB(addr) = (data & 0xff))
  93
  94 #ifdef WORDS_BIGENDIAN
  95
  96 #define RW(x)   (*((uint16 *)((x)+State.imem)))
  97 #define RLW(x)  (*((uint32 *)((x)+State.imem)))
  98 #define SW(addr,data)   RW(addr)=data
  99
 100 #else
 101
 102 uint32 get_longword_swap PARAMS ((uint16 x));
 103 uint16 get_word_swap PARAMS ((uint16 x));
 104 void write_word_swap PARAMS ((uint16 addr, uint16 data));
 105 #define SW(addr,data)   write_word_swap(addr,data)
 106 #define RW(x)   get_word_swap(x)
 107 #define RLW(x)  get_longword_swap(x)
 108
 109 #endif /* not WORDS_BIGENDIAN */