PowerPC64 .branch_lt address
[binutils-gdb.git] / sim / erc32 / interf.c
1 /* This file is part of SIS (SPARC instruction simulator)
2
3 Copyright (C) 1995-2022 Free Software Foundation, Inc.
4 Contributed by Jiri Gaisler, European Space Agency
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
18
19 /* This must come before any other includes. */
20 #include "defs.h"
21
22 #include <signal.h>
23 #include <string.h>
24 #include <stdio.h>
25 #include <stdlib.h>
26 #include <sys/fcntl.h>
27 #include "sis.h"
28 #include "libiberty.h"
29 #include "bfd.h"
30 #include <dis-asm.h>
31 #include "sim-config.h"
32
33 #include "sim/sim.h"
34 #include "gdb/signals.h"
35
36 #define PSR_CWP 0x7
37
38 extern struct disassemble_info dinfo;
39 extern struct pstate sregs;
40 extern struct estate ebase;
41
42 extern int ctrl_c;
43 extern int nfp;
44 extern int ift;
45 extern int rom8;
46 extern int wrp;
47 extern int uben;
48 extern int sis_verbose;
49 extern char *sis_version;
50 extern struct estate ebase;
51 extern struct evcell evbuf[];
52 extern struct irqcell irqarr[];
53 extern int irqpend, ext_irl;
54 extern int sparclite;
55 extern int dumbio;
56 extern int sparclite_board;
57 extern int termsave;
58 extern char uart_dev1[], uart_dev2[];
59
60 int sis_gdb_break = 1;
61
62 host_callback *sim_callback;
63
64 int
65 run_sim(struct pstate *sregs, uint64_t icount, int dis)
66 {
67 int mexc, irq;
68
69 if (sis_verbose)
70 (*sim_callback->printf_filtered) (sim_callback, "resuming at %x\n",
71 sregs->pc);
72 init_stdio();
73 sregs->starttime = get_time();
74 irq = 0;
75 if ((sregs->pc != 0) && (ebase.simtime == 0))
76 boot_init();
77 while (!sregs->err_mode & (icount > 0)) {
78
79 sregs->fhold = 0;
80 sregs->hold = 0;
81 sregs->icnt = 1;
82
83 if (sregs->psr & 0x080)
84 sregs->asi = 8;
85 else
86 sregs->asi = 9;
87
88 #if 0 /* DELETE ME! for debugging purposes only */
89 if (sis_verbose > 1)
90 if (sregs->pc == 0 || sregs->npc == 0)
91 printf ("bogus pc or npc\n");
92 #endif
93 mexc = memory_iread (sregs->pc, &sregs->inst, &sregs->hold);
94 #if 0 /* DELETE ME! for debugging purposes only */
95 if (sis_verbose > 2)
96 printf("pc %x, np %x, sp %x, fp %x, wm %x, cw %x, i %08x\n",
97 sregs->pc, sregs->npc,
98 sregs->r[(((sregs->psr & 7) << 4) + 14) & 0x7f],
99 sregs->r[(((sregs->psr & 7) << 4) + 30) & 0x7f],
100 sregs->wim,
101 sregs->psr & 7,
102 sregs->inst);
103 #endif
104 if (sregs->annul) {
105 sregs->annul = 0;
106 sregs->icnt = 1;
107 sregs->pc = sregs->npc;
108 sregs->npc = sregs->npc + 4;
109 } else {
110 if (ext_irl) irq = check_interrupts(sregs);
111 if (!irq) {
112 if (mexc) {
113 sregs->trap = I_ACC_EXC;
114 } else {
115 if ((sis_gdb_break) && (sregs->inst == 0x91d02001)) {
116 if (sis_verbose)
117 (*sim_callback->printf_filtered) (sim_callback,
118 "SW BP hit at %x\n", sregs->pc);
119 sim_halt();
120 restore_stdio();
121 clearerr(stdin);
122 return BPT_HIT;
123 } else
124 dispatch_instruction(sregs);
125 }
126 icount--;
127 }
128 if (sregs->trap) {
129 irq = 0;
130 sregs->err_mode = execute_trap(sregs);
131 }
132 }
133 advance_time(sregs);
134 if (ctrl_c) {
135 icount = 0;
136 }
137 }
138 sim_halt();
139 sregs->tottime += get_time() - sregs->starttime;
140 restore_stdio();
141 clearerr(stdin);
142 if (sregs->err_mode)
143 error_mode(sregs->pc);
144 if (sregs->err_mode)
145 return ERROR;
146 if (sregs->bphit) {
147 if (sis_verbose)
148 (*sim_callback->printf_filtered) (sim_callback,
149 "HW BP hit at %x\n", sregs->pc);
150 return BPT_HIT;
151 }
152 if (ctrl_c) {
153 ctrl_c = 0;
154 return CTRL_C;
155 }
156 return TIME_OUT;
157 }
158
159 SIM_DESC
160 sim_open (SIM_OPEN_KIND kind, struct host_callback_struct *callback,
161 struct bfd *abfd, char * const *argv)
162 {
163
164 int argc = 0;
165 int stat = 1;
166 int freq = 0;
167
168 sim_callback = callback;
169
170 argc = countargv (argv);
171 while (stat < argc) {
172 if (argv[stat][0] == '-') {
173 if (strcmp(argv[stat], "-v") == 0) {
174 sis_verbose++;
175 } else
176 if (strcmp(argv[stat], "-nfp") == 0) {
177 nfp = 1;
178 } else
179 if (strcmp(argv[stat], "-ift") == 0) {
180 ift = 1;
181 } else
182 if (strcmp(argv[stat], "-sparclite") == 0) {
183 sparclite = 1;
184 } else
185 if (strcmp(argv[stat], "-sparclite-board") == 0) {
186 sparclite_board = 1;
187 } else
188 if (strcmp(argv[stat], "-dumbio") == 0) {
189 dumbio = 1;
190 } else
191 if (strcmp(argv[stat], "-wrp") == 0) {
192 wrp = 1;
193 } else
194 if (strcmp(argv[stat], "-rom8") == 0) {
195 rom8 = 1;
196 } else
197 if (strcmp(argv[stat], "-uben") == 0) {
198 uben = 1;
199 } else
200 if (strcmp(argv[stat], "-uart1") == 0) {
201 if ((stat + 1) < argc)
202 strcpy(uart_dev1, argv[++stat]);
203 } else
204 if (strcmp(argv[stat], "-uart2") == 0) {
205 if ((stat + 1) < argc)
206 strcpy(uart_dev2, argv[++stat]);
207 } else
208 if (strcmp(argv[stat], "-nogdb") == 0) {
209 sis_gdb_break = 0;
210 } else
211 if (strcmp(argv[stat], "-freq") == 0) {
212 if ((stat + 1) < argc) {
213 freq = strtol(argv[++stat], (char **)NULL, 0);
214 }
215 } else
216 if (strncmp(argv[stat], "--sysroot=", sizeof("--sysroot=") - 1) == 0) {
217 /* Ignore until we start to support this. */
218 } else {
219 (*sim_callback->printf_filtered) (sim_callback,
220 "unknown option %s\n",
221 argv[stat]);
222 }
223 } else
224 bfd_load(argv[stat]);
225 stat++;
226 }
227
228 if (sis_verbose) {
229 (*sim_callback->printf_filtered) (sim_callback, "\n SIS - SPARC instruction simulator %s\n", sis_version);
230 (*sim_callback->printf_filtered) (sim_callback, " Bug-reports to Jiri Gaisler ESA/ESTEC (jgais@wd.estec.esa.nl)\n");
231 if (nfp)
232 (*sim_callback->printf_filtered) (sim_callback, "no FPU\n");
233 if (sparclite)
234 (*sim_callback->printf_filtered) (sim_callback, "simulating Sparclite\n");
235 if (dumbio)
236 (*sim_callback->printf_filtered) (sim_callback, "dumb IO (no input, dumb output)\n");
237 if (sis_gdb_break == 0)
238 (*sim_callback->printf_filtered) (sim_callback, "disabling GDB trap handling for breakpoints\n");
239 if (freq)
240 (*sim_callback->printf_filtered) (sim_callback, " ERC32 freq %d Mhz\n", freq);
241 }
242
243 sregs.freq = freq ? freq : 15;
244 #ifdef F_GETFL
245 termsave = fcntl(0, F_GETFL, 0);
246 #endif
247 INIT_DISASSEMBLE_INFO(dinfo, stdout,(fprintf_ftype)fprintf,
248 fprintf_styled);
249 #ifdef HOST_LITTLE_ENDIAN
250 dinfo.endian = BFD_ENDIAN_LITTLE;
251 #else
252 dinfo.endian = BFD_ENDIAN_BIG;
253 #endif
254 reset_all();
255 ebase.simtime = 0;
256 init_sim();
257 init_bpt(&sregs);
258 reset_stat(&sregs);
259
260 /* Fudge our descriptor for now. */
261 return (SIM_DESC) 1;
262 }
263
264 void
265 sim_close(SIM_DESC sd, int quitting)
266 {
267
268 exit_sim();
269 #ifdef F_SETFL
270 fcntl(0, F_SETFL, termsave);
271 #endif
272 }
273
274 SIM_RC
275 sim_load(SIM_DESC sd, const char *prog, bfd *abfd, int from_tty)
276 {
277 bfd_load (prog);
278 return SIM_RC_OK;
279 }
280
281 SIM_RC
282 sim_create_inferior(SIM_DESC sd, bfd *abfd, char * const *argv,
283 char * const *env)
284 {
285 bfd_vma start_address = 0;
286 if (abfd != NULL)
287 start_address = bfd_get_start_address (abfd);
288
289 ebase.simtime = 0;
290 reset_all();
291 reset_stat(&sregs);
292 sregs.pc = start_address & ~3;
293 sregs.npc = sregs.pc + 4;
294 return SIM_RC_OK;
295 }
296
297 int
298 sim_store_register(SIM_DESC sd, int regno, unsigned char *value, int length)
299 {
300 int regval;
301
302 regval = (value[0] << 24) | (value[1] << 16)
303 | (value[2] << 8) | value[3];
304 set_regi(&sregs, regno, regval);
305 return length;
306 }
307
308
309 int
310 sim_fetch_register(SIM_DESC sd, int regno, unsigned char *buf, int length)
311 {
312 get_regi(&sregs, regno, buf);
313 return -1;
314 }
315
316 int
317 sim_write (SIM_DESC sd, SIM_ADDR mem, const unsigned char *buf, int length)
318 {
319 int i, len;
320
321 for (i = 0; i < length; i++) {
322 sis_memory_write ((mem + i) ^ EBT, &buf[i], 1);
323 }
324 return length;
325 }
326
327 int
328 sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length)
329 {
330 int i, len;
331
332 for (i = 0; i < length; i++) {
333 sis_memory_read ((mem + i) ^ EBT, &buf[i], 1);
334 }
335 return length;
336 }
337
338 void
339 sim_info(SIM_DESC sd, int verbose)
340 {
341 show_stat(&sregs);
342 }
343
344 int simstat = OK;
345
346 void
347 sim_stop_reason(SIM_DESC sd, enum sim_stop *reason, int *sigrc)
348 {
349
350 switch (simstat) {
351 case CTRL_C:
352 *reason = sim_stopped;
353 *sigrc = GDB_SIGNAL_INT;
354 break;
355 case OK:
356 case TIME_OUT:
357 case BPT_HIT:
358 *reason = sim_stopped;
359 *sigrc = GDB_SIGNAL_TRAP;
360 break;
361 case ERROR:
362 *sigrc = 0;
363 *reason = sim_exited;
364 }
365 ctrl_c = 0;
366 simstat = OK;
367 }
368
369 /* Flush all register windows out to the stack. Starting after the invalid
370 window, flush all windows up to, and including the current window. This
371 allows GDB to do backtraces and look at local variables for frames that
372 are still in the register windows. Note that strictly speaking, this
373 behavior is *wrong* for several reasons. First, it doesn't use the window
374 overflow handlers. It therefore assumes standard frame layouts and window
375 handling policies. Second, it changes system state behind the back of the
376 target program. I expect this to mainly pose problems when debugging trap
377 handlers.
378 */
379
380 static void
381 flush_windows (void)
382 {
383 int invwin;
384 int cwp;
385 int win;
386 int ws;
387
388 /* Keep current window handy */
389
390 cwp = sregs.psr & PSR_CWP;
391
392 /* Calculate the invalid window from the wim. */
393
394 for (invwin = 0; invwin <= PSR_CWP; invwin++)
395 if ((sregs.wim >> invwin) & 1)
396 break;
397
398 /* Start saving with the window after the invalid window. */
399
400 invwin = (invwin - 1) & PSR_CWP;
401
402 for (win = invwin; ; win = (win - 1) & PSR_CWP)
403 {
404 uint32_t sp;
405 int i;
406
407 sp = sregs.r[(win * 16 + 14) & 0x7f];
408 #if 1
409 if (sis_verbose > 2) {
410 uint32_t fp = sregs.r[(win * 16 + 30) & 0x7f];
411 printf("flush_window: win %d, sp %x, fp %x\n", win, sp, fp);
412 }
413 #endif
414
415 for (i = 0; i < 16; i++)
416 memory_write (11, sp + 4 * i, &sregs.r[(win * 16 + 16 + i) & 0x7f], 2,
417 &ws);
418
419 if (win == cwp)
420 break;
421 }
422 }
423
424 void
425 sim_resume(SIM_DESC sd, int step, int siggnal)
426 {
427 simstat = run_sim(&sregs, UINT64_MAX, 0);
428
429 if (sis_gdb_break) flush_windows ();
430 }
431
432 void
433 sim_do_command(SIM_DESC sd, const char *cmd)
434 {
435 exec_cmd(&sregs, cmd);
436 }
437
438 char **
439 sim_complete_command (SIM_DESC sd, const char *text, const char *word)
440 {
441 return NULL;
442 }
443
444 char *
445 sim_memory_map (SIM_DESC sd)
446 {
447 return NULL;
448 }
449
450 #if 0 /* FIXME: These shouldn't exist. */
451
452 int
453 sim_insert_breakpoint(int addr)
454 {
455 if (sregs.bptnum < BPT_MAX) {
456 sregs.bpts[sregs.bptnum] = addr & ~0x3;
457 sregs.bptnum++;
458 if (sis_verbose)
459 (*sim_callback->printf_filtered) (sim_callback, "inserted HW BP at %x\n", addr);
460 return 0;
461 } else
462 return 1;
463 }
464
465 int
466 sim_remove_breakpoint(int addr)
467 {
468 int i = 0;
469
470 while ((i < sregs.bptnum) && (sregs.bpts[i] != addr))
471 i++;
472 if (addr == sregs.bpts[i]) {
473 for (; i < sregs.bptnum - 1; i++)
474 sregs.bpts[i] = sregs.bpts[i + 1];
475 sregs.bptnum -= 1;
476 if (sis_verbose)
477 (*sim_callback->printf_filtered) (sim_callback, "removed HW BP at %x\n", addr);
478 return 0;
479 }
480 return 1;
481 }
482
483 #endif