2 * This file is part of SIS.
4 * SIS, SPARC instruction simulator V1.6 Copyright (C) 1995 Jiri Gaisler,
5 * European Space Agency
7 * This program is free software; you can redistribute it and/or modify it under
8 * the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 675
19 * Mass Ave, Cambridge, MA 02139, USA.
34 #define VAL(x) strtol(x,(char *)NULL,0)
36 extern char **buildargv(char *input
);
38 extern struct disassemble_info dinfo
;
39 extern struct pstate sregs
;
40 extern struct estate ebase
;
44 extern int sis_verbose
;
45 extern char *sis_version
;
46 extern struct estate ebase
;
47 extern struct evcell evbuf
[];
48 extern struct irqcell irqarr
[];
49 extern int irqpend
, ext_irl
;
50 extern char uart_dev1
[], uart_dev2
[];
52 int sis_gdb_break
= 1;
62 run_sim(sregs
, go
, icount
, dis
)
71 printf_filtered("resuming at %x\n", sregs
->pc
);
72 sregs
->starttime
= time(NULL
);
73 while ((!sregs
->err_mode
& (go
|| (icount
> 0))) &&
74 ((sregs
->bptnum
== 0) || !(sregs
->bphit
= check_bpt(sregs
)))) {
80 check_interrupts(sregs
);
82 sregs
->err_mode
= execute_trap(sregs
);
84 if (sregs
->psr
& 0x080)
89 if (iurev0
&& sregs
->rett_err
) {
91 sregs
->asi
|= ((sregs
->psr
& 0x040) >> 6);
95 mexc
= memory_read(sregs
->asi
, sregs
->pc
, &sregs
->inst
, &sregs
->hold
);
99 sregs
->pc
= sregs
->npc
;
100 sregs
->npc
= sregs
->npc
+ 4;
103 sregs
->trap
= I_ACC_EXC
;
105 if (sregs
->histlen
) {
106 sregs
->histbuf
[sregs
->histind
].addr
= sregs
->pc
;
107 sregs
->histbuf
[sregs
->histind
].time
= ebase
.simtime
;
109 if (sregs
->histind
>= sregs
->histlen
)
113 printf(" %8d ", ebase
.simtime
);
114 dis_mem(sregs
->pc
, 1, &dinfo
);
116 if ((sis_gdb_break
) && (sregs
->inst
== 0x91d02001)) {
118 printf_filtered("SW BP hit at %x\n", sregs
->pc
);
121 dispatch_instruction(sregs
);
126 sregs
->err_mode
= execute_trap(sregs
);
134 sregs
->tottime
+= time(NULL
) - sregs
->starttime
;
136 error_mode(sregs
->pc
);
141 printf_filtered("HW BP hit at %x\n", sregs
->pc
);
163 printf_filtered("\n SIS - SPARC instruction simulator %s\n", sis_version
);
164 printf_filtered(" Bug-reports to Jiri Gaisler ESA/ESTEC (jgais@wd.estec.esa.nl)\n");
165 argv
= buildargv(args
);
169 while (stat
< argc
) {
170 if (argv
[stat
][0] == '-') {
171 if (strcmp(argv
[stat
], "-v") == 0) {
175 if (strcmp(argv
[stat
], "-iurev0") == 0) {
177 printf_filtered(" simulating IU rev.0 jmpl/restore bug\n");
181 if (strcmp(argv
[stat
], "-mecrev0") == 0) {
183 printf_filtered(" simulating MEC rev.0 timer and uart interrupt bug\n");
186 if (strcmp(argv
[stat
], "-nfp") == 0) {
187 printf_filtered("no FPU\n");
190 if (strcmp(argv
[stat
], "-uart1") == 0) {
191 if ((stat
+ 1) < argc
)
192 strcpy(uart_dev1
, argv
[++stat
]);
194 if (strcmp(argv
[stat
], "-uart2") == 0) {
195 if ((stat
+ 1) < argc
)
196 strcpy(uart_dev2
, argv
[++stat
]);
198 if (strcmp(argv
[stat
], "-nogdb") == 0) {
199 printf_filtered("disabling GDB trap handling for breakpoints\n");
202 if (strcmp(argv
[stat
], "-freq") == 0)
203 if ((stat
+ 1) < argc
) {
204 freq
= VAL(argv
[++stat
]);
205 printf_filtered(" ERC32 freq %d Mhz\n", freq
);
208 bfd_load(argv
[stat
]);
214 INIT_DISASSEMBLE_INFO(dinfo
, stdout
, fprintf
);
224 sim_close(int quitting
)
232 sim_load(char *prog
, int from_tty
)
239 sim_create_inferior(int start_address
, char **argv
, char **env
)
244 sregs
.pc
= start_address
& ~3;
245 sregs
.npc
= sregs
.pc
+ 4;
250 sim_store_register(regno
, value
)
252 unsigned char *value
;
254 /* FIXME: Review the computation of regval. */
255 int regval
= (value
[0] << 24) | (value
[1] << 16) | (value
[2] << 8) | value
[3];
256 set_regi(&sregs
, regno
, regval
);
261 sim_fetch_register(regno
, buf
)
265 get_regi(&sregs
, regno
, buf
);
269 sim_write(mem
, buf
, length
)
274 return (sis_memory_write(mem
, buf
, length
));
278 sim_read(int mem
, unsigned char *buf
, int length
)
280 return (sis_memory_read(mem
, buf
, length
));
284 sim_info(int verbose
)
294 sim_exited
, sim_stopped
, sim_signalled
298 sim_stop_reason(enum sim_stop
* reason
, int *sigrc
)
303 *reason
= sim_stopped
;
309 *reason
= sim_stopped
;
314 *reason
= sim_exited
;
322 sim_resume(int step
, int siggnal
)
324 simstat
= run_sim(&sregs
, 1, 0, 0);
338 exec_cmd(&sregs
, cmd
);
344 sim_insert_breakpoint(int addr
)
346 if (sregs
.bptnum
< BPT_MAX
) {
347 sregs
.bpts
[sregs
.bptnum
] = addr
& ~0x3;
350 printf_filtered("inserted HW BP at %x\n", addr
);
357 sim_remove_breakpoint(int addr
)
361 while ((i
< sregs
.bptnum
) && (sregs
.bpts
[i
] != addr
))
363 if (addr
== sregs
.bpts
[i
]) {
364 for (; i
< sregs
.bptnum
- 1; i
++)
365 sregs
.bpts
[i
] = sregs
.bpts
[i
+ 1];
368 printf_filtered("removed HW BP at %x\n", addr
);