1 /* frv simulator support code
2 Copyright (C) 1998-2015 Free Software Foundation, Inc.
3 Contributed by Red Hat.
5 This file is part of the GNU simulators.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20 /* Main header for the frv. */
22 /* sim-basics.h includes config.h but cgen-types.h must be included before
23 sim-basics.h and cgen-types.h needs config.h. */
27 #include "sim-basics.h"
28 #include "cgen-types.h"
33 #define SIM_ENGINE_HALT_HOOK(SD, LAST_CPU, CIA) \
34 frv_sim_engine_halt_hook ((SD), (LAST_CPU), (CIA))
36 #define SIM_ENGINE_RESTART_HOOK(SD, LAST_CPU, CIA) 0
42 #include "registers.h"
45 void frv_sim_engine_halt_hook (SIM_DESC
, SIM_CPU
*, sim_cia
);
47 /* The _sim_cpu struct. */
50 /* sim/common cpu base. */
53 /* Static parts of cgen. */
56 /* CPU specific parts go here.
57 Note that in files that don't need to access these pieces WANT_CPU_FOO
58 won't be defined and thus these parts won't appear. This is ok in the
59 sense that things work. It is a source of bugs though.
60 One has to of course be careful to not take the size of this
61 struct and no structure members accessed in non-cpu specific files can
62 go after here. Oh for a better language. */
63 #if defined (WANT_CPU_FRVBF)
64 FRVBF_CPU_DATA cpu_data
;
66 /* Control information for registers */
67 FRV_REGISTER_CONTROL register_control
;
68 #define CPU_REGISTER_CONTROL(cpu) (& (cpu)->register_control)
71 #define CPU_VLIW(cpu) (& (cpu)->vliw)
74 #define CPU_INSN_CACHE(cpu) (& (cpu)->insn_cache)
77 #define CPU_DATA_CACHE(cpu) (& (cpu)->data_cache)
79 FRV_PROFILE_STATE profile_state
;
80 #define CPU_PROFILE_STATE(cpu) (& (cpu)->profile_state)
83 #define CPU_DEBUG_STATE(cpu) ((cpu)->debug_state)
86 #define CPU_LOAD_ADDRESS(cpu) ((cpu)->load_address)
89 #define CPU_LOAD_LENGTH(cpu) ((cpu)->load_length)
92 #define CPU_LOAD_SIGNED(cpu) ((cpu)->load_flag)
93 #define CPU_LOAD_LOCK(cpu) ((cpu)->load_flag)
96 #define CPU_RSTR_INVALIDATE(cpu) ((cpu)->store_flag)
98 unsigned long elf_flags
;
99 #define CPU_ELF_FLAGS(cpu) ((cpu)->elf_flags)
100 #endif /* defined (WANT_CPU_FRVBF) */
103 /* The sim_state struct. */
106 sim_cpu
*cpu
[MAX_NR_PROCESSORS
];
108 CGEN_STATE cgen_state
;
115 /* Catch address exceptions. */
116 extern SIM_CORE_SIGNAL_FN frv_core_signal
;
117 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
118 frv_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
121 /* Default memory size. */
122 #define FRV_DEFAULT_MEM_SIZE 0x800000 /* 8M */