1 /* The IGEN simulator generator for GDB, the GNU Debugger.
3 Copyright 2002-2023 Free Software Foundation, Inc.
5 Contributed by Andrew Cagney.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
30 #include "ld-decode.h"
34 #include "gen-idecode.h"
35 #include "gen-engine.h"
36 #include "gen-icache.h"
37 #include "gen-semantics.h"
41 print_engine_issue_prefix_hook (lf
*file
)
43 lf_printf (file
, "\n");
44 lf_indent_suppress (file
);
45 lf_printf (file
, "#if defined (ENGINE_ISSUE_PREFIX_HOOK)\n");
46 lf_printf (file
, "ENGINE_ISSUE_PREFIX_HOOK();\n");
47 lf_indent_suppress (file
);
48 lf_printf (file
, "#endif\n");
49 lf_printf (file
, "\n");
53 print_engine_issue_postfix_hook (lf
*file
)
55 lf_printf (file
, "\n");
56 lf_indent_suppress (file
);
57 lf_printf (file
, "#if defined (ENGINE_ISSUE_POSTFIX_HOOK)\n");
58 lf_printf (file
, "ENGINE_ISSUE_POSTFIX_HOOK();\n");
59 lf_indent_suppress (file
);
60 lf_printf (file
, "#endif\n");
61 lf_printf (file
, "\n");
66 print_run_body (lf
*file
, const gen_entry
*table
)
68 /* Output the function to execute real code:
70 Unfortunatly, there are multiple cases to consider vis:
74 Consequently this function is written in multiple different ways */
76 lf_printf (file
, "{\n");
80 lf_printf (file
, "%sinstruction_address cia;\n",
81 options
.module
.global
.prefix
.l
);
83 lf_printf (file
, "int current_cpu = next_cpu_nr;\n");
85 if (options
.gen
.icache
)
87 lf_printf (file
, "/* flush the icache of a possible break insn */\n");
88 lf_printf (file
, "{\n");
89 lf_printf (file
, " int cpu_nr;\n");
90 lf_printf (file
, " for (cpu_nr = 0; cpu_nr < nr_cpus; cpu_nr++)\n");
91 lf_printf (file
, " cpu_flush_icache (STATE_CPU (sd, cpu_nr));\n");
92 lf_printf (file
, "}\n");
99 /* CASE 1: NO SMP (with or with out instruction cache).\n\
101 In this case, we can take advantage of the fact that the current\n\
102 instruction address (CIA) does not need to be read from / written to\n\
103 the CPU object after the execution of an instruction.\n\
105 Instead, CIA is only saved when the main loop exits. This occures\n\
106 when either sim_engine_halt or sim_engine_restart is called. Both of\n\
107 these functions save the current instruction address before halting /\n\
108 restarting the simulator.\n\
110 As a variation, there may also be support for an instruction cracking\n\
115 lf_putstr (file
, "\n");
116 lf_putstr (file
, "/* prime the main loop */\n");
117 lf_putstr (file
, "SIM_ASSERT (current_cpu == 0);\n");
118 lf_putstr (file
, "SIM_ASSERT (nr_cpus == 1);\n");
119 lf_putstr (file
, "cia = CPU_PC_GET (CPU);\n");
121 lf_putstr (file
, "\n");
122 lf_putstr (file
, "while (1)\n");
123 lf_putstr (file
, " {\n");
124 lf_indent (file
, +4);
126 lf_printf (file
, "%sinstruction_address nia;\n",
127 options
.module
.global
.prefix
.l
);
129 lf_printf (file
, "\n");
130 if (!options
.gen
.icache
)
133 "%sinstruction_word instruction_0 = IMEM%d (cia);\n",
134 options
.module
.global
.prefix
.l
, options
.insn_bit_size
);
135 print_engine_issue_prefix_hook (file
);
136 print_idecode_body (file
, table
, "nia = ");
137 print_engine_issue_postfix_hook (file
);
141 lf_putstr (file
, "idecode_cache *cache_entry =\n");
142 lf_putstr (file
, " cpu_icache_entry (cpu, cia);\n");
143 lf_putstr (file
, "if (cache_entry->address == cia)\n");
144 lf_putstr (file
, " {\n");
145 lf_indent (file
, -4);
146 lf_putstr (file
, "/* cache hit */\n");
148 "idecode_semantic *const semantic = cache_entry->semantic;\n");
149 lf_putstr (file
, "cia = semantic (cpu, cache_entry, cia);\n");
151 lf_indent (file
, -4);
152 lf_putstr (file
, " }\n");
153 lf_putstr (file
, "else\n");
154 lf_putstr (file
, " {\n");
155 lf_indent (file
, +4);
156 lf_putstr (file
, "/* cache miss */\n");
157 if (!options
.gen
.semantic_icache
)
159 lf_putstr (file
, "idecode_semantic *semantic;\n");
161 lf_printf (file
, "instruction_word instruction = IMEM%d (cia);\n",
162 options
.insn_bit_size
);
163 lf_putstr (file
, "if (WITH_MON != 0)\n");
165 " mon_event (mon_event_icache_miss, cpu, cia);\n");
166 if (options
.gen
.semantic_icache
)
168 lf_putstr (file
, "{\n");
169 lf_indent (file
, +2);
170 print_engine_issue_prefix_hook (file
);
171 print_idecode_body (file
, table
, "nia =");
172 print_engine_issue_postfix_hook (file
);
173 lf_indent (file
, -2);
174 lf_putstr (file
, "}\n");
178 print_engine_issue_prefix_hook (file
);
179 print_idecode_body (file
, table
, "semantic =");
180 lf_putstr (file
, "nia = semantic (cpu, cache_entry, cia);\n");
181 print_engine_issue_postfix_hook (file
);
183 lf_indent (file
, -4);
184 lf_putstr (file
, " }\n");
187 /* update the cpu if necessary */
188 switch (options
.gen
.nia
)
190 case nia_is_cia_plus_one
:
191 lf_printf (file
, "\n");
192 lf_printf (file
, "/* Update the instruction address */\n");
193 lf_printf (file
, "cia = nia;\n");
197 ERROR ("engine gen when NIA complex");
201 lf_putstr (file
, "\n");
202 lf_putstr (file
, "/* process any events */\n");
203 lf_putstr (file
, "if (sim_events_tick (sd))\n");
204 lf_putstr (file
, " {\n");
205 lf_putstr (file
, " CPU_PC_SET (CPU, cia);\n");
206 lf_putstr (file
, " sim_events_process (sd);\n");
207 lf_putstr (file
, " cia = CPU_PC_GET (CPU);\n");
208 lf_putstr (file
, " }\n");
210 lf_indent (file
, -4);
211 lf_printf (file
, " }\n");
218 /* CASE 2: SMP (With or without ICACHE)\n\
220 The complexity here comes from needing to correctly halt the simulator\n\
221 when it is aborted. For instance, if cpu0 requests a restart then\n\
222 cpu1 will normally be the next cpu that is run. Cpu0 being restarted\n\
223 after all the other CPU's and the event queue have been processed */\n\
227 lf_putstr (file
, "\n");
229 "/* have ensured that the event queue is NOT next */\n");
230 lf_printf (file
, "SIM_ASSERT (current_cpu >= 0);\n");
231 lf_printf (file
, "SIM_ASSERT (current_cpu <= nr_cpus - 1);\n");
232 lf_printf (file
, "SIM_ASSERT (nr_cpus <= MAX_NR_PROCESSORS);\n");
234 lf_putstr (file
, "\n");
235 lf_putstr (file
, "while (1)\n");
236 lf_putstr (file
, " {\n");
237 lf_indent (file
, +4);
238 lf_putstr (file
, "sim_cpu *cpu = STATE_CPU (sd, current_cpu);\n");
239 lf_putstr (file
, "instruction_address cia = CPU_PC_GET (cpu);\n");
240 lf_putstr (file
, "\n");
242 if (!options
.gen
.icache
)
244 lf_printf (file
, "instruction_word instruction_0 = IMEM%d (cia);\n",
245 options
.insn_bit_size
);
246 print_engine_issue_prefix_hook (file
);
247 print_idecode_body (file
, table
, "cia =");
248 lf_putstr (file
, "CPU_PC_SET (cpu, cia);\n");
249 print_engine_issue_postfix_hook (file
);
252 if (options
.gen
.icache
)
254 lf_putstr (file
, "engine_cache *cache_entry =\n");
255 lf_putstr (file
, " cpu_icache_entry(processor, cia);\n");
256 lf_putstr (file
, "\n");
257 lf_putstr (file
, "if (cache_entry->address == cia) {\n");
259 lf_indent (file
, +2);
260 lf_putstr (file
, "\n");
261 lf_putstr (file
, "/* cache hit */\n");
263 "engine_semantic *semantic = cache_entry->semantic;\n");
265 "cia = semantic(processor, cache_entry, cia);\n");
267 lf_putstr (file
, "cpu_set_program_counter(processor, cia);\n");
268 lf_putstr (file
, "\n");
269 lf_indent (file
, -2);
271 lf_putstr (file
, "}\n");
272 lf_putstr (file
, "else {\n");
274 lf_indent (file
, +2);
275 lf_putstr (file
, "\n");
276 lf_putstr (file
, "/* cache miss */\n");
277 if (!options
.gen
.semantic_icache
)
279 lf_putstr (file
, "engine_semantic *semantic;\n");
281 lf_printf (file
, "instruction_word instruction = IMEM%d (cia);\n",
282 options
.insn_bit_size
);
283 lf_putstr (file
, "if (WITH_MON != 0)\n");
285 " mon_event(mon_event_icache_miss, processors[current_cpu], cia);\n");
286 if (options
.gen
.semantic_icache
)
288 lf_putstr (file
, "{\n");
289 lf_indent (file
, +2);
290 print_engine_issue_prefix_hook (file
);
291 print_idecode_body (file
, table
, "cia =");
292 print_engine_issue_postfix_hook (file
);
293 lf_indent (file
, -2);
294 lf_putstr (file
, "}\n");
298 print_engine_issue_prefix_hook (file
);
299 print_idecode_body (file
, table
, "semantic = ");
301 "cia = semantic(processor, cache_entry, cia);\n");
302 print_engine_issue_postfix_hook (file
);
305 lf_putstr (file
, "cpu_set_program_counter(processor, cia);\n");
306 lf_putstr (file
, "\n");
307 lf_indent (file
, -2);
309 lf_putstr (file
, "}\n");
312 lf_putstr (file
, "\n");
313 lf_putstr (file
, "current_cpu += 1;\n");
314 lf_putstr (file
, "if (current_cpu == nr_cpus)\n");
315 lf_putstr (file
, " {\n");
316 lf_putstr (file
, " if (sim_events_tick (sd))\n");
317 lf_putstr (file
, " {\n");
318 lf_putstr (file
, " sim_events_process (sd);\n");
319 lf_putstr (file
, " }\n");
320 lf_putstr (file
, " current_cpu = 0;\n");
321 lf_putstr (file
, " }\n");
324 lf_indent (file
, -4);
325 lf_putstr (file
, " }\n");
329 lf_indent (file
, -2);
330 lf_putstr (file
, "}\n");
334 /****************************************************************/
337 print_engine_run_function_header (lf
*file
,
338 const char *processor
,
339 function_decl_type decl_type
)
342 lf_printf (file
, "\n");
345 case is_function_declaration
:
346 lf_print__function_type (file
, "void", "INLINE_ENGINE", "\n");
348 case is_function_definition
:
349 lf_print__function_type (file
, "void", "INLINE_ENGINE", " ");
351 case is_function_variable
:
352 lf_printf (file
, "void (*");
355 indent
= print_function_name (file
, "run", NULL
, /* format name */
356 processor
, NULL
, /* expanded bits */
357 function_name_prefix_engine
);
360 case is_function_definition
:
361 lf_putstr (file
, "\n(");
364 case is_function_declaration
:
365 indent
+= lf_printf (file
, " (");
367 case is_function_variable
:
368 lf_putstr (file
, ")\n(");
372 lf_indent (file
, +indent
);
373 lf_printf (file
, "SIM_DESC sd,\n");
374 lf_printf (file
, "int next_cpu_nr,\n");
375 lf_printf (file
, "int nr_cpus,\n");
376 lf_printf (file
, "int siggnal)");
377 lf_indent (file
, -indent
);
380 case is_function_definition
:
381 lf_putstr (file
, "\n");
383 case is_function_variable
:
384 case is_function_declaration
:
385 lf_putstr (file
, ";\n");
392 gen_engine_h (lf
*file
,
393 const gen_table
*gen
,
394 const insn_table
*isa
,
395 cache_entry
*cache_rules
)
398 for (entry
= gen
->tables
; entry
!= NULL
; entry
= entry
->next
)
400 print_engine_run_function_header (file
,
401 (options
.gen
.multi_sim
403 : NULL
), is_function_declaration
);
409 gen_engine_c (lf
*file
,
410 const gen_table
*gen
,
411 const insn_table
*isa
,
412 cache_entry
*cache_rules
)
414 const gen_list
*entry
;
416 print_includes (file
);
417 print_include_inline (file
, options
.module
.semantics
);
418 print_include (file
, options
.module
.engine
);
419 lf_printf (file
, "\n");
420 lf_printf (file
, "#include \"sim-assert.h\"\n");
421 lf_printf (file
, "\n");
422 print_idecode_globals (file
);
423 lf_printf (file
, "\n");
425 for (entry
= gen
->tables
; entry
!= NULL
; entry
= entry
->next
)
427 switch (options
.gen
.code
)
430 print_idecode_lookups (file
, entry
->table
, cache_rules
);
432 /* output the main engine routine */
433 print_engine_run_function_header (file
,
434 (options
.gen
.multi_sim
436 : NULL
), is_function_definition
);
437 print_run_body (file
, entry
->table
);
441 ERROR ("Jumps currently unimplemented");