1 /* This file is part of the program psim.
3 Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
34 #include "ld-decode.h"
39 #include "gen-model.h"
40 #include "gen-icache.h"
41 #include "gen-itable.h"
42 #include "gen-idecode.h"
43 #include "gen-semantics.h"
44 #include "gen-engine.h"
45 #include "gen-support.h"
46 #include "gen-engine.h"
49 /****************************************************************/
52 /* Semantic functions */
55 print_semantic_function_formal (lf
*file
,
56 int nr_prefetched_words
)
60 if (options
.gen
.icache
|| nr_prefetched_words
< 0)
62 nr
+= lf_printf (file
, "SIM_DESC sd,\n");
63 nr
+= lf_printf (file
, "%sidecode_cache *cache_entry,\n",
64 options
.prefix
.global
.name
);
65 nr
+= lf_printf (file
, "%sinstruction_address cia",
66 options
.prefix
.global
.name
);
68 else if (options
.gen
.smp
)
70 nr
+= lf_printf (file
, "sim_cpu *cpu,\n");
71 for (word_nr
= 0; word_nr
< nr_prefetched_words
; word_nr
++)
73 nr
+= lf_printf (file
, "%sinstruction_word instruction_%d,\n",
74 options
.prefix
.global
.name
,
77 nr
+= lf_printf (file
, "%sinstruction_address cia",
78 options
.prefix
.global
.name
);
82 nr
+= lf_printf (file
, "SIM_DESC sd,\n");
83 for (word_nr
= 0; word_nr
< nr_prefetched_words
; word_nr
++)
85 nr
+= lf_printf (file
, "%sinstruction_word instruction_%d,\n",
86 options
.prefix
.global
.name
,
89 nr
+= lf_printf (file
, "%sinstruction_address cia",
90 options
.prefix
.global
.name
);
96 print_semantic_function_actual (lf
*file
,
97 int nr_prefetched_words
)
101 if (options
.gen
.icache
|| nr_prefetched_words
< 0)
103 nr
+= lf_printf (file
, "sd, cache_entry, cia");
108 nr
+= lf_printf (file
, "cpu");
110 nr
+= lf_printf (file
, "sd");
111 for (word_nr
= 0; word_nr
< nr_prefetched_words
; word_nr
++)
112 nr
+= lf_printf (file
, ", instruction_%d", word_nr
);
113 nr
+= lf_printf (file
, ", cia");
119 print_semantic_function_type (lf
*file
)
122 nr
+= lf_printf (file
, "%sinstruction_address",
123 options
.prefix
.global
.name
);
128 /* Idecode functions */
131 print_icache_function_formal (lf
*file
,
132 int nr_prefetched_words
)
137 nr
+= lf_printf (file
, "sim_cpu *cpu,\n");
139 nr
+= lf_printf (file
, "SIM_DESC sd,\n");
140 for (word_nr
= 0; word_nr
< nr_prefetched_words
; word_nr
++)
141 nr
+= lf_printf (file
, " %sinstruction_word instruction_%d,\n",
142 options
.prefix
.global
.name
, word_nr
);
143 nr
+= lf_printf (file
, " %sinstruction_address cia,\n",
144 options
.prefix
.global
.name
);
145 nr
+= lf_printf (file
, " %sidecode_cache *cache_entry",
146 options
.prefix
.global
.name
);
151 print_icache_function_actual (lf
*file
,
152 int nr_prefetched_words
)
157 nr
+= lf_printf (file
, "cpu");
159 nr
+= lf_printf (file
, "sd");
160 for (word_nr
= 0; word_nr
< nr_prefetched_words
; word_nr
++)
161 nr
+= lf_printf (file
, ", instruction_%d", word_nr
);
162 nr
+= lf_printf (file
, ", cia, cache_entry");
167 print_icache_function_type (lf
*file
)
170 if (options
.gen
.semantic_icache
)
172 nr
= print_semantic_function_type (file
);
176 nr
= lf_printf (file
, "%sidecode_semantic *",
177 options
.prefix
.global
.name
);
186 print_opcode_bits (lf
*file
,
192 nr
+= lf_putchr (file
, '_');
193 nr
+= lf_putstr (file
, bits
->field
->val_string
);
194 if (bits
->opcode
->is_boolean
&& bits
->value
== 0)
195 nr
+= lf_putint (file
, bits
->opcode
->boolean_constant
);
196 else if (!bits
->opcode
->is_boolean
) {
197 if (bits
->opcode
->last
< bits
->field
->last
)
198 nr
+= lf_putint (file
, bits
->value
<< (bits
->field
->last
- bits
->opcode
->last
));
200 nr
+= lf_putint (file
, bits
->value
);
202 nr
+= print_opcode_bits (file
, bits
->next
);
207 print_c_name (lf
*file
,
212 for (pos
= name
; *pos
!= '\0'; pos
++)
221 nr
+= lf_putchr (file
, '_');
224 nr
+= lf_putchr (file
, *pos
);
232 print_function_name (lf
*file
,
233 const char *basename
,
234 const char *format_name
,
235 const char *model_name
,
236 opcode_bits
*expanded_bits
,
237 lf_function_name_prefixes prefix
)
243 case function_name_prefix_semantics
:
244 nr
+= lf_printf (file
, "%s", options
.prefix
.semantics
.name
);
245 nr
+= lf_printf (file
, "semantic_");
247 case function_name_prefix_idecode
:
248 nr
+= lf_printf (file
, "%s", options
.prefix
.idecode
.name
);
249 nr
+= lf_printf (file
, "idecode_");
251 case function_name_prefix_itable
:
252 nr
+= lf_printf (file
, "%sitable_", options
.prefix
.itable
.name
);
254 case function_name_prefix_icache
:
255 nr
+= lf_printf (file
, "%s", options
.prefix
.icache
.name
);
256 nr
+= lf_printf (file
, "icache_");
258 case function_name_prefix_engine
:
259 nr
+= lf_printf (file
, "%s", options
.prefix
.engine
.name
);
260 nr
+= lf_printf (file
, "engine_");
265 if (model_name
!= NULL
)
267 nr
+= print_c_name (file
, model_name
);
268 nr
+= lf_printf (file
, "_");
271 /* the function name */
272 nr
+= print_c_name (file
, basename
);
274 /* the format name if available */
275 if (format_name
!= NULL
)
277 nr
+= lf_printf (file
, "_");
278 nr
+= print_c_name (file
, format_name
);
282 nr
+= print_opcode_bits (file
, expanded_bits
);
289 print_my_defines (lf
*file
,
290 const char *basename
,
291 const char *format_name
,
292 opcode_bits
*expanded_bits
)
294 /* #define MY_INDEX xxxxx */
295 lf_indent_suppress (file
);
296 lf_printf (file
, "#undef MY_INDEX\n");
297 lf_indent_suppress (file
);
298 lf_printf (file
, "#define MY_INDEX ");
299 print_function_name (file
,
300 basename
, format_name
, NULL
,
302 function_name_prefix_itable
);
303 lf_printf (file
, "\n");
304 /* #define MY_PREFIX xxxxxx */
305 lf_indent_suppress (file
);
306 lf_printf (file
, "#undef ");
307 print_function_name (file
,
308 basename
, format_name
, NULL
,
310 function_name_prefix_none
);
311 lf_printf (file
, "\n");
312 lf_indent_suppress (file
);
313 lf_printf (file
, "#undef MY_PREFIX\n");
314 lf_indent_suppress (file
);
315 lf_printf (file
, "#define MY_PREFIX ");
316 print_function_name (file
,
317 basename
, format_name
, NULL
,
319 function_name_prefix_none
);
320 lf_printf (file
, "\n");
321 /* #define MY_NAME xxxxxx */
322 lf_indent_suppress (file
);
323 lf_indent_suppress (file
);
324 lf_printf (file
, "#undef MY_NAME\n");
325 lf_indent_suppress (file
);
326 lf_printf (file
, "#define MY_NAME \"");
327 print_function_name (file
,
328 basename
, format_name
, NULL
,
330 function_name_prefix_none
);
331 lf_printf (file
, "\"\n");
336 print_itrace_prefix (lf
*file
,
337 const char *phase_lc
)
339 const char *prefix
= "trace_one_insn (";
340 int indent
= strlen (prefix
);
341 lf_printf (file
, "%sSD, CPU, %s, TRACE_LINENUM_P (CPU),\n",
342 prefix
, (options
.gen
.delayed_branch
? "cia.ip" : "cia"));
343 lf_indent (file
, +indent
);
344 lf_printf (file
, "%sitable[MY_INDEX].file,\n", options
.prefix
.itable
.name
);
345 lf_printf (file
, "%sitable[MY_INDEX].line_nr,\n", options
.prefix
.itable
.name
);
346 lf_printf (file
, "\"%s\",\n", phase_lc
);
347 lf_printf (file
, "\"%%-18s - ");
353 print_itrace_format (lf
*file
,
354 insn_mnemonic_entry
*assembler
)
356 /* pass=1 is fmt string; pass=2 is is arguments */
358 /* print the format string */
359 for (pass
= 1; pass
<= 2; pass
++)
361 const char *chp
= assembler
->format
;
362 chp
++; /* skip the leading quote */
363 /* prefix the format with the insn `name' */
366 lf_printf (file
, ",\n");
367 lf_printf (file
, "%sitable[MY_INDEX].name", options
.prefix
.itable
.name
);
369 /* write out the format/args */
372 if (chp
[0] == '\\' && (chp
[1] == '<' || chp
[1] == '>'))
375 lf_putchr (file
, chp
[1]);
378 else if (chp
[0] == '<' || chp
[0] == '%')
380 /* parse [ "%" ... ] "<" [ func "#" ] param ">" */
386 /* the "%" ... "<" format */
388 while (chp
[0] != '<' && chp
[0] != '\0')
391 error (assembler
->line
, "Missing `<' after `%%'\n");
393 /* [ "func" # ] OR "param" */
396 while (chp
[0] != '>' && chp
[0] != '#' && chp
[0] != '\0')
398 strlen_func
= chp
- func
;
403 while (chp
[0] != '>' && chp
[0] != '\0')
406 strlen_param
= chp
- param
;
408 error (assembler
->line
, "Missing closing `>' in assembler string\n");
412 lf_printf (file
, ",\n");
413 if (strncmp (fmt
, "<", 1) == 0)
414 /* implicit long int format */
417 lf_printf (file
, "%%ld");
420 lf_printf (file
, "(long) ");
421 lf_write (file
, param
, strlen_param
);
424 else if (strncmp (fmt
, "%<", 2) == 0)
425 /* explicit format */
428 lf_printf (file
, "%%");
430 lf_write (file
, param
, strlen_param
);
432 else if (strncmp (fmt
, "%s<", 3) == 0)
436 lf_printf (file
, "%%s");
439 lf_printf (file
, "%sstr_", options
.prefix
.global
.name
);
440 lf_write (file
, func
, strlen_func
);
441 lf_printf (file
, " (SD_, ");
442 lf_write (file
, param
, strlen_param
);
443 lf_printf (file
, ")");
446 else if (strncmp (fmt
, "%lx<", 4) == 0)
450 lf_printf (file
, "%%lx");
453 lf_printf (file
, "(unsigned long) ");
454 lf_write (file
, param
, strlen_param
);
457 else if (strncmp (fmt
, "%08lx<", 6) == 0)
461 lf_printf (file
, "%%08lx");
464 lf_printf (file
, "(unsigned long) ");
465 lf_write (file
, param
, strlen_param
);
469 error (assembler
->line
, "Unknown assembler string format\n");
474 lf_putchr (file
, chp
[0]);
479 lf_printf (file
, ");\n");
484 print_itrace (lf
*file
,
488 const char *phase
= (idecode
) ? "DECODE" : "INSN";
489 const char *phase_lc
= (idecode
) ? "decode" : "insn";
490 lf_printf (file
, "\n");
491 lf_indent_suppress (file
);
492 lf_printf (file
, "#if defined (WITH_TRACE)\n");
493 lf_printf (file
, "/* trace the instructions execution if enabled */\n");
494 lf_printf (file
, "if (TRACE_%s_P (CPU))\n", phase
);
495 lf_printf (file
, " {\n");
496 lf_indent (file
, +4);
497 if (insn
->mnemonics
!= NULL
)
499 insn_mnemonic_entry
*assembler
= insn
->mnemonics
;
503 if (assembler
->condition
!= NULL
)
506 lf_printf (file
, "%sif (%s)\n",
507 is_first
? "" : "else ",
508 assembler
->condition
);
509 lf_indent (file
, +2);
510 indent
= print_itrace_prefix (file
, phase_lc
);
511 print_itrace_format (file
, assembler
);
512 lf_indent (file
, -indent
);
513 lf_indent (file
, -2);
514 if (assembler
->next
== NULL
)
515 error (assembler
->line
, "Missing final unconditional assembler\n");
522 lf_printf (file
, "else\n");
523 lf_indent (file
, +2);
525 indent
= print_itrace_prefix (file
, phase_lc
);
526 print_itrace_format (file
, assembler
);
527 lf_indent (file
, -indent
);
529 lf_indent (file
, -2);
530 if (assembler
->next
!= NULL
)
531 error (assembler
->line
, "Unconditional assembler is not last\n");
534 assembler
= assembler
->next
;
536 while (assembler
!= NULL
);
540 int indent
= print_itrace_prefix (file
, phase_lc
);
541 lf_printf (file
, "?\",\n");
542 lf_printf (file
, "itable[MY_INDEX].name);\n");
543 lf_indent (file
, -indent
);
545 lf_indent (file
, -4);
546 lf_printf (file
, " }\n");
547 lf_indent_suppress (file
);
548 lf_printf (file
, "#endif\n");
553 print_sim_engine_abort (lf
*file
,
556 lf_printf (file
, "sim_engine_abort (SD, CPU, cia, ");
557 lf_printf (file
, "\"%s\"", message
);
558 lf_printf (file
, ");\n");
562 /****************************************************************/
566 gen_semantics_h (lf
*file
,
567 insn_list
*semantics
,
572 for (word_nr
= -1; word_nr
<= max_nr_words
; word_nr
++)
574 lf_printf (file
, "typedef ");
575 print_semantic_function_type (file
);
576 lf_printf (file
, " %sidecode_semantic",
577 options
.prefix
.global
.name
);
579 lf_printf (file
, "_%d", word_nr
);
580 lf_printf (file
, "\n(");
581 lf_indent (file
, +1);
582 print_semantic_function_formal (file
, word_nr
);
583 lf_indent (file
, -1);
584 lf_printf (file
, ");\n");
585 lf_printf (file
, "\n");
587 switch (options
.gen
.code
)
590 for (semantic
= semantics
; semantic
!= NULL
; semantic
= semantic
->next
)
592 /* Ignore any special/internal instructions */
593 if (semantic
->insn
->nr_words
== 0)
595 print_semantic_declaration (file
,
597 semantic
->expanded_bits
,
599 semantic
->nr_prefetched_words
);
603 lf_print__this_file_is_empty (file
, "generating jumps");
610 gen_semantics_c (lf
*file
,
611 insn_list
*semantics
,
612 cache_entry
*cache_rules
)
614 if (options
.gen
.code
== generate_calls
)
617 lf_printf (file
, "\n");
618 lf_printf (file
, "#include \"sim-main.h\"\n");
619 lf_printf (file
, "#include \"%sitable.h\"\n",
620 options
.prefix
.itable
.name
);
621 lf_printf (file
, "#include \"%sidecode.h\"\n",
622 options
.prefix
.idecode
.name
);
623 lf_printf (file
, "#include \"%ssemantics.h\"\n",
624 options
.prefix
.semantics
.name
);
625 lf_printf (file
, "#include \"%ssupport.h\"\n",
626 options
.prefix
.support
.name
);
627 lf_printf (file
, "\n");
628 for (semantic
= semantics
; semantic
!= NULL
; semantic
= semantic
->next
)
630 /* Ignore any special/internal instructions */
631 if (semantic
->insn
->nr_words
== 0)
633 print_semantic_definition (file
,
635 semantic
->expanded_bits
,
638 semantic
->nr_prefetched_words
);
643 lf_print__this_file_is_empty (file
, "generating jump engine");
648 /****************************************************************/
652 gen_icache_h (lf
*file
,
654 function_entry
*functions
,
658 for (word_nr
= 0; word_nr
<= max_nr_words
; word_nr
++)
660 lf_printf (file
, "typedef ");
661 print_icache_function_type(file
);
662 lf_printf (file
, " %sidecode_icache_%d\n(",
663 options
.prefix
.global
.name
,
665 print_icache_function_formal(file
, word_nr
);
666 lf_printf (file
, ");\n");
667 lf_printf (file
, "\n");
669 if (options
.gen
.code
== generate_calls
670 && options
.gen
.icache
)
672 function_entry_traverse (file
, functions
,
673 print_icache_internal_function_declaration
,
675 while (semantic
!= NULL
)
677 print_icache_declaration (file
,
679 semantic
->expanded_bits
,
681 semantic
->nr_prefetched_words
);
682 semantic
= semantic
->next
;
687 lf_print__this_file_is_empty (file
, "generating jump engine");
692 gen_icache_c (lf
*file
,
694 function_entry
*functions
,
695 cache_entry
*cache_rules
)
697 /* output `internal' invalid/floating-point unavailable functions
699 if (options
.gen
.code
== generate_calls
700 && options
.gen
.icache
)
702 lf_printf (file
, "\n");
703 lf_printf (file
, "#include \"cpu.h\"\n");
704 lf_printf (file
, "#include \"idecode.h\"\n");
705 lf_printf (file
, "#include \"semantics.h\"\n");
706 lf_printf (file
, "#include \"icache.h\"\n");
707 lf_printf (file
, "#include \"support.h\"\n");
708 lf_printf (file
, "\n");
709 function_entry_traverse (file
, functions
,
710 print_icache_internal_function_definition
,
712 lf_printf (file
, "\n");
713 while (semantic
!= NULL
)
715 print_icache_definition (file
,
717 semantic
->expanded_bits
,
720 semantic
->nr_prefetched_words
);
721 semantic
= semantic
->next
;
726 lf_print__this_file_is_empty (file
, "generating jump engine");
731 /****************************************************************/
735 gen_idecode_h (lf
*file
,
738 cache_entry
*cache_rules
)
740 lf_printf (file
, "typedef unsigned%d %sinstruction_word;\n",
741 options
.insn_bit_size
, options
.prefix
.global
.name
);
742 if (options
.gen
.delayed_branch
)
744 lf_printf (file
, "typedef struct _%sinstruction_address {\n",
745 options
.prefix
.global
.name
);
746 lf_printf (file
, " address_word ip; /* instruction pointer */\n");
747 lf_printf (file
, " address_word dp; /* delayed-slot pointer */\n");
748 lf_printf (file
, "} %sinstruction_address;\n", options
.prefix
.global
.name
);
752 lf_printf (file
, "typedef address_word %sinstruction_address;\n",
753 options
.prefix
.global
.name
);
756 if (options
.gen
.nia
== nia_is_invalid
757 && strlen (options
.prefix
.global
.uname
) > 0)
759 lf_indent_suppress (file
);
760 lf_printf (file
, "#define %sINVALID_INSTRUCTION_ADDRESS ",
761 options
.prefix
.global
.uname
);
762 lf_printf (file
, "INVALID_INSTRUCTION_ADDRESS\n");
764 lf_printf (file
, "\n");
765 print_icache_struct (file
, insns
, cache_rules
);
766 lf_printf (file
, "\n");
767 if (options
.gen
.icache
)
769 ERROR ("FIXME - idecode with icache suffering from bit-rot");
774 for (entry
= gen
->tables
; entry
!= NULL
; entry
= entry
->next
)
776 print_idecode_issue_function_header (file
,
779 1/*ALWAYS ONE WORD*/);
786 gen_idecode_c (lf
*file
,
789 cache_entry
*cache_rules
)
792 lf_printf (file
, "#include \"sim-main.h\"\n");
793 lf_printf (file
, "#include \"%sidecode.h\"\n", options
.prefix
.global
.name
);
794 lf_printf (file
, "#include \"%ssemantics.h\"\n", options
.prefix
.global
.name
);
795 lf_printf (file
, "#include \"%sicache.h\"\n", options
.prefix
.global
.name
);
796 lf_printf (file
, "#include \"%ssupport.h\"\n", options
.prefix
.global
.name
);
797 lf_printf (file
, "\n");
798 lf_printf (file
, "\n");
800 print_idecode_globals (file
);
801 lf_printf (file
, "\n");
803 switch (options
.gen
.code
)
808 for (entry
= gen
->tables
; entry
!= NULL
; entry
= entry
->next
)
810 print_idecode_lookups (file
, entry
->table
, cache_rules
);
812 /* output the main idecode routine */
813 if (!options
.gen
.icache
)
815 print_idecode_issue_function_header (file
,
818 1/*ALWAYS ONE WORD*/);
819 lf_printf (file
, "{\n");
820 lf_indent (file
, +2);
821 lf_printf (file
, "%sinstruction_address nia;\n",
822 options
.prefix
.global
.name
);
823 print_idecode_body (file
, entry
->table
, "nia =");
824 lf_printf (file
, "return nia;");
825 lf_indent (file
, -2);
826 lf_printf (file
, "}\n");
833 lf_print__this_file_is_empty (file
, "generating a jump engine");
840 /****************************************************************/
848 lf_printf (file
, "#include \"sim-main.h\"\n");
849 lf_printf (file
, "#include \"engine.h\"\n");
850 lf_printf (file
, "#include \"bfd.h\"\n");
851 lf_printf (file
, "\n");
852 lf_printf (file
, "void\n");
853 lf_printf (file
, "sim_engine_run (SIM_DESC sd,\n");
854 lf_printf (file
, " int next_cpu_nr,\n");
855 lf_printf (file
, " int siggnal)\n");
856 lf_printf (file
, "{\n");
857 lf_indent (file
, +2);
858 if (options
.gen
.multi_sim
)
860 lf_printf (file
, "int mach;\n");
861 lf_printf (file
, "if (STATE_ARCHITECTURE (sd) == NULL)\n");
862 lf_printf (file
, " mach = 0;\n");
863 lf_printf (file
, "else\n");
864 lf_printf (file
, " mach = STATE_ARCHITECTURE (sd)->mach;\n");
865 lf_printf (file
, "switch (mach)\n");
866 lf_printf (file
, " {\n");
867 lf_indent (file
, +2);
868 for (entry
= gen
->tables
; entry
!= NULL
; entry
= entry
->next
)
870 lf_printf (file
, "case bfd_mach_%s:\n", entry
->processor
);
871 lf_indent (file
, +2);
872 print_function_name (file
,
874 NULL
, /* format name */
876 NULL
, /* expanded bits */
877 function_name_prefix_engine
);
878 lf_printf (file
, " (sd, next_cpu_nr, siggnal);\n");
879 lf_printf (file
, "break;\n");
880 lf_indent (file
, -2);
882 lf_printf (file
, "default:\n");
883 lf_indent (file
, +2);
884 lf_printf (file
, "sim_engine_abort (sd, NULL, NULL_CIA,\n");
885 lf_printf (file
, " \"sim_engine_run - unknown machine\");\n");
886 lf_printf (file
, "break;\n");
887 lf_indent (file
, -2);
888 lf_indent (file
, -2);
889 lf_printf (file
, " }\n");
893 print_function_name (file
,
895 NULL
, /* format name */
896 NULL
, /* NO processor */
897 NULL
, /* expanded bits */
898 function_name_prefix_engine
);
899 lf_printf (file
, " (sd, next_cpu_nr, siggnal);\n");
901 lf_indent (file
, -2);
902 lf_printf (file
, "}\n");
905 /****************************************************************/
908 do_gen (insn_table
*isa
,
909 decode_table
*decode_rules
)
912 if (decode_rules
== NULL
)
913 error (NULL
, "Must specify a decode table\n");
915 error (NULL
, "Must specify an instruction table\n");
916 if (decode_table_max_word_nr (decode_rules
) > 0)
917 options
.gen
.multi_word
= decode_table_max_word_nr (decode_rules
);
918 gen
= make_gen_tables (isa
, decode_rules
);
919 gen_tables_expand_insns (gen
);
920 gen_tables_expand_semantics (gen
);
924 /****************************************************************/
926 igen_options options
;
933 cache_entry
*cache_rules
= NULL
;
934 lf_file_references file_references
= lf_include_references
;
935 decode_table
*decode_rules
= NULL
;
936 insn_table
*isa
= NULL
;
937 gen_table
*gen
= NULL
;
938 char *real_file_name
= NULL
;
941 lf
*standard_out
= lf_open ("-", "stdout", lf_omit_references
, lf_is_text
, "igen");
943 INIT_OPTIONS (options
);
949 printf (" igen <config-opts> ... <input-opts>... <output-opts>...\n");
951 printf ("Config options:\n");
953 printf (" -B <bit-size>\n");
954 printf ("\t Set the number of bits in an instruction (depreciated).\n");
955 printf ("\t This option can now be set directly in the instruction table.\n");
957 printf (" -D <data-structure>\n");
958 printf ("\t Dump the specified data structure to stdout. Valid structures include:\n");
959 printf ("\t processor-names - list the names of all the processors (models)\n");
961 printf (" -F <filter-list>\n");
962 printf ("\t Filter out any instructions with a non-empty flags field that contains\n");
963 printf ("\t a flag not listed in the <filter-list>.\n");
965 printf (" -H <high-bit>\n");
966 printf ("\t Set the number of the high (most significant) instruction bit (depreciated).\n");
967 printf ("\t This option can now be set directly in the instruction table.\n");
969 printf (" -I <icache-size>\n");
970 printf ("\t Specify size of the cracking instruction cache (default %d instructions).\n",
971 options
.gen
.icache_size
);
972 printf ("\t Implies -G icache.\n");
974 printf (" -M <model-list>\n");
975 printf ("\t Filter out any instructions that do not support at least one of the listed\n");
976 printf ("\t models (An instructions with no model information is considered to support\n");
977 printf ("\n all models.).\n");
979 printf (" -N <nr-cpus>\n");
980 printf ("\t Generate a simulator supporting <nr-cpus>\n");
981 printf ("\t Specify `-N 0' to disable generation of the SMP. Specifying `-N 1' will\n");
982 printf ("\t still generate an SMP enabled simulator but will only support one CPU.\n");
984 printf (" -T <mechanism>\n");
985 printf ("\t Override the decode mechanism specified by the decode rules\n");
987 printf (" -P <prefix>\n");
988 printf ("\t Prepend global names (except itable) with the string <prefix>.\n");
989 printf ("\t Specify -P <module>=<prefix> to set the <modules> prefix.\n");
991 printf (" -Werror\n");
992 printf ("\t Make warnings errors\n");
993 printf (" -Wnodiscard\n");
994 printf ("\t Suppress warnings about discarded instructions\n");
996 printf (" -G [!]<gen-option>\n");
997 printf ("\t Any of the following options:\n");
999 printf ("\t decode-duplicate - Override the decode rules, forcing the duplication of\n");
1000 printf ("\t semantic functions\n");
1001 printf ("\t decode-combine - Combine any duplicated entries within a table\n");
1002 printf ("\t decode-zero-reserved - Override the decode rules, forcing reserved bits to be\n");
1003 printf ("\t treated as zero.\n");
1004 printf ("\t decode-switch-is-goto - Overfide the padded-switch code type as a goto-switch\n");
1006 printf ("\t gen-conditional-issue - conditionally issue each instruction\n");
1007 printf ("\t gen-delayed-branch - need both cia and nia passed around\n");
1008 printf ("\t gen-direct-access - use #defines to directly access values\n");
1009 printf ("\t gen-zero-r<N> - arch assumes GPR(<N>) == 0, keep it that way\n");
1010 printf ("\t gen-icache - generate an instruction cracking cache\n");
1011 printf ("\t gen-insn-in-icache - save original instruction when cracking\n");
1012 printf ("\t gen-multi-sim - generate multiple simulators - one per model\n");
1013 printf ("\t By default, a single simulator that will\n");
1014 printf ("\t execute any instruction is generated\n");
1015 printf ("\t gen-multi-word - generate code allowing for multi-word insns\n");
1016 printf ("\t gen-semantic-icache - include semantic code in cracking functions\n");
1017 printf ("\t gen-slot-verification - perform slot verification as part of decode\n");
1018 printf ("\t gen-nia-invalid - NIA defaults to nia_invalid\n");
1019 printf ("\t gen-nia-void - do not compute/return NIA\n");
1021 printf ("\t trace-combine - report combined entries a rule application\n");
1022 printf ("\t trace-entries - report entries after a rules application\n");
1023 printf ("\t trace-rule-rejection - report each rule as rejected\n");
1024 printf ("\t trace-rule-selection - report each rule as selected\n");
1026 printf ("\t field-widths - instruction formats specify widths (depreciated)\n");
1027 printf ("\t By default, an instruction format specifies bit\n");
1028 printf ("\t positions\n");
1029 printf ("\t This option can now be set directly in the\n");
1030 printf ("\t instruction table\n");
1031 printf ("\t jumps - use jumps instead of function calls\n");
1032 printf ("\t omit-line-numbers - do not include line number information in the output\n");
1034 printf ("Input options:\n");
1036 printf (" -k <cache-rules> (depreciated)\n");
1037 printf (" -o <decode-rules>\n");
1038 printf (" -i <instruction-table>\n");
1040 printf ("Output options:\n");
1042 printf (" -x Perform expansion (required)\n");
1043 printf (" -n <real-name> Specify the real name of the next output file\n");
1044 printf (" -h Generate the header (.h) file rather than the body (.c)\n");
1045 printf (" -c <output-file> output icache\n");
1046 printf (" -d <output-file> output idecode\n");
1047 printf (" -e <output-file> output engine\n");
1048 printf (" -f <output-file> output support functions\n");
1049 printf (" -m <output-file> output model\n");
1050 printf (" -r <output-file> output multi-sim run\n");
1051 printf (" -s <output-file> output schematic\n");
1052 printf (" -t <output-file> output itable\n");
1055 while ((ch
= getopt(argc
, argv
,
1056 "B:D:F:G:H:I:M:N:P:T:W:o:k:i:n:hc:d:e:m:r:s:t:f:x"))
1059 fprintf (stderr
, " -%c ", ch
);
1061 fprintf (stderr
, "%s ", optarg
);
1062 fprintf (stderr
, "\\\n");
1068 filter_parse (&options
.model_filter
, optarg
);
1072 if (strcmp (optarg
, "processor-names"))
1075 for (processor
= filter_next (options
.model_filter
, "");
1077 processor
= filter_next (options
.model_filter
, processor
))
1078 lf_printf (standard_out
, "%s\n", processor
);
1081 error (NULL
, "Unknown data structure %s, not dumped\n", optarg
);
1085 filter_parse (&options
.flags_filter
, optarg
);
1089 options
.gen
.icache_size
= a2i (optarg
);
1090 options
.gen
.icache
= 1;
1094 options
.insn_bit_size
= a2i (optarg
);
1095 if (options
.insn_bit_size
<= 0
1096 || options
.insn_bit_size
> max_insn_bit_size
)
1098 error (NULL
, "Instruction bitsize must be in range 1..%d\n",
1101 if (options
.hi_bit_nr
!= options
.insn_bit_size
- 1
1102 && options
.hi_bit_nr
!= 0)
1104 error (NULL
, "Conflict betweem hi-bit-nr and insn-bit-size\n");
1109 options
.hi_bit_nr
= a2i (optarg
);
1110 if (options
.hi_bit_nr
!= options
.insn_bit_size
- 1
1111 && options
.hi_bit_nr
!= 0)
1113 error (NULL
, "Conflict between hi-bit-nr and insn-bit-size\n");
1118 options
.gen
.smp
= a2i (optarg
);
1123 igen_prefix_name
*names
;
1125 chp
= strchr (optarg
, '=');
1128 names
= &options
.prefix
.global
;
1133 chp
= chp
+ 1; /* skip `=' */
1134 if (strncmp (optarg
, "global=", chp
- optarg
) == 0)
1136 names
= &options
.prefix
.global
;
1138 if (strncmp (optarg
, "engine=", chp
- optarg
) == 0)
1140 names
= &options
.prefix
.engine
;
1142 if (strncmp (optarg
, "icache=", chp
- optarg
) == 0)
1144 names
= &options
.prefix
.icache
;
1146 if (strncmp (optarg
, "idecode=", chp
- optarg
) == 0)
1148 names
= &options
.prefix
.idecode
;
1150 if (strncmp (optarg
, "itable=", chp
- optarg
) == 0)
1152 names
= &options
.prefix
.itable
;
1154 if (strncmp (optarg
, "semantics=", chp
- optarg
) == 0)
1156 names
= &options
.prefix
.semantics
;
1158 if (strncmp (optarg
, "support=", chp
- optarg
) == 0)
1160 names
= &options
.prefix
.support
;
1165 error (NULL
, "Prefix `%s' unreconized\n", optarg
);
1168 names
->name
= strdup (chp
);
1169 names
->uname
= strdup (chp
);
1173 *chp
= toupper(*chp
);
1176 if (names
== &options
.prefix
.global
)
1178 options
.prefix
.engine
= options
.prefix
.global
;
1179 options
.prefix
.icache
= options
.prefix
.global
;
1180 options
.prefix
.idecode
= options
.prefix
.global
;
1181 /* options.prefix.itable = options.prefix.global; */
1182 options
.prefix
.semantics
= options
.prefix
.global
;
1183 options
.prefix
.support
= options
.prefix
.global
;
1190 if (strcmp (optarg
, "error") == 0)
1191 options
.warning
= error
;
1192 else if (strcmp (optarg
, "nodiscard") == 0)
1193 options
.warn
.discard
= 0;
1194 else if (strcmp (optarg
, "discard") == 0)
1195 options
.warn
.discard
= 1;
1197 error (NULL
, "Unknown -W argument `%s'\n", optarg
);
1203 if (strcmp (optarg
, "decode-duplicate") == 0)
1205 options
.decode
.duplicate
= 1;
1207 else if (strcmp (optarg
, "decode-combine") == 0)
1209 options
.decode
.combine
= 1;
1211 else if (strcmp (optarg
, "decode-zero-reserved") == 0)
1213 options
.decode
.zero_reserved
= 1;
1216 else if (strcmp (optarg
, "gen-conditional-issue") == 0)
1218 options
.gen
.conditional_issue
= 1;
1220 else if (strcmp (optarg
, "conditional-issue") == 0)
1222 options
.gen
.conditional_issue
= 1;
1223 options
.warning (NULL
, "Option conditional-issue replaced by gen-conditional-issue\n");
1225 else if (strcmp (optarg
, "gen-delayed-branch") == 0)
1227 options
.gen
.delayed_branch
= 1;
1229 else if (strcmp (optarg
, "delayed-branch") == 0)
1231 options
.gen
.delayed_branch
= 1;
1232 options
.warning (NULL
, "Option delayed-branch replaced by gen-delayed-branch\n");
1234 else if (strcmp (optarg
, "gen-direct-access") == 0)
1236 options
.gen
.direct_access
= 1;
1238 else if (strcmp (optarg
, "direct-access") == 0)
1240 options
.gen
.direct_access
= 1;
1241 options
.warning (NULL
, "Option direct-access replaced by gen-direct-access\n");
1243 else if (strncmp (optarg
, "gen-zero-r", strlen ("gen-zero-r")) == 0)
1245 options
.gen
.zero_reg
= 1;
1246 options
.gen
.zero_reg_nr
= atoi (optarg
+ strlen ("gen-zero-r"));
1248 else if (strncmp (optarg
, "zero-r", strlen ("zero-r")) == 0)
1250 options
.gen
.zero_reg
= 1;
1251 options
.gen
.zero_reg_nr
= atoi (optarg
+ strlen ("zero-r"));
1252 options
.warning (NULL
, "Option zero-r<N> replaced by gen-zero-r<N>\n");
1254 else if (strcmp (optarg
, "gen-icache") == 0)
1256 options
.gen
.icache
= 1;
1258 else if (strcmp (optarg
, "gen-insn-in-icache") == 0)
1260 options
.gen
.insn_in_icache
= 1;
1262 else if (strcmp (optarg
, "gen-multi-sim") == 0)
1264 options
.gen
.multi_sim
= 1;
1266 else if (strcmp (optarg
, "gen-multi-word") == 0)
1268 options
.gen
.multi_word
= 1;
1270 else if (strcmp (optarg
, "gen-semantic-icache") == 0)
1272 options
.gen
.semantic_icache
= 1;
1274 else if (strcmp (optarg
, "gen-slot-verification") == 0)
1276 options
.gen
.slot_verification
= 1;
1278 else if (strcmp (optarg
, "verify-slot") == 0)
1280 options
.gen
.slot_verification
= 1;
1281 options
.warning (NULL
, "Option verify-slot replaced by gen-slot-verification\n");
1283 else if (strcmp (optarg
, "gen-nia-invalid") == 0)
1285 options
.gen
.nia
= nia_is_invalid
;
1287 else if (strcmp (optarg
, "default-nia-minus-one") == 0)
1289 options
.gen
.nia
= nia_is_invalid
;
1290 options
.warning (NULL
, "Option default-nia-minus-one replaced by gen-nia-invalid\n");
1292 else if (strcmp (optarg
, "gen-nia-void") == 0)
1294 options
.gen
.nia
= nia_is_void
;
1296 else if (strcmp (optarg
, "trace-combine") == 0)
1298 options
.trace
.combine
= 1;
1300 else if (strcmp (optarg
, "trace-entries") == 0)
1302 options
.trace
.entries
= 1;
1304 else if (strcmp (optarg
, "trace-rule-rejection") == 0)
1306 options
.trace
.rule_rejection
= 1;
1308 else if (strcmp (optarg
, "trace-rule-selection") == 0)
1310 options
.trace
.rule_selection
= 1;
1312 else if (strcmp (optarg
, "jumps") == 0)
1314 options
.gen
.code
= generate_jumps
;
1316 else if (strcmp (optarg
, "field-widths") == 0)
1318 options
.insn_specifying_widths
= 1;
1320 else if (strcmp (optarg
, "omit-line-numbers") == 0)
1322 file_references
= lf_omit_references
;
1325 error (NULL
, "Unknown option %s\n", optarg
);
1329 isa
= load_insn_table (optarg
, cache_rules
);
1330 if (isa
->illegal_insn
== NULL
)
1331 error (NULL
, "illegal-instruction missing from insn table\n");
1335 gen
= do_gen (isa
, decode_rules
);
1339 decode_rules
= load_decode_table (optarg
);
1344 error (NULL
, "Cache file must appear before the insn file\n");
1345 cache_rules
= load_cache_table (optarg
);
1349 real_file_name
= strdup(optarg
);
1365 lf
*file
= lf_open(optarg
, real_file_name
, file_references
,
1366 (is_header
? lf_is_h
: lf_is_c
),
1368 if (gen
== NULL
&& ch
!= 't' && ch
!= 'm' && ch
!= 'f')
1370 options
.warning (NULL
, "Explicitly generate tables with -x option\n");
1371 gen
= do_gen (isa
, decode_rules
);
1373 lf_print__file_start(file
);
1378 gen_model_h (file
, isa
);
1380 gen_model_c (file
, isa
);
1384 gen_itable_h (file
, isa
);
1386 gen_itable_c (file
, isa
);
1390 gen_support_h (file
, isa
);
1392 gen_support_c (file
, isa
);
1396 options
.warning (NULL
, "-hr option ignored\n");
1398 gen_run_c (file
, gen
);
1402 gen_semantics_h (file
, gen
->semantics
, isa
->max_nr_words
);
1404 gen_semantics_c (file
, gen
->semantics
, isa
->caches
);
1408 gen_idecode_h (file
, gen
, isa
, cache_rules
);
1410 gen_idecode_c (file
, gen
, isa
, cache_rules
);
1414 gen_engine_h (file
, gen
, isa
, cache_rules
);
1416 gen_engine_c (file
, gen
, isa
, cache_rules
);
1431 lf_print__file_finish(file
);
1435 real_file_name
= NULL
;
1438 ERROR ("Bad switch");