1 /* CPU family header for iq2000bf.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright 1996-2010, 2012 Free Software Foundation, Inc.
7 This file is part of the GNU simulators.
9 This file is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
25 #ifndef CPU_IQ2000BF_H
26 #define CPU_IQ2000BF_H
28 /* Maximum number of instructions that are fetched at a time.
29 This is for LIW type instructions sets (e.g. m32r). */
30 #define MAX_LIW_INSNS 1
32 /* Maximum number of instructions that can be executed in parallel. */
33 #define MAX_PARALLEL_INSNS 1
35 /* The size of an "int" needed to hold an instruction word.
36 This is usually 32 bits, but some architectures needs 64 bits. */
37 typedef CGEN_INSN_INT CGEN_INSN_WORD
;
39 #include "cgen-engine.h"
41 /* CPU state information. */
43 /* Hardware elements. */
47 #define GET_H_PC() get_h_pc (current_cpu)
50 set_h_pc (current_cpu, (x));\
52 /* General purpose registers */
54 #define GET_H_GR(index) (((index) == (0))) ? (0) : (CPU (h_gr[index]))
55 #define SET_H_GR(index, x) \
57 if ((((index)) == (0))) {\
61 CPU (h_gr[(index)]) = (x);\
65 #define CPU_CGEN_HW(cpu) (& (cpu)->cpu_data.hardware)
68 /* Cover fns for register access. */
69 USI
iq2000bf_h_pc_get (SIM_CPU
*);
70 void iq2000bf_h_pc_set (SIM_CPU
*, USI
);
71 SI
iq2000bf_h_gr_get (SIM_CPU
*, UINT
);
72 void iq2000bf_h_gr_set (SIM_CPU
*, UINT
, SI
);
74 /* These must be hand-written. */
75 extern CPUREG_FETCH_FN iq2000bf_fetch_register
;
76 extern CPUREG_STORE_FN iq2000bf_store_register
;
82 /* Instruction argument buffer. */
85 struct { /* no operands */
115 /* Writeback handler. */
117 /* Pointer to argbuf entry for insn whose results need writing back. */
118 const struct argbuf
*abuf
;
120 /* x-before handler */
122 /*const SCACHE *insns[MAX_PARALLEL_INSNS];*/
125 /* x-after handler */
129 /* This entry is used to terminate each pbb. */
131 /* Number of insns in pbb. */
133 /* Next pbb to execute. */
135 SCACHE
*branch_target
;
140 /* The ARGBUF struct. */
142 /* These are the baseclass definitions. */
147 /* ??? Temporary hack for skip insns. */
150 /* cpu specific data follows */
153 union sem_fields fields
;
158 ??? SCACHE used to contain more than just argbuf. We could delete the
159 type entirely and always just use ARGBUF, but for future concerns and as
160 a level of abstraction it is left in. */
163 struct argbuf argbuf
;
166 /* Macros to simplify extraction, reading and semantic code.
167 These define and assign the local vars that contain the insn's fields. */
169 #define EXTRACT_IFMT_EMPTY_VARS \
171 #define EXTRACT_IFMT_EMPTY_CODE \
174 #define EXTRACT_IFMT_ADD_VARS \
182 #define EXTRACT_IFMT_ADD_CODE \
184 f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
185 f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
186 f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
187 f_rd = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
188 f_shamt = EXTRACT_LSB0_UINT (insn, 32, 10, 5); \
189 f_func = EXTRACT_LSB0_UINT (insn, 32, 5, 6); \
191 #define EXTRACT_IFMT_ADDI_VARS \
197 #define EXTRACT_IFMT_ADDI_CODE \
199 f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
200 f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
201 f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
202 f_imm = EXTRACT_LSB0_UINT (insn, 32, 15, 16); \
204 #define EXTRACT_IFMT_RAM_VARS \
213 #define EXTRACT_IFMT_RAM_CODE \
215 f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
216 f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
217 f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
218 f_rd = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
219 f_shamt = EXTRACT_LSB0_UINT (insn, 32, 10, 5); \
220 f_5 = EXTRACT_LSB0_UINT (insn, 32, 5, 1); \
221 f_maskl = EXTRACT_LSB0_UINT (insn, 32, 4, 5); \
223 #define EXTRACT_IFMT_SLL_VARS \
231 #define EXTRACT_IFMT_SLL_CODE \
233 f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
234 f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
235 f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
236 f_rd = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
237 f_shamt = EXTRACT_LSB0_UINT (insn, 32, 10, 5); \
238 f_func = EXTRACT_LSB0_UINT (insn, 32, 5, 6); \
240 #define EXTRACT_IFMT_SLMV_VARS \
248 #define EXTRACT_IFMT_SLMV_CODE \
250 f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
251 f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
252 f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
253 f_rd = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
254 f_shamt = EXTRACT_LSB0_UINT (insn, 32, 10, 5); \
255 f_func = EXTRACT_LSB0_UINT (insn, 32, 5, 6); \
257 #define EXTRACT_IFMT_SLTI_VARS \
263 #define EXTRACT_IFMT_SLTI_CODE \
265 f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
266 f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
267 f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
268 f_imm = EXTRACT_LSB0_UINT (insn, 32, 15, 16); \
270 #define EXTRACT_IFMT_BBI_VARS \
276 #define EXTRACT_IFMT_BBI_CODE \
278 f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
279 f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
280 f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
281 f_offset = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (((pc) + (4)))); \
283 #define EXTRACT_IFMT_BBV_VARS \
289 #define EXTRACT_IFMT_BBV_CODE \
291 f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
292 f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
293 f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
294 f_offset = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (((pc) + (4)))); \
296 #define EXTRACT_IFMT_BGEZ_VARS \
302 #define EXTRACT_IFMT_BGEZ_CODE \
304 f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
305 f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
306 f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
307 f_offset = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (((pc) + (4)))); \
309 #define EXTRACT_IFMT_JALR_VARS \
317 #define EXTRACT_IFMT_JALR_CODE \
319 f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
320 f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
321 f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
322 f_rd = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
323 f_shamt = EXTRACT_LSB0_UINT (insn, 32, 10, 5); \
324 f_func = EXTRACT_LSB0_UINT (insn, 32, 5, 6); \
326 #define EXTRACT_IFMT_JR_VARS \
334 #define EXTRACT_IFMT_JR_CODE \
336 f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
337 f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
338 f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
339 f_rd = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
340 f_shamt = EXTRACT_LSB0_UINT (insn, 32, 10, 5); \
341 f_func = EXTRACT_LSB0_UINT (insn, 32, 5, 6); \
343 #define EXTRACT_IFMT_LB_VARS \
349 #define EXTRACT_IFMT_LB_CODE \
351 f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
352 f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
353 f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
354 f_imm = EXTRACT_LSB0_UINT (insn, 32, 15, 16); \
356 #define EXTRACT_IFMT_LUI_VARS \
362 #define EXTRACT_IFMT_LUI_CODE \
364 f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
365 f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
366 f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
367 f_imm = EXTRACT_LSB0_UINT (insn, 32, 15, 16); \
369 #define EXTRACT_IFMT_BREAK_VARS \
377 #define EXTRACT_IFMT_BREAK_CODE \
379 f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
380 f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
381 f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
382 f_rd = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
383 f_shamt = EXTRACT_LSB0_UINT (insn, 32, 10, 5); \
384 f_func = EXTRACT_LSB0_UINT (insn, 32, 5, 6); \
386 #define EXTRACT_IFMT_SYSCALL_VARS \
391 #define EXTRACT_IFMT_SYSCALL_CODE \
393 f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
394 f_excode = EXTRACT_LSB0_UINT (insn, 32, 25, 20); \
395 f_func = EXTRACT_LSB0_UINT (insn, 32, 5, 6); \
397 #define EXTRACT_IFMT_ANDOUI_VARS \
403 #define EXTRACT_IFMT_ANDOUI_CODE \
405 f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
406 f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
407 f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
408 f_imm = EXTRACT_LSB0_UINT (insn, 32, 15, 16); \
410 #define EXTRACT_IFMT_MRGB_VARS \
419 #define EXTRACT_IFMT_MRGB_CODE \
421 f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
422 f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
423 f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
424 f_rd = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
425 f_10 = EXTRACT_LSB0_UINT (insn, 32, 10, 1); \
426 f_mask = EXTRACT_LSB0_UINT (insn, 32, 9, 4); \
427 f_func = EXTRACT_LSB0_UINT (insn, 32, 5, 6); \
429 #define EXTRACT_IFMT_BC0F_VARS \
435 #define EXTRACT_IFMT_BC0F_CODE \
437 f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
438 f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
439 f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
440 f_offset = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (((pc) + (4)))); \
442 #define EXTRACT_IFMT_CFC0_VARS \
449 #define EXTRACT_IFMT_CFC0_CODE \
451 f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
452 f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
453 f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
454 f_rd = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
455 f_10_11 = EXTRACT_LSB0_UINT (insn, 32, 10, 11); \
457 #define EXTRACT_IFMT_CHKHDR_VARS \
465 #define EXTRACT_IFMT_CHKHDR_CODE \
467 f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
468 f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
469 f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
470 f_rd = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
471 f_shamt = EXTRACT_LSB0_UINT (insn, 32, 10, 5); \
472 f_func = EXTRACT_LSB0_UINT (insn, 32, 5, 6); \
474 #define EXTRACT_IFMT_LULCK_VARS \
482 #define EXTRACT_IFMT_LULCK_CODE \
484 f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
485 f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
486 f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
487 f_rd = EXTRACT_LSB0_UINT (insn, 32, 15, 5); \
488 f_shamt = EXTRACT_LSB0_UINT (insn, 32, 10, 5); \
489 f_func = EXTRACT_LSB0_UINT (insn, 32, 5, 6); \
491 #define EXTRACT_IFMT_PKRLR1_VARS \
498 #define EXTRACT_IFMT_PKRLR1_CODE \
500 f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
501 f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
502 f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
503 f_count = EXTRACT_LSB0_UINT (insn, 32, 15, 7); \
504 f_index = EXTRACT_LSB0_UINT (insn, 32, 8, 9); \
506 #define EXTRACT_IFMT_RFE_VARS \
512 #define EXTRACT_IFMT_RFE_CODE \
514 f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
515 f_25 = EXTRACT_LSB0_UINT (insn, 32, 25, 1); \
516 f_24_19 = EXTRACT_LSB0_UINT (insn, 32, 24, 19); \
517 f_func = EXTRACT_LSB0_UINT (insn, 32, 5, 6); \
519 #define EXTRACT_IFMT_J_VARS \
524 #define EXTRACT_IFMT_J_CODE \
526 f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
527 f_rsrvd = EXTRACT_LSB0_UINT (insn, 32, 25, 10); \
528 f_jtarg = ((((pc) & (0xf0000000))) | (((EXTRACT_LSB0_UINT (insn, 32, 15, 16)) << (2)))); \
530 /* Collection of various things for the trace handler to use. */
532 typedef struct trace_record
{
537 #endif /* CPU_IQ2000BF_H */