sim/lm32/lm32.c

   1 /* Lattice Mico32 simulator support code.
   2    Contributed by Jon Beniston <jon@beniston.com>
   3
   4    Copyright (C) 2009-2023 Free Software Foundation, Inc.
   5
   6    This file is part of GDB.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  20
  21 /* This must come before any other includes.  */
  22 #include "defs.h"
  23
  24 #define WANT_CPU lm32bf
  25 #define WANT_CPU_LM32BF
  26
  27 #include "sim-main.h"
  28 #include "cgen-mem.h"
  29 #include "cgen-ops.h"
  30
  31 /* The contents of BUF are in target byte order.  */
  32
  33 int
  34 lm32bf_fetch_register (SIM_CPU * current_cpu, int rn, void *buf, int len)
  35 {
  36   if (rn < 32)
  37     SETTSI (buf, lm32bf_h_gr_get (current_cpu, rn));
  38   else
  39     switch (rn)
  40       {
  41       case SIM_LM32_PC_REGNUM:
  42         SETTSI (buf, lm32bf_h_pc_get (current_cpu));
  43         break;
  44       default:
  45         return 0;
  46       }
  47
  48   return -1;
  49 }
  50
  51 /* The contents of BUF are in target byte order.  */
  52
  53 int
  54 lm32bf_store_register (SIM_CPU * current_cpu, int rn, const void *buf, int len)
  55 {
  56   if (rn < 32)
  57     lm32bf_h_gr_set (current_cpu, rn, GETTSI (buf));
  58   else
  59     switch (rn)
  60       {
  61       case SIM_LM32_PC_REGNUM:
  62         lm32bf_h_pc_set (current_cpu, GETTSI (buf));
  63         break;
  64       default:
  65         return 0;
  66       }
  67
  68   return -1;
  69 }
  70
  71
  72
  73 #if WITH_PROFILE_MODEL_P
  74
  75 /* Initialize cycle counting for an insn.
  76    FIRST_P is non-zero if this is the first insn in a set of parallel
  77    insns.  */
  78
  79 void
  80 lm32bf_model_insn_before (SIM_CPU * cpu, int first_p)
  81 {
  82 }
  83
  84 /* Record the cycles computed for an insn.
  85    LAST_P is non-zero if this is the last insn in a set of parallel insns,
  86    and we update the total cycle count.
  87    CYCLES is the cycle count of the insn.  */
  88
  89 void
  90 lm32bf_model_insn_after (SIM_CPU * cpu, int last_p, int cycles)
  91 {
  92 }
  93
  94 int
  95 lm32bf_model_lm32_u_exec (SIM_CPU * cpu, const IDESC * idesc,
  96                           int unit_num, int referenced)
  97 {
  98   return idesc->timing->units[unit_num].done;
  99 }
 100
 101 #endif /* WITH_PROFILE_MODEL_P */