* sim/sky/vu01reg-main.c: New file.
[binutils-gdb.git] / sim / m32r / Makefile.in
1 # Makefile template for Configure for the m32r simulator
2 # Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
3 # Contributed by Cygnus Support.
4 #
5 # This file is part of GDB, the GNU debugger.
6 #
7 # This program is free software; you can redistribute it and/or modify
8 # it under the terms of the GNU General Public License as published by
9 # the Free Software Foundation; either version 2 of the License, or
10 # (at your option) any later version.
11 #
12 # This program is distributed in the hope that it will be useful,
13 # but WITHOUT ANY WARRANTY; without even the implied warranty of
14 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 # GNU General Public License for more details.
16 #
17 # You should have received a copy of the GNU General Public License along
18 # with this program; if not, write to the Free Software Foundation, Inc.,
19 # 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20
21 ## COMMON_PRE_CONFIG_FRAG
22
23 M32R_OBJS = m32r.o cpu.o decode.o extract.o sem.o model.o mloop.o
24 # start-sanitize-m32rx
25 M32RX_OBJS = m32rx.o cpux.o decodex.o semx.o modelx.o mloopx.o
26 # end-sanitize-m32rx
27
28 CONFIG_DEVICES = dv-sockser.o
29 CONFIG_DEVICES =
30
31 SIM_OBJS = \
32 $(SIM_NEW_COMMON_OBJS) \
33 sim-cpu.o \
34 sim-engine.o \
35 sim-hload.o \
36 sim-hrw.o \
37 sim-model.o \
38 sim-reason.o \
39 cgen-utils.o cgen-trace.o cgen-scache.o \
40 sim-if.o arch.o \
41 $(M32R_OBJS) \
42 $(start-sanitize-m32rx) \
43 $(M32RX_OBJS) \
44 $(end-sanitize-m32rx) \
45 traps.o devices.o \
46 $(CONFIG_DEVICES)
47
48 # Extra headers included by sim-main.h.
49 SIM_EXTRA_DEPS = \
50 $(srcdir)/../common/cgen-types.h \
51 $(srcdir)/../common/cgen-sim.h \
52 $(srcdir)/../common/cgen-trace.h \
53 arch.h cpuall.h m32r-sim.h cpu-opc.h
54
55 SIM_EXTRA_CFLAGS =
56
57 SIM_RUN_OBJS = nrun.o
58 SIM_EXTRA_CLEAN = m32r-clean
59
60 # This selects the m32r newlib/libgloss syscall definitions.
61 NL_TARGET = -DNL_TARGET_m32r
62
63 ## COMMON_POST_CONFIG_FRAG
64
65 arch = m32r
66
67 MAIN_INCLUDE_DEPS = \
68 sim-main.h \
69 $(srcdir)/../common/sim-config.h \
70 $(srcdir)/../common/sim-base.h \
71 $(srcdir)/../common/sim-basics.h \
72 $(srcdir)/../common/sim-module.h \
73 $(srcdir)/../common/sim-trace.h \
74 $(srcdir)/../common/sim-profile.h \
75 tconfig.h
76 INCLUDE_DEPS = $(MAIN_INCLUDE_DEPS) $(SIM_EXTRA_DEPS) cpu-sim.h
77 OPS_INCLUDE_DEPS = \
78 $(srcdir)/../common/cgen-mem.h \
79 $(srcdir)/../common/cgen-ops.h
80
81 sim-if.o: sim-if.c $(INCLUDE_DEPS) $(srcdir)/../common/sim-core.h
82
83 arch.o: arch.c $(INCLUDE_DEPS)
84
85 devices.o: devices.c $(INCLUDE_DEPS)
86
87 # M32R objs
88
89 m32r.o: m32r.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
90
91 # FIXME: Use of `mono' is wip.
92 mloop.c: $(srcdir)/../common/genmloop.sh mloop.in Makefile
93 rm -f mloop.c
94 $(SHELL) $(srcdir)/../common/genmloop.sh $(SHELL) \
95 -mono -scache -fast m32r $(srcdir)/mloop.in \
96 | sed -e 's/@cpu@/m32r/' -e 's/@CPU@/M32R/' >mloop.c
97 mloop.o: mloop.c sem-switch.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
98
99 cpu.o: cpu.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h
100 decode.o: decode.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
101 extract.o: extract.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
102 $(CC) -c $(srcdir)/extract.c $(ALL_CFLAGS) -DSCACHE_P
103 sem.o: sem.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
104 $(CC) -c $(srcdir)/sem.c $(ALL_CFLAGS) -DSCACHE_P
105 model.o: model.c $(INCLUDE_DEPS) cpu.h decode.h
106
107 #sem-cache.o: sem.c decode.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h
108 # $(CC) -c $(srcdir)/sem.c -o sem-cache.o -DSCACHE_P $(ALL_CFLAGS)
109
110 # start-sanitize-m32rx
111 # M32RX objs
112
113 m32rx.o: m32rx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
114
115 # FIXME: Use of `mono' is wip.
116 mloopx.c: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
117 rm -f mloopx.c
118 $(SHELL) $(srcdir)/../common/genmloop.sh $(SHELL) \
119 -mono -no-scache -no-fast -parallel \
120 m32r $(srcdir)/mloopx.in \
121 | sed -e 's/@cpu@/m32rx/' -e 's/@CPU@/M32RX/' >mloopx.c
122 mloopx.o: mloopx.c readx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
123
124 cpux.o: cpux.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
125 decodex.o: decodex.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
126 semx.o: semx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
127 modelx.o: modelx.c $(INCLUDE_DEPS) cpux.h decodex.h
128 # end-sanitize-m32rx
129
130 m32r-clean:
131 rm -f mloop.c stamp-arch stamp-cpu stamp-decode
132 # start-sanitize-m32rx
133 rm -f mloopx.c stamp-xcpu stamp-xdecode
134 # end-sanitize-m32rx
135 rm -f tmp-*
136
137 # start-sanitize-cygnus
138 # cgen support, enable with --enable-cgen-maint
139 CGEN_MAINT = ; @true
140 # The following line is commented in or out depending upon --enable-cgen-maint.
141 @cgen_maint@CGEN_MAINT =
142
143 stamp-arch: $(CGEN_MAIN_SCM) $(srccgen)/m32r.cpu
144 $(MAKE) cgen-arch
145 touch stamp-arch
146 arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
147 @true
148
149 stamp-cpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(srccgen)/m32r.cpu
150 $(MAKE) cgen-cpu cpu=m32r mach=m32r SUFFIX= FLAGS="with-scache,with-profile fn" EXTRAFILES="$(CGEN_CPU_EXTR) $(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
151 touch stamp-cpu
152 cpu.h extract.c sem.c sem-switch.c model.c: $(CGEN_MAINT) stamp-cpu
153 @true
154
155 stamp-decode: $(CGEN_MAIN_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
156 $(MAKE) cgen-decode cpu=m32r mach=m32r SUFFIX= FLAGS="with-scache,with-profile fn"
157 touch stamp-decode
158 decode.h decode.c: $(CGEN_MAINT) stamp-decode
159 @true
160 # end-sanitize-cygnus
161
162 # start-sanitize-m32rx
163 stamp-xcpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(srccgen)/m32r.cpu
164 $(MAKE) cgen-cpu cpu=m32rx mach=m32rx SUFFIX=x FLAGS="with-profile fn" EXTRAFILES="$(CGEN_CPU_READ) $(CGEN_CPU_SEM)"
165 touch stamp-xcpu
166 cpux.h readx.c semx.c modelx.c: $(CGEN_MAINT) stamp-xcpu
167 @true
168
169 stamp-xdecode: $(CGEN_MAIN_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
170 $(MAKE) cgen-decode cpu=m32rx mach=m32rx SUFFIX=x
171 touch stamp-xdecode
172 decodex.h decodex.c: $(CGEN_MAINT) stamp-xdecode
173 @true
174 # end-sanitize-m32rx