* Makefile.in (INCLUDE_DEPS): Add include/opcode/cgen.h.
[binutils-gdb.git] / sim / m32r / Makefile.in
1 # Makefile template for Configure for the m32r simulator
2 # Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
3 # Contributed by Cygnus Support.
4 #
5 # This file is part of GDB, the GNU debugger.
6 #
7 # This program is free software; you can redistribute it and/or modify
8 # it under the terms of the GNU General Public License as published by
9 # the Free Software Foundation; either version 2 of the License, or
10 # (at your option) any later version.
11 #
12 # This program is distributed in the hope that it will be useful,
13 # but WITHOUT ANY WARRANTY; without even the implied warranty of
14 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 # GNU General Public License for more details.
16 #
17 # You should have received a copy of the GNU General Public License along
18 # with this program; if not, write to the Free Software Foundation, Inc.,
19 # 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20
21 ## COMMON_PRE_CONFIG_FRAG
22
23 M32R_OBJS = m32r.o cpu.o decode.o extract.o sem.o model.o mloop.o
24 # start-sanitize-m32rx
25 M32RX_OBJS = m32rx.o cpux.o decodex.o semx.o modelx.o mloopx.o
26 # end-sanitize-m32rx
27
28 CONFIG_DEVICES = dv-sockser.o
29 CONFIG_DEVICES =
30
31 SIM_OBJS = \
32 $(SIM_NEW_COMMON_OBJS) \
33 sim-cpu.o \
34 sim-engine.o \
35 sim-hload.o \
36 sim-hrw.o \
37 sim-model.o \
38 sim-reason.o \
39 cgen-utils.o cgen-trace.o cgen-scache.o \
40 sim-if.o arch.o \
41 $(M32R_OBJS) \
42 $(start-sanitize-m32rx) \
43 $(M32RX_OBJS) \
44 $(end-sanitize-m32rx) \
45 traps.o devices.o \
46 $(CONFIG_DEVICES)
47
48 # Extra headers included by sim-main.h.
49 SIM_EXTRA_DEPS = \
50 $(srcdir)/../common/cgen-types.h \
51 $(srcdir)/../common/cgen-sim.h \
52 $(srcdir)/../common/cgen-trace.h \
53 arch.h cpuall.h m32r-sim.h cpu-opc.h
54
55 SIM_EXTRA_CFLAGS =
56
57 SIM_RUN_OBJS = nrun.o
58 SIM_EXTRA_CLEAN = m32r-clean
59
60 # This selects the m32r newlib/libgloss syscall definitions.
61 NL_TARGET = -DNL_TARGET_m32r
62
63 ## COMMON_POST_CONFIG_FRAG
64
65 arch = m32r
66
67 MAIN_INCLUDE_DEPS = \
68 sim-main.h \
69 $(srcdir)/../common/sim-config.h \
70 $(srcdir)/../common/sim-base.h \
71 $(srcdir)/../common/sim-basics.h \
72 $(srcdir)/../common/sim-module.h \
73 $(srcdir)/../common/sim-trace.h \
74 $(srcdir)/../common/sim-profile.h \
75 tconfig.h
76 INCLUDE_DEPS = $(MAIN_INCLUDE_DEPS) $(SIM_EXTRA_DEPS) cpu-sim.h \
77 $(srcdir)/../../include/opcode/cgen.h
78 OPS_INCLUDE_DEPS = \
79 $(srcdir)/../common/cgen-mem.h \
80 $(srcdir)/../common/cgen-ops.h
81
82 sim-if.o: sim-if.c $(INCLUDE_DEPS) $(srcdir)/../common/sim-core.h
83
84 arch.o: arch.c $(INCLUDE_DEPS)
85
86 devices.o: devices.c $(INCLUDE_DEPS)
87
88 # M32R objs
89
90 m32r.o: m32r.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
91
92 # FIXME: Use of `mono' is wip.
93 mloop.c: $(srcdir)/../common/genmloop.sh mloop.in Makefile
94 rm -f mloop.c
95 $(SHELL) $(srcdir)/../common/genmloop.sh $(SHELL) \
96 -mono -scache -fast m32r $(srcdir)/mloop.in \
97 | sed -e 's/@cpu@/m32r/' -e 's/@CPU@/M32R/' >mloop.c
98 mloop.o: mloop.c sem-switch.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
99
100 cpu.o: cpu.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h
101 decode.o: decode.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
102 extract.o: extract.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
103 $(CC) -c $(srcdir)/extract.c $(ALL_CFLAGS) -DSCACHE_P
104 sem.o: sem.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
105 $(CC) -c $(srcdir)/sem.c $(ALL_CFLAGS) -DSCACHE_P
106 model.o: model.c $(INCLUDE_DEPS) cpu.h decode.h
107
108 #sem-cache.o: sem.c decode.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h
109 # $(CC) -c $(srcdir)/sem.c -o sem-cache.o -DSCACHE_P $(ALL_CFLAGS)
110
111 # start-sanitize-m32rx
112 # M32RX objs
113
114 m32rx.o: m32rx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
115
116 # FIXME: Use of `mono' is wip.
117 mloopx.c: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
118 rm -f mloopx.c
119 $(SHELL) $(srcdir)/../common/genmloop.sh $(SHELL) \
120 -mono -no-scache -no-fast -parallel \
121 m32r $(srcdir)/mloopx.in \
122 | sed -e 's/@cpu@/m32rx/' -e 's/@CPU@/M32RX/' >mloopx.c
123 mloopx.o: mloopx.c readx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
124
125 cpux.o: cpux.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
126 decodex.o: decodex.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
127 semx.o: semx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
128 modelx.o: modelx.c $(INCLUDE_DEPS) cpux.h decodex.h
129 # end-sanitize-m32rx
130
131 m32r-clean:
132 rm -f mloop.c stamp-arch stamp-cpu stamp-decode
133 # start-sanitize-m32rx
134 rm -f mloopx.c stamp-xcpu stamp-xdecode
135 # end-sanitize-m32rx
136 rm -f tmp-*
137
138 # start-sanitize-cygnus
139 # cgen support, enable with --enable-cgen-maint
140 CGEN_MAINT = ; @true
141 # The following line is commented in or out depending upon --enable-cgen-maint.
142 @CGEN_MAINT@CGEN_MAINT =
143
144 stamp-arch: $(CGEN_MAIN_SCM) $(srccgen)/m32r.cpu
145 $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS)
146 touch stamp-arch
147 arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
148 @true
149
150 stamp-cpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(srccgen)/m32r.cpu
151 $(MAKE) cgen-cpu $(CGEN_FLAGS_TO_PASS) \
152 cpu=m32r mach=m32r SUFFIX= FLAGS="with-scache,with-profile fn" EXTRAFILES="$(CGEN_CPU_EXTR) $(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
153 touch stamp-cpu
154 cpu.h extract.c sem.c sem-switch.c model.c: $(CGEN_MAINT) stamp-cpu
155 @true
156
157 stamp-decode: $(CGEN_MAIN_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
158 $(MAKE) cgen-decode $(CGEN_FLAGS_TO_PASS) \
159 cpu=m32r mach=m32r SUFFIX= FLAGS="with-scache,with-profile fn"
160 touch stamp-decode
161 decode.h decode.c: $(CGEN_MAINT) stamp-decode
162 @true
163 # end-sanitize-cygnus
164
165 # start-sanitize-m32rx
166 stamp-xcpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(srccgen)/m32r.cpu
167 $(MAKE) cgen-cpu $(CGEN_FLAGS_TO_PASS) \
168 cpu=m32rx mach=m32rx SUFFIX=x FLAGS="with-profile fn" EXTRAFILES="$(CGEN_CPU_READ) $(CGEN_CPU_SEM)"
169 touch stamp-xcpu
170 cpux.h readx.c semx.c modelx.c: $(CGEN_MAINT) stamp-xcpu
171 @true
172
173 stamp-xdecode: $(CGEN_MAIN_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
174 $(MAKE) cgen-decode $(CGEN_FLAGS_TO_PASS) \
175 cpu=m32rx mach=m32rx SUFFIX=x
176 touch stamp-xdecode
177 decodex.h decodex.c: $(CGEN_MAINT) stamp-xdecode
178 @true
179 # end-sanitize-m32rx