sim/m32r/Makefile.in

   1 # Makefile template for Configure for the m32r simulator
   2 # Copyright (C) 1996-2015 Free Software Foundation, Inc.
   3 # Contributed by Cygnus Support.
   4 #
   5 # This file is part of GDB, the GNU debugger.
   6 #
   7 # This program is free software; you can redistribute it and/or modify
   8 # it under the terms of the GNU General Public License as published by
   9 # the Free Software Foundation; either version 3 of the License, or
  10 # (at your option) any later version.
  11 #
  12 # This program is distributed in the hope that it will be useful,
  13 # but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 # GNU General Public License for more details.
  16 #
  17 # You should have received a copy of the GNU General Public License
  18 # along with this program.  If not, see <http://www.gnu.org/licenses/>.
  19
  20 ## COMMON_PRE_CONFIG_FRAG
  21
  22 M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o
  23 M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o
  24 M32R2_OBJS = m32r2.o cpu2.o decode2.o model2.o mloop2.o
  25 TRAPS_OBJ = @traps_obj@
  26
  27 SIM_OBJS = \
  28         $(SIM_NEW_COMMON_OBJS) \
  29         sim-cpu.o \
  30         sim-hload.o \
  31         sim-hrw.o \
  32         sim-model.o \
  33         sim-reg.o \
  34         cgen-utils.o cgen-trace.o cgen-scache.o \
  35         cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
  36         sim-if.o arch.o \
  37         $(M32R_OBJS) \
  38         $(M32RX_OBJS) \
  39         $(M32R2_OBJS) \
  40         $(TRAPS_OBJ) \
  41         devices.o
  42
  43 # Extra headers included by sim-main.h.
  44 SIM_EXTRA_DEPS = \
  45         $(CGEN_INCLUDE_DEPS) \
  46         arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.h
  47
  48 SIM_EXTRA_CFLAGS = @sim_extra_cflags@
  49
  50 SIM_RUN_OBJS = nrun.o
  51 SIM_EXTRA_CLEAN = m32r-clean
  52
  53 # This selects the m32r newlib/libgloss syscall definitions.
  54 NL_TARGET = -DNL_TARGET_m32r
  55
  56 ## COMMON_POST_CONFIG_FRAG
  57
  58 arch = m32r
  59
  60 sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h
  61
  62 arch.o: arch.c $(SIM_MAIN_DEPS)
  63
  64 traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS)
  65 traps-linux.o: traps.c syscall.h targ-vals.h $(SIM_MAIN_DEPS)
  66 devices.o: devices.c $(SIM_MAIN_DEPS)
  67
  68 # M32R objs
  69
  70 M32RBF_INCLUDE_DEPS = \
  71         $(CGEN_MAIN_CPU_DEPS) \
  72         cpu.h decode.h eng.h
  73
  74 m32r.o: m32r.c $(M32RBF_INCLUDE_DEPS)
  75
  76 # FIXME: Use of `mono' is wip.
  77 mloop.c eng.h: stamp-mloop ; @true
  78 stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
  79         $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
  80                 -mono -fast -pbb -switch sem-switch.c \
  81                 -cpu m32rbf -infile $(srcdir)/mloop.in
  82         $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
  83         $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
  84         touch stamp-mloop
  85 mloop.o: mloop.c sem-switch.c $(M32RBF_INCLUDE_DEPS)
  86
  87 cpu.o: cpu.c $(M32RBF_INCLUDE_DEPS)
  88 decode.o: decode.c $(M32RBF_INCLUDE_DEPS)
  89 sem.o: sem.c $(M32RBF_INCLUDE_DEPS)
  90 model.o: model.c $(M32RBF_INCLUDE_DEPS)
  91
  92 # M32RX objs
  93
  94 M32RXF_INCLUDE_DEPS = \
  95         $(CGEN_MAIN_CPU_DEPS) \
  96         cpux.h decodex.h engx.h
  97
  98 m32rx.o: m32rx.c $(M32RXF_INCLUDE_DEPS)
  99
 100 # FIXME: Use of `mono' is wip.
 101 mloopx.c engx.h: stamp-xmloop ; @true
 102 stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
 103         $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 104                 -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
 105                 -cpu m32rxf -infile $(srcdir)/mloopx.in \
 106                 -outfile-suffix x
 107         $(SHELL) $(srcroot)/move-if-change engx.hin engx.h
 108         $(SHELL) $(srcroot)/move-if-change mloopx.cin mloopx.c
 109         touch stamp-xmloop
 110 mloopx.o: mloopx.c semx-switch.c $(M32RXF_INCLUDE_DEPS)
 111
 112 cpux.o: cpux.c $(M32RXF_INCLUDE_DEPS)
 113 decodex.o: decodex.c $(M32RXF_INCLUDE_DEPS)
 114 semx.o: semx.c $(M32RXF_INCLUDE_DEPS)
 115 modelx.o: modelx.c $(M32RXF_INCLUDE_DEPS)
 116
 117 # M32R2 objs
 118
 119 M32R2F_INCLUDE_DEPS = \
 120         $(CGEN_MAIN_CPU_DEPS) \
 121         cpu2.h decode2.h eng2.h
 122
 123 m32r2.o: m32r2.c $(M32R2F_INCLUDE_DEPS)
 124
 125 # FIXME: Use of `mono' is wip.
 126 mloop2.c eng2.h: stamp-2mloop ; @true
 127 stamp-2mloop: $(srcdir)/../common/genmloop.sh mloop2.in Makefile
 128         $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 129                 -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
 130                 -cpu m32r2f -infile $(srcdir)/mloop2.in \
 131                 -outfile-suffix 2
 132         $(SHELL) $(srcroot)/move-if-change eng2.hin eng2.h
 133         $(SHELL) $(srcroot)/move-if-change mloop2.cin mloop2.c
 134         touch stamp-2mloop
 135
 136 mloop2.o: mloop2.c $(srcdir)/sem2-switch.c $(M32R2F_INCLUDE_DEPS)
 137 cpu2.o: cpu2.c $(M32R2F_INCLUDE_DEPS)
 138 decode2.o: decode2.c $(M32R2F_INCLUDE_DEPS)
 139 sem2.o: sem2.c $(M32R2F_INCLUDE_DEPS)
 140 model2.o: model2.c $(M32R2F_INCLUDE_DEPS)
 141
 142 m32r-clean:
 143         rm -f mloop.c eng.h stamp-mloop
 144         rm -f mloopx.c engx.h stamp-xmloop
 145         rm -f mloop2.c eng2.h stamp-2mloop
 146         rm -f stamp-arch stamp-cpu stamp-xcpu stamp-2cpu
 147         rm -f tmp-*
 148
 149 # cgen support, enable with --enable-cgen-maint
 150 CGEN_MAINT = ; @true
 151 # The following line is commented in or out depending upon --enable-cgen-maint.
 152 @CGEN_MAINT@CGEN_MAINT =
 153
 154 # NOTE: Generated source files are specified as full paths,
 155 # e.g. $(srcdir)/arch.c, because make may decide the files live
 156 # in objdir otherwise.
 157
 158 stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/m32r.cpu Makefile
 159         $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
 160           archfile=$(CPU_DIR)/m32r.cpu \
 161           FLAGS="with-scache with-profile=fn"
 162         touch stamp-arch
 163 $(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch
 164         @true
 165
 166 stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
 167         $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
 168           cpu=m32rbf mach=m32r SUFFIX= \
 169           archfile=$(CPU_DIR)/m32r.cpu \
 170           FLAGS="with-scache with-profile=fn" \
 171           EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
 172         touch stamp-cpu
 173 $(srcdir)/cpu.h $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/model.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu
 174         @true
 175
 176 stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
 177         $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
 178           cpu=m32rxf mach=m32rx SUFFIX=x \
 179           archfile=$(CPU_DIR)/m32r.cpu \
 180           FLAGS="with-scache with-profile=fn" \
 181           EXTRAFILES="$(CGEN_CPU_SEMSW)"
 182         touch stamp-xcpu
 183 $(srcdir)/cpux.h $(srcdir)/semx-switch.c $(srcdir)/modelx.c $(srcdir)/decodex.c $(srcdir)/decodex.h: $(CGEN_MAINT) stamp-xcpu
 184         @true
 185
 186 stamp-2cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
 187         $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
 188           cpu=m32r2f mach=m32r2 SUFFIX=2 \
 189           archfile=$(CPU_DIR)/m32r.cpu \
 190           FLAGS="with-scache with-profile=fn" \
 191           EXTRAFILES="$(CGEN_CPU_SEMSW)"
 192         touch stamp-2cpu
 193 $(srcdir)/cpu2.h $(srcdir)/sem2-switch.c $(srcdir)/model2.c $(srcdir)/decode2.c $(srcdir)/decode2.h: $(CGEN_MAINT) stamp-2cpu
 194         @true