sim/m32r/Makefile.in

   1 # Makefile template for Configure for the m32r simulator
   2 # Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
   3 # Contributed by Cygnus Support.
   4 #
   5 # This file is part of GDB, the GNU debugger.
   6 #
   7 # This program is free software; you can redistribute it and/or modify
   8 # it under the terms of the GNU General Public License as published by
   9 # the Free Software Foundation; either version 2 of the License, or
  10 # (at your option) any later version.
  11 #
  12 # This program is distributed in the hope that it will be useful,
  13 # but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 # GNU General Public License for more details.
  16 #
  17 # You should have received a copy of the GNU General Public License along
  18 # with this program; if not, write to the Free Software Foundation, Inc.,
  19 # 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  20
  21 ## COMMON_PRE_CONFIG_FRAG
  22
  23 M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o
  24 # start-sanitize-m32rx
  25 M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o
  26 # end-sanitize-m32rx
  27
  28 CONFIG_DEVICES = dv-sockser.o
  29 CONFIG_DEVICES =
  30
  31 SIM_OBJS = \
  32         $(SIM_NEW_COMMON_OBJS) \
  33         sim-cpu.o \
  34         sim-hload.o \
  35         sim-hrw.o \
  36         sim-model.o \
  37         sim-reg.o \
  38         cgen-utils.o cgen-trace.o cgen-scache.o \
  39         cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
  40         sim-if.o arch.o \
  41         $(M32R_OBJS) \
  42         $(start-sanitize-m32rx) \
  43         $(M32RX_OBJS) \
  44         $(end-sanitize-m32rx) \
  45         traps.o devices.o \
  46         $(CONFIG_DEVICES)
  47
  48 # Extra headers included by sim-main.h.
  49 SIM_EXTRA_DEPS = \
  50         $(CGEN_INCLUDE_DEPS) \
  51         arch.h cpuall.h m32r-sim.h cpu-opc.h
  52
  53 SIM_EXTRA_CFLAGS =
  54
  55 SIM_RUN_OBJS = nrun.o
  56 SIM_EXTRA_CLEAN = m32r-clean
  57
  58 # This selects the m32r newlib/libgloss syscall definitions.
  59 NL_TARGET = -DNL_TARGET_m32r
  60
  61 ## COMMON_POST_CONFIG_FRAG
  62
  63 arch = m32r
  64
  65 sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h
  66
  67 arch.o: arch.c $(SIM_MAIN_DEPS)
  68
  69 traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS)
  70 devices.o: devices.c $(SIM_MAIN_DEPS)
  71
  72 # M32R objs
  73
  74 M32RBF_INCLUDE_DEPS = \
  75         $(CGEN_MAIN_CPU_DEPS) \
  76         cpu.h decode.h eng.h
  77
  78 m32r.o: m32r.c $(M32RBF_INCLUDE_DEPS)
  79
  80 # FIXME: Use of `mono' is wip.
  81 mloop.c eng.h: stamp-mloop
  82 stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
  83         $(SHELL) $(srccom)/genmloop.sh \
  84                 -mono -fast -pbb -switch sem-switch.c \
  85                 -cpu m32rbf -infile $(srcdir)/mloop.in
  86         $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
  87         $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
  88         touch stamp-mloop
  89 mloop.o: mloop.c sem-switch.c $(M32RBF_INCLUDE_DEPS)
  90
  91 cpu.o: cpu.c $(M32RBF_INCLUDE_DEPS)
  92 decode.o: decode.c $(M32RBF_INCLUDE_DEPS)
  93 sem.o: sem.c $(M32RBF_INCLUDE_DEPS)
  94 model.o: model.c $(M32RBF_INCLUDE_DEPS)
  95
  96 # start-sanitize-m32rx
  97 # M32RX objs
  98
  99 M32RXF_INCLUDE_DEPS = \
 100         $(CGEN_MAIN_CPU_DEPS) \
 101         cpux.h decodex.h engx.h
 102
 103 m32rx.o: m32rx.c $(M32RXF_INCLUDE_DEPS)
 104
 105 # FIXME: Use of `mono' is wip.
 106 mloopx.c engx.h: stamp-xmloop
 107 stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
 108         $(SHELL) $(srccom)/genmloop.sh \
 109                 -mono -no-fast -pbb -parallel -switch semx-switch.c \
 110                 -cpu m32rxf -infile $(srcdir)/mloopx.in
 111         $(SHELL) $(srcroot)/move-if-change eng.hin engx.h
 112         $(SHELL) $(srcroot)/move-if-change mloop.cin mloopx.c
 113         touch stamp-xmloop
 114 mloopx.o: mloopx.c semx-switch.c $(M32RXF_INCLUDE_DEPS)
 115
 116 cpux.o: cpux.c $(M32RXF_INCLUDE_DEPS)
 117 decodex.o: decodex.c $(M32RXF_INCLUDE_DEPS)
 118 semx.o: semx.c $(M32RXF_INCLUDE_DEPS)
 119 modelx.o: modelx.c $(M32RXF_INCLUDE_DEPS)
 120 # end-sanitize-m32rx
 121
 122 m32r-clean:
 123         rm -f mloop.c stamp-arch stamp-cpu stamp-mloop
 124 # start-sanitize-m32rx
 125         rm -f mloopx.c stamp-xcpu stamp-xmloop
 126 # end-sanitize-m32rx
 127         rm -f tmp-*
 128
 129 # start-sanitize-cygnus
 130 # cgen support, enable with --enable-cgen-maint
 131 CGEN_MAINT = ; @true
 132 # The following line is commented in or out depending upon --enable-cgen-maint.
 133 @CGEN_MAINT@CGEN_MAINT =
 134
 135 stamp-arch: $(CGEN_MAIN_SCM) $(CGEN_ARCH_SCM) $(srccgen)/m32r.cpu
 136         $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all
 137         touch stamp-arch
 138 arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
 139         @true
 140
 141 stamp-cpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
 142         $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
 143           cpu=m32rbf mach=m32r SUFFIX= \
 144           FLAGS="with-scache,with-profile fn" \
 145           EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
 146         touch stamp-cpu
 147 cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
 148         @true
 149 # end-sanitize-cygnus
 150
 151 # start-sanitize-m32rx
 152 stamp-xcpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
 153         $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
 154           cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache,with-profile fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
 155         touch stamp-xcpu
 156 cpux.h semx-switch.c modelx.c decodex.c decodex.h: $(CGEN_MAINT) stamp-xcpu
 157         @true
 158 # end-sanitize-m32rx