sim/m32r/Makefile.in

   1 # Makefile template for Configure for the m32r simulator
   2 # Copyright (C) 1996-2013 Free Software Foundation, Inc.
   3 # Contributed by Cygnus Support.
   4 #
   5 # This file is part of GDB, the GNU debugger.
   6 #
   7 # This program is free software; you can redistribute it and/or modify
   8 # it under the terms of the GNU General Public License as published by
   9 # the Free Software Foundation; either version 3 of the License, or
  10 # (at your option) any later version.
  11 #
  12 # This program is distributed in the hope that it will be useful,
  13 # but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 # GNU General Public License for more details.
  16 #
  17 # You should have received a copy of the GNU General Public License
  18 # along with this program.  If not, see <http://www.gnu.org/licenses/>.
  19
  20 ## COMMON_PRE_CONFIG_FRAG
  21
  22 M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o
  23 M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o
  24 M32R2_OBJS = m32r2.o cpu2.o decode2.o model2.o mloop2.o
  25 TRAPS_OBJ = @traps_obj@
  26
  27 SIM_OBJS = \
  28         $(SIM_NEW_COMMON_OBJS) \
  29         sim-cpu.o \
  30         sim-hload.o \
  31         sim-hrw.o \
  32         sim-model.o \
  33         sim-reg.o \
  34         cgen-utils.o cgen-trace.o cgen-scache.o \
  35         cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
  36         sim-if.o arch.o \
  37         $(M32R_OBJS) \
  38         $(M32RX_OBJS) \
  39         $(M32R2_OBJS) \
  40         $(TRAPS_OBJ) \
  41         devices.o \
  42         $(m32r_extra_objs)
  43
  44 # Extra headers included by sim-main.h.
  45 SIM_EXTRA_DEPS = \
  46         $(CGEN_INCLUDE_DEPS) \
  47         arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.h
  48
  49 SIM_EXTRA_CFLAGS = @sim_extra_cflags@
  50
  51 SIM_RUN_OBJS = nrun.o
  52 SIM_EXTRA_CLEAN = m32r-clean
  53
  54 # This selects the m32r newlib/libgloss syscall definitions.
  55 NL_TARGET = -DNL_TARGET_m32r
  56
  57 ## COMMON_POST_CONFIG_FRAG
  58
  59 arch = m32r
  60
  61 sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h
  62
  63 arch.o: arch.c $(SIM_MAIN_DEPS)
  64
  65 traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS)
  66 traps-linux.o: traps.c syscall.h targ-vals.h $(SIM_MAIN_DEPS)
  67 devices.o: devices.c $(SIM_MAIN_DEPS)
  68
  69 # M32R objs
  70
  71 M32RBF_INCLUDE_DEPS = \
  72         $(CGEN_MAIN_CPU_DEPS) \
  73         cpu.h decode.h eng.h
  74
  75 m32r.o: m32r.c $(M32RBF_INCLUDE_DEPS)
  76
  77 # FIXME: Use of `mono' is wip.
  78 mloop.c eng.h: stamp-mloop ; @true
  79 stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
  80         $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
  81                 -mono -fast -pbb -switch sem-switch.c \
  82                 -cpu m32rbf -infile $(srcdir)/mloop.in
  83         $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
  84         $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
  85         touch stamp-mloop
  86 mloop.o: mloop.c sem-switch.c $(M32RBF_INCLUDE_DEPS)
  87
  88 cpu.o: cpu.c $(M32RBF_INCLUDE_DEPS)
  89 decode.o: decode.c $(M32RBF_INCLUDE_DEPS)
  90 sem.o: sem.c $(M32RBF_INCLUDE_DEPS)
  91 model.o: model.c $(M32RBF_INCLUDE_DEPS)
  92
  93 # M32RX objs
  94
  95 M32RXF_INCLUDE_DEPS = \
  96         $(CGEN_MAIN_CPU_DEPS) \
  97         cpux.h decodex.h engx.h
  98
  99 m32rx.o: m32rx.c $(M32RXF_INCLUDE_DEPS)
 100
 101 # FIXME: Use of `mono' is wip.
 102 mloopx.c engx.h: stamp-xmloop ; @true
 103 stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
 104         $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 105                 -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
 106                 -cpu m32rxf -infile $(srcdir)/mloopx.in \
 107                 -outfile-suffix x
 108         $(SHELL) $(srcroot)/move-if-change engx.hin engx.h
 109         $(SHELL) $(srcroot)/move-if-change mloopx.cin mloopx.c
 110         touch stamp-xmloop
 111 mloopx.o: mloopx.c semx-switch.c $(M32RXF_INCLUDE_DEPS)
 112
 113 cpux.o: cpux.c $(M32RXF_INCLUDE_DEPS)
 114 decodex.o: decodex.c $(M32RXF_INCLUDE_DEPS)
 115 semx.o: semx.c $(M32RXF_INCLUDE_DEPS)
 116 modelx.o: modelx.c $(M32RXF_INCLUDE_DEPS)
 117
 118 # M32R2 objs
 119
 120 M32R2F_INCLUDE_DEPS = \
 121         $(CGEN_MAIN_CPU_DEPS) \
 122         cpu2.h decode2.h eng2.h
 123
 124 m32r2.o: m32r2.c $(M32R2F_INCLUDE_DEPS)
 125
 126 # FIXME: Use of `mono' is wip.
 127 mloop2.c eng2.h: stamp-2mloop ; @true
 128 stamp-2mloop: $(srcdir)/../common/genmloop.sh mloop2.in Makefile
 129         $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 130                 -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
 131                 -cpu m32r2f -infile $(srcdir)/mloop2.in \
 132                 -outfile-suffix 2
 133         $(SHELL) $(srcroot)/move-if-change eng2.hin eng2.h
 134         $(SHELL) $(srcroot)/move-if-change mloop2.cin mloop2.c
 135         touch stamp-2mloop
 136
 137 mloop2.o: mloop2.c $(srcdir)/sem2-switch.c $(M32R2F_INCLUDE_DEPS)
 138 cpu2.o: cpu2.c $(M32R2F_INCLUDE_DEPS)
 139 decode2.o: decode2.c $(M32R2F_INCLUDE_DEPS)
 140 sem2.o: sem2.c $(M32R2F_INCLUDE_DEPS)
 141 model2.o: model2.c $(M32R2F_INCLUDE_DEPS)
 142
 143 m32r-clean:
 144         rm -f mloop.c eng.h stamp-mloop
 145         rm -f mloopx.c engx.h stamp-xmloop
 146         rm -f mloop2.c eng2.h stamp-2mloop
 147         rm -f stamp-arch stamp-cpu stamp-xcpu stamp-2cpu
 148         rm -f tmp-*
 149
 150 # cgen support, enable with --enable-cgen-maint
 151 CGEN_MAINT = ; @true
 152 # The following line is commented in or out depending upon --enable-cgen-maint.
 153 @CGEN_MAINT@CGEN_MAINT =
 154
 155 # NOTE: Generated source files are specified as full paths,
 156 # e.g. $(srcdir)/arch.c, because make may decide the files live
 157 # in objdir otherwise.
 158
 159 stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/m32r.cpu Makefile
 160         $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
 161           archfile=$(CPU_DIR)/m32r.cpu \
 162           FLAGS="with-scache with-profile=fn"
 163         touch stamp-arch
 164 $(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch
 165         @true
 166
 167 stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
 168         $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
 169           cpu=m32rbf mach=m32r SUFFIX= \
 170           archfile=$(CPU_DIR)/m32r.cpu \
 171           FLAGS="with-scache with-profile=fn" \
 172           EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
 173         touch stamp-cpu
 174 $(srcdir)/cpu.h $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/model.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu
 175         @true
 176
 177 stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
 178         $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
 179           cpu=m32rxf mach=m32rx SUFFIX=x \
 180           archfile=$(CPU_DIR)/m32r.cpu \
 181           FLAGS="with-scache with-profile=fn" \
 182           EXTRAFILES="$(CGEN_CPU_SEMSW)"
 183         touch stamp-xcpu
 184 $(srcdir)/cpux.h $(srcdir)/semx-switch.c $(srcdir)/modelx.c $(srcdir)/decodex.c $(srcdir)/decodex.h: $(CGEN_MAINT) stamp-xcpu
 185         @true
 186
 187 stamp-2cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
 188         $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
 189           cpu=m32r2f mach=m32r2 SUFFIX=2 \
 190           archfile=$(CPU_DIR)/m32r.cpu \
 191           FLAGS="with-scache with-profile=fn" \
 192           EXTRAFILES="$(CGEN_CPU_SEMSW)"
 193         touch stamp-2cpu
 194 $(srcdir)/cpu2.h $(srcdir)/sem2-switch.c $(srcdir)/model2.c $(srcdir)/decode2.c $(srcdir)/decode2.h: $(CGEN_MAINT) stamp-2cpu
 195         @true