sim/m32r/Makefile.in

   1 # Makefile template for Configure for the m32r simulator
   2 # Copyright (C) 1996-2015 Free Software Foundation, Inc.
   3 # Contributed by Cygnus Support.
   4 #
   5 # This file is part of GDB, the GNU debugger.
   6 #
   7 # This program is free software; you can redistribute it and/or modify
   8 # it under the terms of the GNU General Public License as published by
   9 # the Free Software Foundation; either version 3 of the License, or
  10 # (at your option) any later version.
  11 #
  12 # This program is distributed in the hope that it will be useful,
  13 # but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 # GNU General Public License for more details.
  16 #
  17 # You should have received a copy of the GNU General Public License
  18 # along with this program.  If not, see <http://www.gnu.org/licenses/>.
  19
  20 ## COMMON_PRE_CONFIG_FRAG
  21
  22 M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o
  23 M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o
  24 M32R2_OBJS = m32r2.o cpu2.o decode2.o model2.o mloop2.o
  25 TRAPS_OBJ = @traps_obj@
  26
  27 SIM_OBJS = \
  28         $(SIM_NEW_COMMON_OBJS) \
  29         sim-hload.o \
  30         sim-model.o \
  31         sim-reg.o \
  32         cgen-utils.o cgen-trace.o cgen-scache.o \
  33         cgen-run.o sim-reason.o sim-stop.o \
  34         sim-if.o arch.o \
  35         $(M32R_OBJS) \
  36         $(M32RX_OBJS) \
  37         $(M32R2_OBJS) \
  38         $(TRAPS_OBJ) \
  39         devices.o
  40
  41 # Extra headers included by sim-main.h.
  42 SIM_EXTRA_DEPS = \
  43         $(CGEN_INCLUDE_DEPS) \
  44         arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.h
  45
  46 SIM_EXTRA_CFLAGS = @sim_extra_cflags@
  47
  48 SIM_EXTRA_CLEAN = m32r-clean
  49
  50 # This selects the m32r newlib/libgloss syscall definitions.
  51 NL_TARGET = -DNL_TARGET_m32r
  52
  53 ## COMMON_POST_CONFIG_FRAG
  54
  55 arch = m32r
  56
  57 sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h
  58
  59 arch.o: arch.c $(SIM_MAIN_DEPS)
  60
  61 traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS)
  62 traps-linux.o: traps.c syscall.h targ-vals.h $(SIM_MAIN_DEPS)
  63 devices.o: devices.c $(SIM_MAIN_DEPS)
  64
  65 # M32R objs
  66
  67 M32RBF_INCLUDE_DEPS = \
  68         $(CGEN_MAIN_CPU_DEPS) \
  69         cpu.h decode.h eng.h
  70
  71 m32r.o: m32r.c $(M32RBF_INCLUDE_DEPS)
  72
  73 # FIXME: Use of `mono' is wip.
  74 mloop.c eng.h: stamp-mloop ; @true
  75 stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
  76         $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
  77                 -mono -fast -pbb -switch sem-switch.c \
  78                 -cpu m32rbf -infile $(srcdir)/mloop.in
  79         $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
  80         $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
  81         touch stamp-mloop
  82 mloop.o: mloop.c sem-switch.c $(M32RBF_INCLUDE_DEPS)
  83
  84 cpu.o: cpu.c $(M32RBF_INCLUDE_DEPS)
  85 decode.o: decode.c $(M32RBF_INCLUDE_DEPS)
  86 sem.o: sem.c $(M32RBF_INCLUDE_DEPS)
  87 model.o: model.c $(M32RBF_INCLUDE_DEPS)
  88
  89 # M32RX objs
  90
  91 M32RXF_INCLUDE_DEPS = \
  92         $(CGEN_MAIN_CPU_DEPS) \
  93         cpux.h decodex.h engx.h
  94
  95 m32rx.o: m32rx.c $(M32RXF_INCLUDE_DEPS)
  96
  97 # FIXME: Use of `mono' is wip.
  98 mloopx.c engx.h: stamp-xmloop ; @true
  99 stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
 100         $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 101                 -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
 102                 -cpu m32rxf -infile $(srcdir)/mloopx.in \
 103                 -outfile-suffix x
 104         $(SHELL) $(srcroot)/move-if-change engx.hin engx.h
 105         $(SHELL) $(srcroot)/move-if-change mloopx.cin mloopx.c
 106         touch stamp-xmloop
 107 mloopx.o: mloopx.c semx-switch.c $(M32RXF_INCLUDE_DEPS)
 108
 109 cpux.o: cpux.c $(M32RXF_INCLUDE_DEPS)
 110 decodex.o: decodex.c $(M32RXF_INCLUDE_DEPS)
 111 semx.o: semx.c $(M32RXF_INCLUDE_DEPS)
 112 modelx.o: modelx.c $(M32RXF_INCLUDE_DEPS)
 113
 114 # M32R2 objs
 115
 116 M32R2F_INCLUDE_DEPS = \
 117         $(CGEN_MAIN_CPU_DEPS) \
 118         cpu2.h decode2.h eng2.h
 119
 120 m32r2.o: m32r2.c $(M32R2F_INCLUDE_DEPS)
 121
 122 # FIXME: Use of `mono' is wip.
 123 mloop2.c eng2.h: stamp-2mloop ; @true
 124 stamp-2mloop: $(srcdir)/../common/genmloop.sh mloop2.in Makefile
 125         $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 126                 -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
 127                 -cpu m32r2f -infile $(srcdir)/mloop2.in \
 128                 -outfile-suffix 2
 129         $(SHELL) $(srcroot)/move-if-change eng2.hin eng2.h
 130         $(SHELL) $(srcroot)/move-if-change mloop2.cin mloop2.c
 131         touch stamp-2mloop
 132
 133 mloop2.o: mloop2.c $(srcdir)/sem2-switch.c $(M32R2F_INCLUDE_DEPS)
 134 cpu2.o: cpu2.c $(M32R2F_INCLUDE_DEPS)
 135 decode2.o: decode2.c $(M32R2F_INCLUDE_DEPS)
 136 sem2.o: sem2.c $(M32R2F_INCLUDE_DEPS)
 137 model2.o: model2.c $(M32R2F_INCLUDE_DEPS)
 138
 139 m32r-clean:
 140         rm -f mloop.c eng.h stamp-mloop
 141         rm -f mloopx.c engx.h stamp-xmloop
 142         rm -f mloop2.c eng2.h stamp-2mloop
 143         rm -f stamp-arch stamp-cpu stamp-xcpu stamp-2cpu
 144         rm -f tmp-*
 145
 146 # cgen support, enable with --enable-cgen-maint
 147 CGEN_MAINT = ; @true
 148 # The following line is commented in or out depending upon --enable-cgen-maint.
 149 @CGEN_MAINT@CGEN_MAINT =
 150
 151 # NOTE: Generated source files are specified as full paths,
 152 # e.g. $(srcdir)/arch.c, because make may decide the files live
 153 # in objdir otherwise.
 154
 155 stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/m32r.cpu Makefile
 156         $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
 157           archfile=$(CPU_DIR)/m32r.cpu \
 158           FLAGS="with-scache with-profile=fn"
 159         touch stamp-arch
 160 $(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch
 161         @true
 162
 163 stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
 164         $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
 165           cpu=m32rbf mach=m32r SUFFIX= \
 166           archfile=$(CPU_DIR)/m32r.cpu \
 167           FLAGS="with-scache with-profile=fn" \
 168           EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
 169         touch stamp-cpu
 170 $(srcdir)/cpu.h $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/model.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu
 171         @true
 172
 173 stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
 174         $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
 175           cpu=m32rxf mach=m32rx SUFFIX=x \
 176           archfile=$(CPU_DIR)/m32r.cpu \
 177           FLAGS="with-scache with-profile=fn" \
 178           EXTRAFILES="$(CGEN_CPU_SEMSW)"
 179         touch stamp-xcpu
 180 $(srcdir)/cpux.h $(srcdir)/semx-switch.c $(srcdir)/modelx.c $(srcdir)/decodex.c $(srcdir)/decodex.h: $(CGEN_MAINT) stamp-xcpu
 181         @true
 182
 183 stamp-2cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
 184         $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
 185           cpu=m32r2f mach=m32r2 SUFFIX=2 \
 186           archfile=$(CPU_DIR)/m32r.cpu \
 187           FLAGS="with-scache with-profile=fn" \
 188           EXTRAFILES="$(CGEN_CPU_SEMSW)"
 189         touch stamp-2cpu
 190 $(srcdir)/cpu2.h $(srcdir)/sem2-switch.c $(srcdir)/model2.c $(srcdir)/decode2.c $(srcdir)/decode2.h: $(CGEN_MAINT) stamp-2cpu
 191         @true