Update years in copyright notice for the GDB files.
[binutils-gdb.git] / sim / m32r / Makefile.in
1 # Makefile template for Configure for the m32r simulator
2 # Copyright (C) 1996-2013 Free Software Foundation, Inc.
3 # Contributed by Cygnus Support.
4 #
5 # This file is part of GDB, the GNU debugger.
6 #
7 # This program is free software; you can redistribute it and/or modify
8 # it under the terms of the GNU General Public License as published by
9 # the Free Software Foundation; either version 3 of the License, or
10 # (at your option) any later version.
11 #
12 # This program is distributed in the hope that it will be useful,
13 # but WITHOUT ANY WARRANTY; without even the implied warranty of
14 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 # GNU General Public License for more details.
16 #
17 # You should have received a copy of the GNU General Public License
18 # along with this program. If not, see <http://www.gnu.org/licenses/>.
19
20 ## COMMON_PRE_CONFIG_FRAG
21
22 M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o
23 M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o
24 M32R2_OBJS = m32r2.o cpu2.o decode2.o model2.o mloop2.o
25 TRAPS_OBJ = @traps_obj@
26
27 CONFIG_DEVICES = dv-sockser.o
28 CONFIG_DEVICES =
29
30 SIM_OBJS = \
31 $(SIM_NEW_COMMON_OBJS) \
32 sim-cpu.o \
33 sim-hload.o \
34 sim-hrw.o \
35 sim-model.o \
36 sim-reg.o \
37 cgen-utils.o cgen-trace.o cgen-scache.o \
38 cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
39 sim-if.o arch.o \
40 $(M32R_OBJS) \
41 $(M32RX_OBJS) \
42 $(M32R2_OBJS) \
43 $(TRAPS_OBJ) \
44 devices.o \
45 $(CONFIG_DEVICES)
46
47 # Extra headers included by sim-main.h.
48 SIM_EXTRA_DEPS = \
49 $(CGEN_INCLUDE_DEPS) \
50 arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.h
51
52 SIM_EXTRA_CFLAGS = @sim_extra_cflags@
53
54 SIM_RUN_OBJS = nrun.o
55 SIM_EXTRA_CLEAN = m32r-clean
56
57 # This selects the m32r newlib/libgloss syscall definitions.
58 NL_TARGET = -DNL_TARGET_m32r
59
60 ## COMMON_POST_CONFIG_FRAG
61
62 arch = m32r
63
64 sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h
65
66 arch.o: arch.c $(SIM_MAIN_DEPS)
67
68 traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS)
69 traps-linux.o: traps.c syscall.h targ-vals.h $(SIM_MAIN_DEPS)
70 devices.o: devices.c $(SIM_MAIN_DEPS)
71
72 # M32R objs
73
74 M32RBF_INCLUDE_DEPS = \
75 $(CGEN_MAIN_CPU_DEPS) \
76 cpu.h decode.h eng.h
77
78 m32r.o: m32r.c $(M32RBF_INCLUDE_DEPS)
79
80 # FIXME: Use of `mono' is wip.
81 mloop.c eng.h: stamp-mloop ; @true
82 stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
83 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
84 -mono -fast -pbb -switch sem-switch.c \
85 -cpu m32rbf -infile $(srcdir)/mloop.in
86 $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
87 $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
88 touch stamp-mloop
89 mloop.o: mloop.c sem-switch.c $(M32RBF_INCLUDE_DEPS)
90
91 cpu.o: cpu.c $(M32RBF_INCLUDE_DEPS)
92 decode.o: decode.c $(M32RBF_INCLUDE_DEPS)
93 sem.o: sem.c $(M32RBF_INCLUDE_DEPS)
94 model.o: model.c $(M32RBF_INCLUDE_DEPS)
95
96 # M32RX objs
97
98 M32RXF_INCLUDE_DEPS = \
99 $(CGEN_MAIN_CPU_DEPS) \
100 cpux.h decodex.h engx.h
101
102 m32rx.o: m32rx.c $(M32RXF_INCLUDE_DEPS)
103
104 # FIXME: Use of `mono' is wip.
105 mloopx.c engx.h: stamp-xmloop ; @true
106 stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
107 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
108 -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
109 -cpu m32rxf -infile $(srcdir)/mloopx.in \
110 -outfile-suffix x
111 $(SHELL) $(srcroot)/move-if-change engx.hin engx.h
112 $(SHELL) $(srcroot)/move-if-change mloopx.cin mloopx.c
113 touch stamp-xmloop
114 mloopx.o: mloopx.c semx-switch.c $(M32RXF_INCLUDE_DEPS)
115
116 cpux.o: cpux.c $(M32RXF_INCLUDE_DEPS)
117 decodex.o: decodex.c $(M32RXF_INCLUDE_DEPS)
118 semx.o: semx.c $(M32RXF_INCLUDE_DEPS)
119 modelx.o: modelx.c $(M32RXF_INCLUDE_DEPS)
120
121 # M32R2 objs
122
123 M32R2F_INCLUDE_DEPS = \
124 $(CGEN_MAIN_CPU_DEPS) \
125 cpu2.h decode2.h eng2.h
126
127 m32r2.o: m32r2.c $(M32R2F_INCLUDE_DEPS)
128
129 # FIXME: Use of `mono' is wip.
130 mloop2.c eng2.h: stamp-2mloop ; @true
131 stamp-2mloop: $(srcdir)/../common/genmloop.sh mloop2.in Makefile
132 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
133 -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
134 -cpu m32r2f -infile $(srcdir)/mloop2.in \
135 -outfile-suffix 2
136 $(SHELL) $(srcroot)/move-if-change eng2.hin eng2.h
137 $(SHELL) $(srcroot)/move-if-change mloop2.cin mloop2.c
138 touch stamp-2mloop
139
140 mloop2.o: mloop2.c $(srcdir)/sem2-switch.c $(M32R2F_INCLUDE_DEPS)
141 cpu2.o: cpu2.c $(M32R2F_INCLUDE_DEPS)
142 decode2.o: decode2.c $(M32R2F_INCLUDE_DEPS)
143 sem2.o: sem2.c $(M32R2F_INCLUDE_DEPS)
144 model2.o: model2.c $(M32R2F_INCLUDE_DEPS)
145
146 m32r-clean:
147 rm -f mloop.c eng.h stamp-mloop
148 rm -f mloopx.c engx.h stamp-xmloop
149 rm -f mloop2.c eng2.h stamp-2mloop
150 rm -f stamp-arch stamp-cpu stamp-xcpu stamp-2cpu
151 rm -f tmp-*
152
153 # cgen support, enable with --enable-cgen-maint
154 CGEN_MAINT = ; @true
155 # The following line is commented in or out depending upon --enable-cgen-maint.
156 @CGEN_MAINT@CGEN_MAINT =
157
158 # NOTE: Generated source files are specified as full paths,
159 # e.g. $(srcdir)/arch.c, because make may decide the files live
160 # in objdir otherwise.
161
162 stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/m32r.cpu Makefile
163 $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
164 archfile=$(CPU_DIR)/m32r.cpu \
165 FLAGS="with-scache with-profile=fn"
166 touch stamp-arch
167 $(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch
168 @true
169
170 stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
171 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
172 cpu=m32rbf mach=m32r SUFFIX= \
173 archfile=$(CPU_DIR)/m32r.cpu \
174 FLAGS="with-scache with-profile=fn" \
175 EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
176 touch stamp-cpu
177 $(srcdir)/cpu.h $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/model.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu
178 @true
179
180 stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
181 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
182 cpu=m32rxf mach=m32rx SUFFIX=x \
183 archfile=$(CPU_DIR)/m32r.cpu \
184 FLAGS="with-scache with-profile=fn" \
185 EXTRAFILES="$(CGEN_CPU_SEMSW)"
186 touch stamp-xcpu
187 $(srcdir)/cpux.h $(srcdir)/semx-switch.c $(srcdir)/modelx.c $(srcdir)/decodex.c $(srcdir)/decodex.h: $(CGEN_MAINT) stamp-xcpu
188 @true
189
190 stamp-2cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
191 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
192 cpu=m32r2f mach=m32r2 SUFFIX=2 \
193 archfile=$(CPU_DIR)/m32r.cpu \
194 FLAGS="with-scache with-profile=fn" \
195 EXTRAFILES="$(CGEN_CPU_SEMSW)"
196 touch stamp-2cpu
197 $(srcdir)/cpu2.h $(srcdir)/sem2-switch.c $(srcdir)/model2.c $(srcdir)/decode2.c $(srcdir)/decode2.h: $(CGEN_MAINT) stamp-2cpu
198 @true