sim/m32r/Makefile.in

   1 # Makefile template for Configure for the m32r simulator
   2 # Copyright (C) 1996-2015 Free Software Foundation, Inc.
   3 # Contributed by Cygnus Support.
   4 #
   5 # This file is part of GDB, the GNU debugger.
   6 #
   7 # This program is free software; you can redistribute it and/or modify
   8 # it under the terms of the GNU General Public License as published by
   9 # the Free Software Foundation; either version 3 of the License, or
  10 # (at your option) any later version.
  11 #
  12 # This program is distributed in the hope that it will be useful,
  13 # but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 # GNU General Public License for more details.
  16 #
  17 # You should have received a copy of the GNU General Public License
  18 # along with this program.  If not, see <http://www.gnu.org/licenses/>.
  19
  20 ## COMMON_PRE_CONFIG_FRAG
  21
  22 M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o
  23 M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o
  24 M32R2_OBJS = m32r2.o cpu2.o decode2.o model2.o mloop2.o
  25 TRAPS_OBJ = @traps_obj@
  26
  27 SIM_OBJS = \
  28         $(SIM_NEW_COMMON_OBJS) \
  29         sim-hload.o \
  30         cgen-utils.o cgen-trace.o cgen-scache.o \
  31         cgen-run.o \
  32         sim-if.o arch.o \
  33         $(M32R_OBJS) \
  34         $(M32RX_OBJS) \
  35         $(M32R2_OBJS) \
  36         $(TRAPS_OBJ)
  37
  38 # Extra headers included by sim-main.h.
  39 SIM_EXTRA_DEPS = \
  40         $(CGEN_INCLUDE_DEPS) \
  41         arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.h
  42
  43 SIM_EXTRA_CFLAGS = @sim_extra_cflags@
  44
  45 SIM_EXTRA_CLEAN = m32r-clean
  46
  47 # This selects the m32r newlib/libgloss syscall definitions.
  48 NL_TARGET = -DNL_TARGET_m32r
  49
  50 ## COMMON_POST_CONFIG_FRAG
  51
  52 arch = m32r
  53
  54 sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h
  55
  56 arch.o: arch.c $(SIM_MAIN_DEPS)
  57
  58 traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS)
  59 traps-linux.o: traps.c syscall.h targ-vals.h $(SIM_MAIN_DEPS)
  60 devices.o: devices.c $(SIM_MAIN_DEPS)
  61
  62 # M32R objs
  63
  64 M32RBF_INCLUDE_DEPS = \
  65         $(CGEN_MAIN_CPU_DEPS) \
  66         cpu.h decode.h eng.h
  67
  68 m32r.o: m32r.c $(M32RBF_INCLUDE_DEPS)
  69
  70 # FIXME: Use of `mono' is wip.
  71 mloop.c eng.h: stamp-mloop ; @true
  72 stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
  73         $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
  74                 -mono -fast -pbb -switch sem-switch.c \
  75                 -cpu m32rbf -infile $(srcdir)/mloop.in
  76         $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
  77         $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
  78         touch stamp-mloop
  79 mloop.o: mloop.c sem-switch.c $(M32RBF_INCLUDE_DEPS)
  80
  81 cpu.o: cpu.c $(M32RBF_INCLUDE_DEPS)
  82 decode.o: decode.c $(M32RBF_INCLUDE_DEPS)
  83 sem.o: sem.c $(M32RBF_INCLUDE_DEPS)
  84 model.o: model.c $(M32RBF_INCLUDE_DEPS)
  85
  86 # M32RX objs
  87
  88 M32RXF_INCLUDE_DEPS = \
  89         $(CGEN_MAIN_CPU_DEPS) \
  90         cpux.h decodex.h engx.h
  91
  92 m32rx.o: m32rx.c $(M32RXF_INCLUDE_DEPS)
  93
  94 # FIXME: Use of `mono' is wip.
  95 mloopx.c engx.h: stamp-xmloop ; @true
  96 stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
  97         $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
  98                 -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
  99                 -cpu m32rxf -infile $(srcdir)/mloopx.in \
 100                 -outfile-suffix x
 101         $(SHELL) $(srcroot)/move-if-change engx.hin engx.h
 102         $(SHELL) $(srcroot)/move-if-change mloopx.cin mloopx.c
 103         touch stamp-xmloop
 104 mloopx.o: mloopx.c semx-switch.c $(M32RXF_INCLUDE_DEPS)
 105
 106 cpux.o: cpux.c $(M32RXF_INCLUDE_DEPS)
 107 decodex.o: decodex.c $(M32RXF_INCLUDE_DEPS)
 108 semx.o: semx.c $(M32RXF_INCLUDE_DEPS)
 109 modelx.o: modelx.c $(M32RXF_INCLUDE_DEPS)
 110
 111 # M32R2 objs
 112
 113 M32R2F_INCLUDE_DEPS = \
 114         $(CGEN_MAIN_CPU_DEPS) \
 115         cpu2.h decode2.h eng2.h
 116
 117 m32r2.o: m32r2.c $(M32R2F_INCLUDE_DEPS)
 118
 119 # FIXME: Use of `mono' is wip.
 120 mloop2.c eng2.h: stamp-2mloop ; @true
 121 stamp-2mloop: $(srcdir)/../common/genmloop.sh mloop2.in Makefile
 122         $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
 123                 -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
 124                 -cpu m32r2f -infile $(srcdir)/mloop2.in \
 125                 -outfile-suffix 2
 126         $(SHELL) $(srcroot)/move-if-change eng2.hin eng2.h
 127         $(SHELL) $(srcroot)/move-if-change mloop2.cin mloop2.c
 128         touch stamp-2mloop
 129
 130 mloop2.o: mloop2.c $(srcdir)/sem2-switch.c $(M32R2F_INCLUDE_DEPS)
 131 cpu2.o: cpu2.c $(M32R2F_INCLUDE_DEPS)
 132 decode2.o: decode2.c $(M32R2F_INCLUDE_DEPS)
 133 sem2.o: sem2.c $(M32R2F_INCLUDE_DEPS)
 134 model2.o: model2.c $(M32R2F_INCLUDE_DEPS)
 135
 136 m32r-clean:
 137         rm -f mloop.c eng.h stamp-mloop
 138         rm -f mloopx.c engx.h stamp-xmloop
 139         rm -f mloop2.c eng2.h stamp-2mloop
 140         rm -f stamp-arch stamp-cpu stamp-xcpu stamp-2cpu
 141         rm -f tmp-*
 142
 143 # cgen support, enable with --enable-cgen-maint
 144 CGEN_MAINT = ; @true
 145 # The following line is commented in or out depending upon --enable-cgen-maint.
 146 @CGEN_MAINT@CGEN_MAINT =
 147
 148 # NOTE: Generated source files are specified as full paths,
 149 # e.g. $(srcdir)/arch.c, because make may decide the files live
 150 # in objdir otherwise.
 151
 152 stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/m32r.cpu Makefile
 153         $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
 154           archfile=$(CPU_DIR)/m32r.cpu \
 155           FLAGS="with-scache with-profile=fn"
 156         touch stamp-arch
 157 $(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch
 158         @true
 159
 160 stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
 161         $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
 162           cpu=m32rbf mach=m32r SUFFIX= \
 163           archfile=$(CPU_DIR)/m32r.cpu \
 164           FLAGS="with-scache with-profile=fn" \
 165           EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
 166         touch stamp-cpu
 167 $(srcdir)/cpu.h $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/model.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu
 168         @true
 169
 170 stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
 171         $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
 172           cpu=m32rxf mach=m32rx SUFFIX=x \
 173           archfile=$(CPU_DIR)/m32r.cpu \
 174           FLAGS="with-scache with-profile=fn" \
 175           EXTRAFILES="$(CGEN_CPU_SEMSW)"
 176         touch stamp-xcpu
 177 $(srcdir)/cpux.h $(srcdir)/semx-switch.c $(srcdir)/modelx.c $(srcdir)/decodex.c $(srcdir)/decodex.h: $(CGEN_MAINT) stamp-xcpu
 178         @true
 179
 180 stamp-2cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
 181         $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
 182           cpu=m32r2f mach=m32r2 SUFFIX=2 \
 183           archfile=$(CPU_DIR)/m32r.cpu \
 184           FLAGS="with-scache with-profile=fn" \
 185           EXTRAFILES="$(CGEN_CPU_SEMSW)"
 186         touch stamp-2cpu
 187 $(srcdir)/cpu2.h $(srcdir)/sem2-switch.c $(srcdir)/model2.c $(srcdir)/decode2.c $(srcdir)/decode2.h: $(CGEN_MAINT) stamp-2cpu
 188         @true