Add pseudo-basic-block execution support.
[binutils-gdb.git] / sim / m32r / Makefile.in
1 # Makefile template for Configure for the m32r simulator
2 # Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
3 # Contributed by Cygnus Support.
4 #
5 # This file is part of GDB, the GNU debugger.
6 #
7 # This program is free software; you can redistribute it and/or modify
8 # it under the terms of the GNU General Public License as published by
9 # the Free Software Foundation; either version 2 of the License, or
10 # (at your option) any later version.
11 #
12 # This program is distributed in the hope that it will be useful,
13 # but WITHOUT ANY WARRANTY; without even the implied warranty of
14 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 # GNU General Public License for more details.
16 #
17 # You should have received a copy of the GNU General Public License along
18 # with this program; if not, write to the Free Software Foundation, Inc.,
19 # 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20
21 ## COMMON_PRE_CONFIG_FRAG
22
23 M32R_OBJS = m32r.o cpu.o decode.o extract.o sem.o model.o mloop.o
24 # start-sanitize-m32rx
25 M32RX_OBJS = m32rx.o cpux.o decodex.o extractx.o modelx.o mloopx.o
26 # end-sanitize-m32rx
27
28 CONFIG_DEVICES = dv-sockser.o
29 CONFIG_DEVICES =
30
31 SIM_OBJS = \
32 $(SIM_NEW_COMMON_OBJS) \
33 sim-cpu.o \
34 sim-hload.o \
35 sim-hrw.o \
36 sim-model.o \
37 sim-reg.o \
38 cgen-utils.o cgen-trace.o cgen-scache.o \
39 cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
40 sim-if.o arch.o \
41 $(M32R_OBJS) \
42 $(start-sanitize-m32rx) \
43 $(M32RX_OBJS) \
44 $(end-sanitize-m32rx) \
45 traps.o devices.o \
46 $(CONFIG_DEVICES)
47
48 # Extra headers included by sim-main.h.
49 SIM_EXTRA_DEPS = \
50 $(srcdir)/../common/cgen-types.h \
51 $(srcdir)/../common/cgen-sim.h \
52 $(srcdir)/../common/cgen-trace.h \
53 arch.h cpuall.h m32r-sim.h cpu-opc.h \
54 $(srcdir)/../../include/opcode/cgen.h
55
56 SIM_EXTRA_CFLAGS =
57
58 SIM_RUN_OBJS = nrun.o
59 SIM_EXTRA_CLEAN = m32r-clean
60
61 # This selects the m32r newlib/libgloss syscall definitions.
62 NL_TARGET = -DNL_TARGET_m32r
63
64 ## COMMON_POST_CONFIG_FRAG
65
66 arch = m32r
67
68 MAIN_INCLUDE_DEPS = \
69 sim-main.h \
70 $(srcdir)/../common/sim-config.h \
71 $(srcdir)/../common/sim-base.h \
72 $(srcdir)/../common/sim-basics.h \
73 $(srcdir)/../common/sim-module.h \
74 $(srcdir)/../common/sim-trace.h \
75 $(srcdir)/../common/sim-profile.h \
76 tconfig.h
77 INCLUDE_DEPS = $(MAIN_INCLUDE_DEPS) $(SIM_EXTRA_DEPS)
78 OPS_INCLUDE_DEPS = \
79 $(srcdir)/../common/cgen-mem.h \
80 $(srcdir)/../common/cgen-ops.h
81
82 sim-if.o: sim-if.c $(INCLUDE_DEPS) $(srcdir)/../common/sim-core.h
83
84 arch.o: arch.c $(INCLUDE_DEPS)
85
86 devices.o: devices.c $(INCLUDE_DEPS)
87
88 # M32R objs
89
90 m32r.o: m32r.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
91
92 # FIXME: Use of `mono' is wip.
93 mloop.c: $(srcdir)/../common/genmloop.sh mloop.in Makefile
94 rm -f mloop.c
95 $(SHELL) $(srcdir)/../common/genmloop.sh $(SHELL) \
96 -mono -fast -pbb -switch sem-switch.c \
97 m32rbf $(srcdir)/mloop.in \
98 | sed -e 's/@cpu@/m32rbf/' -e 's/@CPU@/M32RBF/' >mloop.c
99 mloop.o: mloop.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) stamp-cpu
100
101 cpu.o: cpu.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h
102 decode.o: decode.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
103 extract.o: extract.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
104 sem.o: sem.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
105 model.o: model.c $(INCLUDE_DEPS) cpu.h decode.h
106
107 # start-sanitize-m32rx
108 # M32RX objs
109
110 m32rx.o: m32rx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
111
112 # FIXME: Use of `mono' is wip.
113 mloopx.c: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
114 rm -f mloopx.c
115 $(SHELL) $(srcdir)/../common/genmloop.sh $(SHELL) \
116 -mono -no-fast -pbb -parallel -switch semx-switch.c \
117 m32rxf $(srcdir)/mloopx.in \
118 | sed -e 's/@cpu@/m32rxf/' -e 's/@CPU@/M32RXF/' >mloopx.c
119 mloopx.o: mloopx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) stamp-xcpu
120
121 cpux.o: cpux.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
122 decodex.o: decodex.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
123 extractx.o: extractx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
124 #semx.o: semx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
125 modelx.o: modelx.c $(INCLUDE_DEPS) cpux.h decodex.h
126 # end-sanitize-m32rx
127
128 m32r-clean:
129 rm -f mloop.c stamp-arch stamp-cpu
130 # start-sanitize-m32rx
131 rm -f mloopx.c stamp-xcpu
132 # end-sanitize-m32rx
133 rm -f tmp-*
134
135 # start-sanitize-cygnus
136 # cgen support, enable with --enable-cgen-maint
137 CGEN_MAINT = ; @true
138 # The following line is commented in or out depending upon --enable-cgen-maint.
139 @CGEN_MAINT@CGEN_MAINT =
140
141 stamp-arch: $(CGEN_MAIN_SCM) $(srccgen)/m32r.cpu
142 $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS)
143 touch stamp-arch
144 arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
145 @true
146
147 stamp-cpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
148 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
149 cpu=m32rbf mach=m32r SUFFIX= FLAGS="with-scache,with-profile fn" EXTRAFILES="$(CGEN_CPU_EXTR) $(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
150 touch stamp-cpu
151 cpu.h extract.c sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
152 @true
153 # end-sanitize-cygnus
154
155 # start-sanitize-m32rx
156 stamp-xcpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
157 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
158 cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache,with-profile fn" EXTRAFILES="$(CGEN_CPU_EXTR) $(CGEN_CPU_SEMSW)"
159 touch stamp-xcpu
160 cpux.h extractx.c semx-switch.c modelx.c decodex.c decodex.h: $(CGEN_MAINT) stamp-xcpu
161 @true
162 # end-sanitize-m32rx