sim: hw: rework configure option & device selection
[binutils-gdb.git] / sim / m32r / Makefile.in
1 # Makefile template for Configure for the m32r simulator
2 # Copyright (C) 1996-2021 Free Software Foundation, Inc.
3 # Contributed by Cygnus Support.
4 #
5 # This file is part of GDB, the GNU debugger.
6 #
7 # This program is free software; you can redistribute it and/or modify
8 # it under the terms of the GNU General Public License as published by
9 # the Free Software Foundation; either version 3 of the License, or
10 # (at your option) any later version.
11 #
12 # This program is distributed in the hope that it will be useful,
13 # but WITHOUT ANY WARRANTY; without even the implied warranty of
14 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 # GNU General Public License for more details.
16 #
17 # You should have received a copy of the GNU General Public License
18 # along with this program. If not, see <http://www.gnu.org/licenses/>.
19
20 ## COMMON_PRE_CONFIG_FRAG
21
22 M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o
23 M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o
24 M32R2_OBJS = m32r2.o cpu2.o decode2.o model2.o mloop2.o
25 TRAPS_OBJ = @traps_obj@
26
27 SIM_OBJS = \
28 $(SIM_NEW_COMMON_OBJS) \
29 cgen-utils.o cgen-trace.o cgen-scache.o \
30 cgen-run.o \
31 sim-if.o arch.o \
32 $(M32R_OBJS) \
33 $(M32RX_OBJS) \
34 $(M32R2_OBJS) \
35 $(TRAPS_OBJ)
36
37 SIM_EXTRA_HW_DEVICES = m32r_cache m32r_uart
38
39 # Extra headers included by sim-main.h.
40 SIM_EXTRA_DEPS = \
41 $(CGEN_INCLUDE_DEPS) \
42 arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.h \
43 eng.h engx.h eng2.h
44
45 SIM_EXTRA_CFLAGS = @sim_extra_cflags@
46
47 SIM_EXTRA_CLEAN = m32r-clean
48
49 # Code doesn't build cleanly yet.
50 SIM_WERROR_CFLAGS =
51
52 ## COMMON_POST_CONFIG_FRAG
53
54 arch = m32r
55
56 # M32R objs
57
58 M32RBF_INCLUDE_DEPS = \
59 $(CGEN_MAIN_CPU_DEPS) \
60 cpu.h decode.h eng.h
61
62 # FIXME: Use of `mono' is wip.
63 mloop.c eng.h: stamp-mloop ; @true
64 stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
65 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
66 -mono -fast -pbb -switch sem-switch.c \
67 -cpu m32rbf -infile $(srcdir)/mloop.in
68 $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
69 $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
70 touch stamp-mloop
71
72 # M32RX objs
73
74 M32RXF_INCLUDE_DEPS = \
75 $(CGEN_MAIN_CPU_DEPS) \
76 cpux.h decodex.h engx.h
77
78 # FIXME: Use of `mono' is wip.
79 mloopx.c engx.h: stamp-xmloop ; @true
80 stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
81 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
82 -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
83 -cpu m32rxf -infile $(srcdir)/mloopx.in \
84 -outfile-suffix x
85 $(SHELL) $(srcroot)/move-if-change engx.hin engx.h
86 $(SHELL) $(srcroot)/move-if-change mloopx.cin mloopx.c
87 touch stamp-xmloop
88
89 # M32R2 objs
90
91 M32R2F_INCLUDE_DEPS = \
92 $(CGEN_MAIN_CPU_DEPS) \
93 cpu2.h decode2.h eng2.h
94
95 # FIXME: Use of `mono' is wip.
96 mloop2.c eng2.h: stamp-2mloop ; @true
97 stamp-2mloop: $(srcdir)/../common/genmloop.sh mloop2.in Makefile
98 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
99 -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
100 -cpu m32r2f -infile $(srcdir)/mloop2.in \
101 -outfile-suffix 2
102 $(SHELL) $(srcroot)/move-if-change eng2.hin eng2.h
103 $(SHELL) $(srcroot)/move-if-change mloop2.cin mloop2.c
104 touch stamp-2mloop
105
106 m32r-clean:
107 rm -f mloop.c eng.h stamp-mloop
108 rm -f mloopx.c engx.h stamp-xmloop
109 rm -f mloop2.c eng2.h stamp-2mloop
110 rm -f stamp-arch stamp-cpu stamp-xcpu stamp-2cpu
111 rm -f tmp-*
112
113 # NOTE: Generated source files are specified as full paths,
114 # e.g. $(srcdir)/arch.c, because make may decide the files live
115 # in objdir otherwise.
116
117 stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/m32r.cpu Makefile
118 $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
119 archfile=$(CPU_DIR)/m32r.cpu \
120 FLAGS="with-scache with-profile=fn"
121 touch stamp-arch
122 $(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch
123 @true
124
125 stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
126 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
127 cpu=m32rbf mach=m32r SUFFIX= \
128 archfile=$(CPU_DIR)/m32r.cpu \
129 FLAGS="with-scache with-profile=fn" \
130 EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
131 touch stamp-cpu
132 $(srcdir)/cpu.h $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/model.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu
133 @true
134
135 stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
136 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
137 cpu=m32rxf mach=m32rx SUFFIX=x \
138 archfile=$(CPU_DIR)/m32r.cpu \
139 FLAGS="with-scache with-profile=fn" \
140 EXTRAFILES="$(CGEN_CPU_SEMSW)"
141 touch stamp-xcpu
142 $(srcdir)/cpux.h $(srcdir)/semx-switch.c $(srcdir)/modelx.c $(srcdir)/decodex.c $(srcdir)/decodex.h: $(CGEN_MAINT) stamp-xcpu
143 @true
144
145 stamp-2cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
146 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
147 cpu=m32r2f mach=m32r2 SUFFIX=2 \
148 archfile=$(CPU_DIR)/m32r.cpu \
149 FLAGS="with-scache with-profile=fn" \
150 EXTRAFILES="$(CGEN_CPU_SEMSW)"
151 touch stamp-2cpu
152 $(srcdir)/cpu2.h $(srcdir)/sem2-switch.c $(srcdir)/model2.c $(srcdir)/decode2.c $(srcdir)/decode2.h: $(CGEN_MAINT) stamp-2cpu
153 @true