Initial creation of sourceware repository
[binutils-gdb.git] / sim / m32r / arch.c
1 /* Simulator support for m32r.
2
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
4
5 Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
6
7 This file is part of the GNU Simulators.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
12 any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22
23 */
24
25 #include "sim-main.h"
26 #include "bfd.h"
27
28 const MACH *sim_machs[] =
29 {
30 #ifdef HAVE_CPU_M32RBF
31 & m32r_mach,
32 #endif
33 0
34 };
35
36 /* Get the value of h-pc. */
37
38 USI
39 a_m32r_h_pc_get (SIM_CPU *current_cpu)
40 {
41 switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
42 {
43 #ifdef HAVE_CPU_M32RBF
44 case bfd_mach_m32r :
45 return m32rbf_h_pc_get (current_cpu);
46 #endif
47 default :
48 abort ();
49 }
50 }
51
52 /* Set a value for h-pc. */
53
54 void
55 a_m32r_h_pc_set (SIM_CPU *current_cpu, USI newval)
56 {
57 switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
58 {
59 #ifdef HAVE_CPU_M32RBF
60 case bfd_mach_m32r :
61 m32rbf_h_pc_set (current_cpu, newval);
62 break;
63 #endif
64 default :
65 abort ();
66 }
67 }
68
69 /* Get the value of h-gr. */
70
71 SI
72 a_m32r_h_gr_get (SIM_CPU *current_cpu, UINT regno)
73 {
74 switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
75 {
76 #ifdef HAVE_CPU_M32RBF
77 case bfd_mach_m32r :
78 return m32rbf_h_gr_get (current_cpu, regno);
79 #endif
80 default :
81 abort ();
82 }
83 }
84
85 /* Set a value for h-gr. */
86
87 void
88 a_m32r_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
89 {
90 switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
91 {
92 #ifdef HAVE_CPU_M32RBF
93 case bfd_mach_m32r :
94 m32rbf_h_gr_set (current_cpu, regno, newval);
95 break;
96 #endif
97 default :
98 abort ();
99 }
100 }
101
102 /* Get the value of h-cr. */
103
104 USI
105 a_m32r_h_cr_get (SIM_CPU *current_cpu, UINT regno)
106 {
107 switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
108 {
109 #ifdef HAVE_CPU_M32RBF
110 case bfd_mach_m32r :
111 return m32rbf_h_cr_get (current_cpu, regno);
112 #endif
113 default :
114 abort ();
115 }
116 }
117
118 /* Set a value for h-cr. */
119
120 void
121 a_m32r_h_cr_set (SIM_CPU *current_cpu, UINT regno, USI newval)
122 {
123 switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
124 {
125 #ifdef HAVE_CPU_M32RBF
126 case bfd_mach_m32r :
127 m32rbf_h_cr_set (current_cpu, regno, newval);
128 break;
129 #endif
130 default :
131 abort ();
132 }
133 }
134
135 /* Get the value of h-accum. */
136
137 DI
138 a_m32r_h_accum_get (SIM_CPU *current_cpu)
139 {
140 switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
141 {
142 #ifdef HAVE_CPU_M32RBF
143 case bfd_mach_m32r :
144 return m32rbf_h_accum_get (current_cpu);
145 #endif
146 default :
147 abort ();
148 }
149 }
150
151 /* Set a value for h-accum. */
152
153 void
154 a_m32r_h_accum_set (SIM_CPU *current_cpu, DI newval)
155 {
156 switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
157 {
158 #ifdef HAVE_CPU_M32RBF
159 case bfd_mach_m32r :
160 m32rbf_h_accum_set (current_cpu, newval);
161 break;
162 #endif
163 default :
164 abort ();
165 }
166 }
167
168 /* Get the value of h-accums. */
169
170 DI
171 a_m32r_h_accums_get (SIM_CPU *current_cpu, UINT regno)
172 {
173 switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
174 {
175 default :
176 abort ();
177 }
178 }
179
180 /* Set a value for h-accums. */
181
182 void
183 a_m32r_h_accums_set (SIM_CPU *current_cpu, UINT regno, DI newval)
184 {
185 switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
186 {
187 default :
188 abort ();
189 }
190 }
191
192 /* Get the value of h-cond. */
193
194 BI
195 a_m32r_h_cond_get (SIM_CPU *current_cpu)
196 {
197 switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
198 {
199 #ifdef HAVE_CPU_M32RBF
200 case bfd_mach_m32r :
201 return m32rbf_h_cond_get (current_cpu);
202 #endif
203 default :
204 abort ();
205 }
206 }
207
208 /* Set a value for h-cond. */
209
210 void
211 a_m32r_h_cond_set (SIM_CPU *current_cpu, BI newval)
212 {
213 switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
214 {
215 #ifdef HAVE_CPU_M32RBF
216 case bfd_mach_m32r :
217 m32rbf_h_cond_set (current_cpu, newval);
218 break;
219 #endif
220 default :
221 abort ();
222 }
223 }
224
225 /* Get the value of h-psw. */
226
227 UQI
228 a_m32r_h_psw_get (SIM_CPU *current_cpu)
229 {
230 switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
231 {
232 #ifdef HAVE_CPU_M32RBF
233 case bfd_mach_m32r :
234 return m32rbf_h_psw_get (current_cpu);
235 #endif
236 default :
237 abort ();
238 }
239 }
240
241 /* Set a value for h-psw. */
242
243 void
244 a_m32r_h_psw_set (SIM_CPU *current_cpu, UQI newval)
245 {
246 switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
247 {
248 #ifdef HAVE_CPU_M32RBF
249 case bfd_mach_m32r :
250 m32rbf_h_psw_set (current_cpu, newval);
251 break;
252 #endif
253 default :
254 abort ();
255 }
256 }
257
258 /* Get the value of h-bpsw. */
259
260 UQI
261 a_m32r_h_bpsw_get (SIM_CPU *current_cpu)
262 {
263 switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
264 {
265 #ifdef HAVE_CPU_M32RBF
266 case bfd_mach_m32r :
267 return m32rbf_h_bpsw_get (current_cpu);
268 #endif
269 default :
270 abort ();
271 }
272 }
273
274 /* Set a value for h-bpsw. */
275
276 void
277 a_m32r_h_bpsw_set (SIM_CPU *current_cpu, UQI newval)
278 {
279 switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
280 {
281 #ifdef HAVE_CPU_M32RBF
282 case bfd_mach_m32r :
283 m32rbf_h_bpsw_set (current_cpu, newval);
284 break;
285 #endif
286 default :
287 abort ();
288 }
289 }
290
291 /* Get the value of h-bbpsw. */
292
293 UQI
294 a_m32r_h_bbpsw_get (SIM_CPU *current_cpu)
295 {
296 switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
297 {
298 #ifdef HAVE_CPU_M32RBF
299 case bfd_mach_m32r :
300 return m32rbf_h_bbpsw_get (current_cpu);
301 #endif
302 default :
303 abort ();
304 }
305 }
306
307 /* Set a value for h-bbpsw. */
308
309 void
310 a_m32r_h_bbpsw_set (SIM_CPU *current_cpu, UQI newval)
311 {
312 switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
313 {
314 #ifdef HAVE_CPU_M32RBF
315 case bfd_mach_m32r :
316 m32rbf_h_bbpsw_set (current_cpu, newval);
317 break;
318 #endif
319 default :
320 abort ();
321 }
322 }
323
324 /* Get the value of h-lock. */
325
326 BI
327 a_m32r_h_lock_get (SIM_CPU *current_cpu)
328 {
329 switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
330 {
331 #ifdef HAVE_CPU_M32RBF
332 case bfd_mach_m32r :
333 return m32rbf_h_lock_get (current_cpu);
334 #endif
335 default :
336 abort ();
337 }
338 }
339
340 /* Set a value for h-lock. */
341
342 void
343 a_m32r_h_lock_set (SIM_CPU *current_cpu, BI newval)
344 {
345 switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
346 {
347 #ifdef HAVE_CPU_M32RBF
348 case bfd_mach_m32r :
349 m32rbf_h_lock_set (current_cpu, newval);
350 break;
351 #endif
352 default :
353 abort ();
354 }
355 }
356