1 /* Simulator instruction decoder for m32r2f.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright 1996-2022 Free Software Foundation, Inc.
7 This file is part of the GNU simulators.
9 This file is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, see <http://www.gnu.org/licenses/>.
24 #define WANT_CPU m32r2f
25 #define WANT_CPU_M32R2F
28 #include "sim-assert.h"
30 /* Insn can't be executed in parallel.
31 Or is that "do NOt Pass to Air defense Radar"? :-) */
34 /* The instruction descriptor array.
35 This is computed at runtime. Space for it is not malloc'd to save a
36 teensy bit of cpu in the decoder. Moving it to malloc space is trivial
37 but won't be done until necessary (we don't currently support the runtime
38 addition of instructions nor an SMP machine with different cpus). */
39 static IDESC m32r2f_insn_data
[M32R2F_INSN__MAX
];
41 /* Commas between elements are contained in the macros.
42 Some of these are conditionally compiled out. */
44 static const struct insn_sem m32r2f_insn_sem
[] =
46 { VIRTUAL_INSN_X_INVALID
, M32R2F_INSN_X_INVALID
, M32R2F_SFMT_EMPTY
, NOPAR
, NOPAR
},
47 { VIRTUAL_INSN_X_AFTER
, M32R2F_INSN_X_AFTER
, M32R2F_SFMT_EMPTY
, NOPAR
, NOPAR
},
48 { VIRTUAL_INSN_X_BEFORE
, M32R2F_INSN_X_BEFORE
, M32R2F_SFMT_EMPTY
, NOPAR
, NOPAR
},
49 { VIRTUAL_INSN_X_CTI_CHAIN
, M32R2F_INSN_X_CTI_CHAIN
, M32R2F_SFMT_EMPTY
, NOPAR
, NOPAR
},
50 { VIRTUAL_INSN_X_CHAIN
, M32R2F_INSN_X_CHAIN
, M32R2F_SFMT_EMPTY
, NOPAR
, NOPAR
},
51 { VIRTUAL_INSN_X_BEGIN
, M32R2F_INSN_X_BEGIN
, M32R2F_SFMT_EMPTY
, NOPAR
, NOPAR
},
52 { M32R_INSN_ADD
, M32R2F_INSN_ADD
, M32R2F_SFMT_ADD
, M32R2F_INSN_PAR_ADD
, M32R2F_INSN_WRITE_ADD
},
53 { M32R_INSN_ADD3
, M32R2F_INSN_ADD3
, M32R2F_SFMT_ADD3
, NOPAR
, NOPAR
},
54 { M32R_INSN_AND
, M32R2F_INSN_AND
, M32R2F_SFMT_ADD
, M32R2F_INSN_PAR_AND
, M32R2F_INSN_WRITE_AND
},
55 { M32R_INSN_AND3
, M32R2F_INSN_AND3
, M32R2F_SFMT_AND3
, NOPAR
, NOPAR
},
56 { M32R_INSN_OR
, M32R2F_INSN_OR
, M32R2F_SFMT_ADD
, M32R2F_INSN_PAR_OR
, M32R2F_INSN_WRITE_OR
},
57 { M32R_INSN_OR3
, M32R2F_INSN_OR3
, M32R2F_SFMT_OR3
, NOPAR
, NOPAR
},
58 { M32R_INSN_XOR
, M32R2F_INSN_XOR
, M32R2F_SFMT_ADD
, M32R2F_INSN_PAR_XOR
, M32R2F_INSN_WRITE_XOR
},
59 { M32R_INSN_XOR3
, M32R2F_INSN_XOR3
, M32R2F_SFMT_AND3
, NOPAR
, NOPAR
},
60 { M32R_INSN_ADDI
, M32R2F_INSN_ADDI
, M32R2F_SFMT_ADDI
, M32R2F_INSN_PAR_ADDI
, M32R2F_INSN_WRITE_ADDI
},
61 { M32R_INSN_ADDV
, M32R2F_INSN_ADDV
, M32R2F_SFMT_ADDV
, M32R2F_INSN_PAR_ADDV
, M32R2F_INSN_WRITE_ADDV
},
62 { M32R_INSN_ADDV3
, M32R2F_INSN_ADDV3
, M32R2F_SFMT_ADDV3
, NOPAR
, NOPAR
},
63 { M32R_INSN_ADDX
, M32R2F_INSN_ADDX
, M32R2F_SFMT_ADDX
, M32R2F_INSN_PAR_ADDX
, M32R2F_INSN_WRITE_ADDX
},
64 { M32R_INSN_BC8
, M32R2F_INSN_BC8
, M32R2F_SFMT_BC8
, M32R2F_INSN_PAR_BC8
, M32R2F_INSN_WRITE_BC8
},
65 { M32R_INSN_BC24
, M32R2F_INSN_BC24
, M32R2F_SFMT_BC24
, NOPAR
, NOPAR
},
66 { M32R_INSN_BEQ
, M32R2F_INSN_BEQ
, M32R2F_SFMT_BEQ
, NOPAR
, NOPAR
},
67 { M32R_INSN_BEQZ
, M32R2F_INSN_BEQZ
, M32R2F_SFMT_BEQZ
, NOPAR
, NOPAR
},
68 { M32R_INSN_BGEZ
, M32R2F_INSN_BGEZ
, M32R2F_SFMT_BEQZ
, NOPAR
, NOPAR
},
69 { M32R_INSN_BGTZ
, M32R2F_INSN_BGTZ
, M32R2F_SFMT_BEQZ
, NOPAR
, NOPAR
},
70 { M32R_INSN_BLEZ
, M32R2F_INSN_BLEZ
, M32R2F_SFMT_BEQZ
, NOPAR
, NOPAR
},
71 { M32R_INSN_BLTZ
, M32R2F_INSN_BLTZ
, M32R2F_SFMT_BEQZ
, NOPAR
, NOPAR
},
72 { M32R_INSN_BNEZ
, M32R2F_INSN_BNEZ
, M32R2F_SFMT_BEQZ
, NOPAR
, NOPAR
},
73 { M32R_INSN_BL8
, M32R2F_INSN_BL8
, M32R2F_SFMT_BL8
, M32R2F_INSN_PAR_BL8
, M32R2F_INSN_WRITE_BL8
},
74 { M32R_INSN_BL24
, M32R2F_INSN_BL24
, M32R2F_SFMT_BL24
, NOPAR
, NOPAR
},
75 { M32R_INSN_BCL8
, M32R2F_INSN_BCL8
, M32R2F_SFMT_BCL8
, M32R2F_INSN_PAR_BCL8
, M32R2F_INSN_WRITE_BCL8
},
76 { M32R_INSN_BCL24
, M32R2F_INSN_BCL24
, M32R2F_SFMT_BCL24
, NOPAR
, NOPAR
},
77 { M32R_INSN_BNC8
, M32R2F_INSN_BNC8
, M32R2F_SFMT_BC8
, M32R2F_INSN_PAR_BNC8
, M32R2F_INSN_WRITE_BNC8
},
78 { M32R_INSN_BNC24
, M32R2F_INSN_BNC24
, M32R2F_SFMT_BC24
, NOPAR
, NOPAR
},
79 { M32R_INSN_BNE
, M32R2F_INSN_BNE
, M32R2F_SFMT_BEQ
, NOPAR
, NOPAR
},
80 { M32R_INSN_BRA8
, M32R2F_INSN_BRA8
, M32R2F_SFMT_BRA8
, M32R2F_INSN_PAR_BRA8
, M32R2F_INSN_WRITE_BRA8
},
81 { M32R_INSN_BRA24
, M32R2F_INSN_BRA24
, M32R2F_SFMT_BRA24
, NOPAR
, NOPAR
},
82 { M32R_INSN_BNCL8
, M32R2F_INSN_BNCL8
, M32R2F_SFMT_BCL8
, M32R2F_INSN_PAR_BNCL8
, M32R2F_INSN_WRITE_BNCL8
},
83 { M32R_INSN_BNCL24
, M32R2F_INSN_BNCL24
, M32R2F_SFMT_BCL24
, NOPAR
, NOPAR
},
84 { M32R_INSN_CMP
, M32R2F_INSN_CMP
, M32R2F_SFMT_CMP
, M32R2F_INSN_PAR_CMP
, M32R2F_INSN_WRITE_CMP
},
85 { M32R_INSN_CMPI
, M32R2F_INSN_CMPI
, M32R2F_SFMT_CMPI
, NOPAR
, NOPAR
},
86 { M32R_INSN_CMPU
, M32R2F_INSN_CMPU
, M32R2F_SFMT_CMP
, M32R2F_INSN_PAR_CMPU
, M32R2F_INSN_WRITE_CMPU
},
87 { M32R_INSN_CMPUI
, M32R2F_INSN_CMPUI
, M32R2F_SFMT_CMPI
, NOPAR
, NOPAR
},
88 { M32R_INSN_CMPEQ
, M32R2F_INSN_CMPEQ
, M32R2F_SFMT_CMP
, M32R2F_INSN_PAR_CMPEQ
, M32R2F_INSN_WRITE_CMPEQ
},
89 { M32R_INSN_CMPZ
, M32R2F_INSN_CMPZ
, M32R2F_SFMT_CMPZ
, M32R2F_INSN_PAR_CMPZ
, M32R2F_INSN_WRITE_CMPZ
},
90 { M32R_INSN_DIV
, M32R2F_INSN_DIV
, M32R2F_SFMT_DIV
, NOPAR
, NOPAR
},
91 { M32R_INSN_DIVU
, M32R2F_INSN_DIVU
, M32R2F_SFMT_DIV
, NOPAR
, NOPAR
},
92 { M32R_INSN_REM
, M32R2F_INSN_REM
, M32R2F_SFMT_DIV
, NOPAR
, NOPAR
},
93 { M32R_INSN_REMU
, M32R2F_INSN_REMU
, M32R2F_SFMT_DIV
, NOPAR
, NOPAR
},
94 { M32R_INSN_REMH
, M32R2F_INSN_REMH
, M32R2F_SFMT_DIV
, NOPAR
, NOPAR
},
95 { M32R_INSN_REMUH
, M32R2F_INSN_REMUH
, M32R2F_SFMT_DIV
, NOPAR
, NOPAR
},
96 { M32R_INSN_REMB
, M32R2F_INSN_REMB
, M32R2F_SFMT_DIV
, NOPAR
, NOPAR
},
97 { M32R_INSN_REMUB
, M32R2F_INSN_REMUB
, M32R2F_SFMT_DIV
, NOPAR
, NOPAR
},
98 { M32R_INSN_DIVUH
, M32R2F_INSN_DIVUH
, M32R2F_SFMT_DIV
, NOPAR
, NOPAR
},
99 { M32R_INSN_DIVB
, M32R2F_INSN_DIVB
, M32R2F_SFMT_DIV
, NOPAR
, NOPAR
},
100 { M32R_INSN_DIVUB
, M32R2F_INSN_DIVUB
, M32R2F_SFMT_DIV
, NOPAR
, NOPAR
},
101 { M32R_INSN_DIVH
, M32R2F_INSN_DIVH
, M32R2F_SFMT_DIV
, NOPAR
, NOPAR
},
102 { M32R_INSN_JC
, M32R2F_INSN_JC
, M32R2F_SFMT_JC
, M32R2F_INSN_PAR_JC
, M32R2F_INSN_WRITE_JC
},
103 { M32R_INSN_JNC
, M32R2F_INSN_JNC
, M32R2F_SFMT_JC
, M32R2F_INSN_PAR_JNC
, M32R2F_INSN_WRITE_JNC
},
104 { M32R_INSN_JL
, M32R2F_INSN_JL
, M32R2F_SFMT_JL
, M32R2F_INSN_PAR_JL
, M32R2F_INSN_WRITE_JL
},
105 { M32R_INSN_JMP
, M32R2F_INSN_JMP
, M32R2F_SFMT_JMP
, M32R2F_INSN_PAR_JMP
, M32R2F_INSN_WRITE_JMP
},
106 { M32R_INSN_LD
, M32R2F_INSN_LD
, M32R2F_SFMT_LD
, M32R2F_INSN_PAR_LD
, M32R2F_INSN_WRITE_LD
},
107 { M32R_INSN_LD_D
, M32R2F_INSN_LD_D
, M32R2F_SFMT_LD_D
, NOPAR
, NOPAR
},
108 { M32R_INSN_LDB
, M32R2F_INSN_LDB
, M32R2F_SFMT_LDB
, M32R2F_INSN_PAR_LDB
, M32R2F_INSN_WRITE_LDB
},
109 { M32R_INSN_LDB_D
, M32R2F_INSN_LDB_D
, M32R2F_SFMT_LDB_D
, NOPAR
, NOPAR
},
110 { M32R_INSN_LDH
, M32R2F_INSN_LDH
, M32R2F_SFMT_LDH
, M32R2F_INSN_PAR_LDH
, M32R2F_INSN_WRITE_LDH
},
111 { M32R_INSN_LDH_D
, M32R2F_INSN_LDH_D
, M32R2F_SFMT_LDH_D
, NOPAR
, NOPAR
},
112 { M32R_INSN_LDUB
, M32R2F_INSN_LDUB
, M32R2F_SFMT_LDB
, M32R2F_INSN_PAR_LDUB
, M32R2F_INSN_WRITE_LDUB
},
113 { M32R_INSN_LDUB_D
, M32R2F_INSN_LDUB_D
, M32R2F_SFMT_LDB_D
, NOPAR
, NOPAR
},
114 { M32R_INSN_LDUH
, M32R2F_INSN_LDUH
, M32R2F_SFMT_LDH
, M32R2F_INSN_PAR_LDUH
, M32R2F_INSN_WRITE_LDUH
},
115 { M32R_INSN_LDUH_D
, M32R2F_INSN_LDUH_D
, M32R2F_SFMT_LDH_D
, NOPAR
, NOPAR
},
116 { M32R_INSN_LD_PLUS
, M32R2F_INSN_LD_PLUS
, M32R2F_SFMT_LD_PLUS
, M32R2F_INSN_PAR_LD_PLUS
, M32R2F_INSN_WRITE_LD_PLUS
},
117 { M32R_INSN_LD24
, M32R2F_INSN_LD24
, M32R2F_SFMT_LD24
, NOPAR
, NOPAR
},
118 { M32R_INSN_LDI8
, M32R2F_INSN_LDI8
, M32R2F_SFMT_LDI8
, M32R2F_INSN_PAR_LDI8
, M32R2F_INSN_WRITE_LDI8
},
119 { M32R_INSN_LDI16
, M32R2F_INSN_LDI16
, M32R2F_SFMT_LDI16
, NOPAR
, NOPAR
},
120 { M32R_INSN_LOCK
, M32R2F_INSN_LOCK
, M32R2F_SFMT_LOCK
, M32R2F_INSN_PAR_LOCK
, M32R2F_INSN_WRITE_LOCK
},
121 { M32R_INSN_MACHI_A
, M32R2F_INSN_MACHI_A
, M32R2F_SFMT_MACHI_A
, M32R2F_INSN_PAR_MACHI_A
, M32R2F_INSN_WRITE_MACHI_A
},
122 { M32R_INSN_MACLO_A
, M32R2F_INSN_MACLO_A
, M32R2F_SFMT_MACHI_A
, M32R2F_INSN_PAR_MACLO_A
, M32R2F_INSN_WRITE_MACLO_A
},
123 { M32R_INSN_MACWHI_A
, M32R2F_INSN_MACWHI_A
, M32R2F_SFMT_MACHI_A
, M32R2F_INSN_PAR_MACWHI_A
, M32R2F_INSN_WRITE_MACWHI_A
},
124 { M32R_INSN_MACWLO_A
, M32R2F_INSN_MACWLO_A
, M32R2F_SFMT_MACHI_A
, M32R2F_INSN_PAR_MACWLO_A
, M32R2F_INSN_WRITE_MACWLO_A
},
125 { M32R_INSN_MUL
, M32R2F_INSN_MUL
, M32R2F_SFMT_ADD
, M32R2F_INSN_PAR_MUL
, M32R2F_INSN_WRITE_MUL
},
126 { M32R_INSN_MULHI_A
, M32R2F_INSN_MULHI_A
, M32R2F_SFMT_MULHI_A
, M32R2F_INSN_PAR_MULHI_A
, M32R2F_INSN_WRITE_MULHI_A
},
127 { M32R_INSN_MULLO_A
, M32R2F_INSN_MULLO_A
, M32R2F_SFMT_MULHI_A
, M32R2F_INSN_PAR_MULLO_A
, M32R2F_INSN_WRITE_MULLO_A
},
128 { M32R_INSN_MULWHI_A
, M32R2F_INSN_MULWHI_A
, M32R2F_SFMT_MULHI_A
, M32R2F_INSN_PAR_MULWHI_A
, M32R2F_INSN_WRITE_MULWHI_A
},
129 { M32R_INSN_MULWLO_A
, M32R2F_INSN_MULWLO_A
, M32R2F_SFMT_MULHI_A
, M32R2F_INSN_PAR_MULWLO_A
, M32R2F_INSN_WRITE_MULWLO_A
},
130 { M32R_INSN_MV
, M32R2F_INSN_MV
, M32R2F_SFMT_MV
, M32R2F_INSN_PAR_MV
, M32R2F_INSN_WRITE_MV
},
131 { M32R_INSN_MVFACHI_A
, M32R2F_INSN_MVFACHI_A
, M32R2F_SFMT_MVFACHI_A
, M32R2F_INSN_PAR_MVFACHI_A
, M32R2F_INSN_WRITE_MVFACHI_A
},
132 { M32R_INSN_MVFACLO_A
, M32R2F_INSN_MVFACLO_A
, M32R2F_SFMT_MVFACHI_A
, M32R2F_INSN_PAR_MVFACLO_A
, M32R2F_INSN_WRITE_MVFACLO_A
},
133 { M32R_INSN_MVFACMI_A
, M32R2F_INSN_MVFACMI_A
, M32R2F_SFMT_MVFACHI_A
, M32R2F_INSN_PAR_MVFACMI_A
, M32R2F_INSN_WRITE_MVFACMI_A
},
134 { M32R_INSN_MVFC
, M32R2F_INSN_MVFC
, M32R2F_SFMT_MVFC
, M32R2F_INSN_PAR_MVFC
, M32R2F_INSN_WRITE_MVFC
},
135 { M32R_INSN_MVTACHI_A
, M32R2F_INSN_MVTACHI_A
, M32R2F_SFMT_MVTACHI_A
, M32R2F_INSN_PAR_MVTACHI_A
, M32R2F_INSN_WRITE_MVTACHI_A
},
136 { M32R_INSN_MVTACLO_A
, M32R2F_INSN_MVTACLO_A
, M32R2F_SFMT_MVTACHI_A
, M32R2F_INSN_PAR_MVTACLO_A
, M32R2F_INSN_WRITE_MVTACLO_A
},
137 { M32R_INSN_MVTC
, M32R2F_INSN_MVTC
, M32R2F_SFMT_MVTC
, M32R2F_INSN_PAR_MVTC
, M32R2F_INSN_WRITE_MVTC
},
138 { M32R_INSN_NEG
, M32R2F_INSN_NEG
, M32R2F_SFMT_MV
, M32R2F_INSN_PAR_NEG
, M32R2F_INSN_WRITE_NEG
},
139 { M32R_INSN_NOP
, M32R2F_INSN_NOP
, M32R2F_SFMT_NOP
, M32R2F_INSN_PAR_NOP
, M32R2F_INSN_WRITE_NOP
},
140 { M32R_INSN_NOT
, M32R2F_INSN_NOT
, M32R2F_SFMT_MV
, M32R2F_INSN_PAR_NOT
, M32R2F_INSN_WRITE_NOT
},
141 { M32R_INSN_RAC_DSI
, M32R2F_INSN_RAC_DSI
, M32R2F_SFMT_RAC_DSI
, M32R2F_INSN_PAR_RAC_DSI
, M32R2F_INSN_WRITE_RAC_DSI
},
142 { M32R_INSN_RACH_DSI
, M32R2F_INSN_RACH_DSI
, M32R2F_SFMT_RAC_DSI
, M32R2F_INSN_PAR_RACH_DSI
, M32R2F_INSN_WRITE_RACH_DSI
},
143 { M32R_INSN_RTE
, M32R2F_INSN_RTE
, M32R2F_SFMT_RTE
, M32R2F_INSN_PAR_RTE
, M32R2F_INSN_WRITE_RTE
},
144 { M32R_INSN_SETH
, M32R2F_INSN_SETH
, M32R2F_SFMT_SETH
, NOPAR
, NOPAR
},
145 { M32R_INSN_SLL
, M32R2F_INSN_SLL
, M32R2F_SFMT_ADD
, M32R2F_INSN_PAR_SLL
, M32R2F_INSN_WRITE_SLL
},
146 { M32R_INSN_SLL3
, M32R2F_INSN_SLL3
, M32R2F_SFMT_SLL3
, NOPAR
, NOPAR
},
147 { M32R_INSN_SLLI
, M32R2F_INSN_SLLI
, M32R2F_SFMT_SLLI
, M32R2F_INSN_PAR_SLLI
, M32R2F_INSN_WRITE_SLLI
},
148 { M32R_INSN_SRA
, M32R2F_INSN_SRA
, M32R2F_SFMT_ADD
, M32R2F_INSN_PAR_SRA
, M32R2F_INSN_WRITE_SRA
},
149 { M32R_INSN_SRA3
, M32R2F_INSN_SRA3
, M32R2F_SFMT_SLL3
, NOPAR
, NOPAR
},
150 { M32R_INSN_SRAI
, M32R2F_INSN_SRAI
, M32R2F_SFMT_SLLI
, M32R2F_INSN_PAR_SRAI
, M32R2F_INSN_WRITE_SRAI
},
151 { M32R_INSN_SRL
, M32R2F_INSN_SRL
, M32R2F_SFMT_ADD
, M32R2F_INSN_PAR_SRL
, M32R2F_INSN_WRITE_SRL
},
152 { M32R_INSN_SRL3
, M32R2F_INSN_SRL3
, M32R2F_SFMT_SLL3
, NOPAR
, NOPAR
},
153 { M32R_INSN_SRLI
, M32R2F_INSN_SRLI
, M32R2F_SFMT_SLLI
, M32R2F_INSN_PAR_SRLI
, M32R2F_INSN_WRITE_SRLI
},
154 { M32R_INSN_ST
, M32R2F_INSN_ST
, M32R2F_SFMT_ST
, M32R2F_INSN_PAR_ST
, M32R2F_INSN_WRITE_ST
},
155 { M32R_INSN_ST_D
, M32R2F_INSN_ST_D
, M32R2F_SFMT_ST_D
, NOPAR
, NOPAR
},
156 { M32R_INSN_STB
, M32R2F_INSN_STB
, M32R2F_SFMT_STB
, M32R2F_INSN_PAR_STB
, M32R2F_INSN_WRITE_STB
},
157 { M32R_INSN_STB_D
, M32R2F_INSN_STB_D
, M32R2F_SFMT_STB_D
, NOPAR
, NOPAR
},
158 { M32R_INSN_STH
, M32R2F_INSN_STH
, M32R2F_SFMT_STH
, M32R2F_INSN_PAR_STH
, M32R2F_INSN_WRITE_STH
},
159 { M32R_INSN_STH_D
, M32R2F_INSN_STH_D
, M32R2F_SFMT_STH_D
, NOPAR
, NOPAR
},
160 { M32R_INSN_ST_PLUS
, M32R2F_INSN_ST_PLUS
, M32R2F_SFMT_ST_PLUS
, M32R2F_INSN_PAR_ST_PLUS
, M32R2F_INSN_WRITE_ST_PLUS
},
161 { M32R_INSN_STH_PLUS
, M32R2F_INSN_STH_PLUS
, M32R2F_SFMT_STH_PLUS
, M32R2F_INSN_PAR_STH_PLUS
, M32R2F_INSN_WRITE_STH_PLUS
},
162 { M32R_INSN_STB_PLUS
, M32R2F_INSN_STB_PLUS
, M32R2F_SFMT_STB_PLUS
, M32R2F_INSN_PAR_STB_PLUS
, M32R2F_INSN_WRITE_STB_PLUS
},
163 { M32R_INSN_ST_MINUS
, M32R2F_INSN_ST_MINUS
, M32R2F_SFMT_ST_PLUS
, M32R2F_INSN_PAR_ST_MINUS
, M32R2F_INSN_WRITE_ST_MINUS
},
164 { M32R_INSN_SUB
, M32R2F_INSN_SUB
, M32R2F_SFMT_ADD
, M32R2F_INSN_PAR_SUB
, M32R2F_INSN_WRITE_SUB
},
165 { M32R_INSN_SUBV
, M32R2F_INSN_SUBV
, M32R2F_SFMT_ADDV
, M32R2F_INSN_PAR_SUBV
, M32R2F_INSN_WRITE_SUBV
},
166 { M32R_INSN_SUBX
, M32R2F_INSN_SUBX
, M32R2F_SFMT_ADDX
, M32R2F_INSN_PAR_SUBX
, M32R2F_INSN_WRITE_SUBX
},
167 { M32R_INSN_TRAP
, M32R2F_INSN_TRAP
, M32R2F_SFMT_TRAP
, M32R2F_INSN_PAR_TRAP
, M32R2F_INSN_WRITE_TRAP
},
168 { M32R_INSN_UNLOCK
, M32R2F_INSN_UNLOCK
, M32R2F_SFMT_UNLOCK
, M32R2F_INSN_PAR_UNLOCK
, M32R2F_INSN_WRITE_UNLOCK
},
169 { M32R_INSN_SATB
, M32R2F_INSN_SATB
, M32R2F_SFMT_SATB
, NOPAR
, NOPAR
},
170 { M32R_INSN_SATH
, M32R2F_INSN_SATH
, M32R2F_SFMT_SATB
, NOPAR
, NOPAR
},
171 { M32R_INSN_SAT
, M32R2F_INSN_SAT
, M32R2F_SFMT_SAT
, NOPAR
, NOPAR
},
172 { M32R_INSN_PCMPBZ
, M32R2F_INSN_PCMPBZ
, M32R2F_SFMT_CMPZ
, M32R2F_INSN_PAR_PCMPBZ
, M32R2F_INSN_WRITE_PCMPBZ
},
173 { M32R_INSN_SADD
, M32R2F_INSN_SADD
, M32R2F_SFMT_SADD
, M32R2F_INSN_PAR_SADD
, M32R2F_INSN_WRITE_SADD
},
174 { M32R_INSN_MACWU1
, M32R2F_INSN_MACWU1
, M32R2F_SFMT_MACWU1
, M32R2F_INSN_PAR_MACWU1
, M32R2F_INSN_WRITE_MACWU1
},
175 { M32R_INSN_MSBLO
, M32R2F_INSN_MSBLO
, M32R2F_SFMT_MSBLO
, M32R2F_INSN_PAR_MSBLO
, M32R2F_INSN_WRITE_MSBLO
},
176 { M32R_INSN_MULWU1
, M32R2F_INSN_MULWU1
, M32R2F_SFMT_MULWU1
, M32R2F_INSN_PAR_MULWU1
, M32R2F_INSN_WRITE_MULWU1
},
177 { M32R_INSN_MACLH1
, M32R2F_INSN_MACLH1
, M32R2F_SFMT_MACWU1
, M32R2F_INSN_PAR_MACLH1
, M32R2F_INSN_WRITE_MACLH1
},
178 { M32R_INSN_SC
, M32R2F_INSN_SC
, M32R2F_SFMT_SC
, M32R2F_INSN_PAR_SC
, M32R2F_INSN_WRITE_SC
},
179 { M32R_INSN_SNC
, M32R2F_INSN_SNC
, M32R2F_SFMT_SC
, M32R2F_INSN_PAR_SNC
, M32R2F_INSN_WRITE_SNC
},
180 { M32R_INSN_CLRPSW
, M32R2F_INSN_CLRPSW
, M32R2F_SFMT_CLRPSW
, M32R2F_INSN_PAR_CLRPSW
, M32R2F_INSN_WRITE_CLRPSW
},
181 { M32R_INSN_SETPSW
, M32R2F_INSN_SETPSW
, M32R2F_SFMT_SETPSW
, M32R2F_INSN_PAR_SETPSW
, M32R2F_INSN_WRITE_SETPSW
},
182 { M32R_INSN_BSET
, M32R2F_INSN_BSET
, M32R2F_SFMT_BSET
, NOPAR
, NOPAR
},
183 { M32R_INSN_BCLR
, M32R2F_INSN_BCLR
, M32R2F_SFMT_BSET
, NOPAR
, NOPAR
},
184 { M32R_INSN_BTST
, M32R2F_INSN_BTST
, M32R2F_SFMT_BTST
, M32R2F_INSN_PAR_BTST
, M32R2F_INSN_WRITE_BTST
},
187 static const struct insn_sem m32r2f_insn_sem_invalid
=
189 VIRTUAL_INSN_X_INVALID
, M32R2F_INSN_X_INVALID
, M32R2F_SFMT_EMPTY
, NOPAR
, NOPAR
192 /* Initialize an IDESC from the compile-time computable parts. */
195 init_idesc (SIM_CPU
*cpu
, IDESC
*id
, const struct insn_sem
*t
)
197 const CGEN_INSN
*insn_table
= CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu
))->init_entries
;
201 if ((int) t
->type
<= 0)
202 id
->idata
= & cgen_virtual_insn_table
[- (int) t
->type
];
204 id
->idata
= & insn_table
[t
->type
];
205 id
->attrs
= CGEN_INSN_ATTRS (id
->idata
);
206 /* Oh my god, a magic number. */
207 id
->length
= CGEN_INSN_BITSIZE (id
->idata
) / 8;
209 #if WITH_PROFILE_MODEL_P
210 id
->timing
= & MODEL_TIMING (CPU_MODEL (cpu
)) [t
->index
];
212 SIM_DESC sd
= CPU_STATE (cpu
);
213 SIM_ASSERT (t
->index
== id
->timing
->num
);
217 /* Semantic pointers are initialized elsewhere. */
220 /* Initialize the instruction descriptor table. */
223 m32r2f_init_idesc_table (SIM_CPU
*cpu
)
226 const struct insn_sem
*t
,*tend
;
227 int tabsize
= M32R2F_INSN__MAX
;
228 IDESC
*table
= m32r2f_insn_data
;
230 memset (table
, 0, tabsize
* sizeof (IDESC
));
232 /* First set all entries to the `invalid insn'. */
233 t
= & m32r2f_insn_sem_invalid
;
234 for (id
= table
, tabend
= table
+ tabsize
; id
< tabend
; ++id
)
235 init_idesc (cpu
, id
, t
);
237 /* Now fill in the values for the chosen cpu. */
238 for (t
= m32r2f_insn_sem
, tend
= t
+ ARRAY_SIZE (m32r2f_insn_sem
);
241 init_idesc (cpu
, & table
[t
->index
], t
);
242 if (t
->par_index
!= NOPAR
)
244 init_idesc (cpu
, &table
[t
->par_index
], t
);
245 table
[t
->index
].par_idesc
= &table
[t
->par_index
];
247 if (t
->par_index
!= NOPAR
)
249 init_idesc (cpu
, &table
[t
->write_index
], t
);
250 table
[t
->par_index
].par_idesc
= &table
[t
->write_index
];
254 /* Link the IDESC table into the cpu. */
255 CPU_IDESC (cpu
) = table
;
258 /* Given an instruction, return a pointer to its IDESC entry. */
261 m32r2f_decode (SIM_CPU
*current_cpu
, IADDR pc
,
262 CGEN_INSN_WORD base_insn
, CGEN_INSN_WORD entire_insn
,
265 /* Result of decoder. */
266 M32R2F_INSN_TYPE itype
;
269 CGEN_INSN_WORD insn
= base_insn
;
272 unsigned int val
= (((insn
>> 8) & (15 << 4)) | ((insn
>> 4) & (15 << 0)));
275 case 0 : itype
= M32R2F_INSN_SUBV
; goto extract_sfmt_addv
;
276 case 1 : itype
= M32R2F_INSN_SUBX
; goto extract_sfmt_addx
;
277 case 2 : itype
= M32R2F_INSN_SUB
; goto extract_sfmt_add
;
278 case 3 : itype
= M32R2F_INSN_NEG
; goto extract_sfmt_mv
;
279 case 4 : itype
= M32R2F_INSN_CMP
; goto extract_sfmt_cmp
;
280 case 5 : itype
= M32R2F_INSN_CMPU
; goto extract_sfmt_cmp
;
281 case 6 : itype
= M32R2F_INSN_CMPEQ
; goto extract_sfmt_cmp
;
284 unsigned int val
= (((insn
>> 8) & (3 << 0)));
288 if ((entire_insn
& 0xfff0) == 0x70)
289 { itype
= M32R2F_INSN_CMPZ
; goto extract_sfmt_cmpz
; }
290 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
292 if ((entire_insn
& 0xfff0) == 0x370)
293 { itype
= M32R2F_INSN_PCMPBZ
; goto extract_sfmt_cmpz
; }
294 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
295 default : itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
298 case 8 : itype
= M32R2F_INSN_ADDV
; goto extract_sfmt_addv
;
299 case 9 : itype
= M32R2F_INSN_ADDX
; goto extract_sfmt_addx
;
300 case 10 : itype
= M32R2F_INSN_ADD
; goto extract_sfmt_add
;
301 case 11 : itype
= M32R2F_INSN_NOT
; goto extract_sfmt_mv
;
302 case 12 : itype
= M32R2F_INSN_AND
; goto extract_sfmt_add
;
303 case 13 : itype
= M32R2F_INSN_XOR
; goto extract_sfmt_add
;
304 case 14 : itype
= M32R2F_INSN_OR
; goto extract_sfmt_add
;
306 if ((entire_insn
& 0xf8f0) == 0xf0)
307 { itype
= M32R2F_INSN_BTST
; goto extract_sfmt_btst
; }
308 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
309 case 16 : itype
= M32R2F_INSN_SRL
; goto extract_sfmt_add
;
310 case 18 : itype
= M32R2F_INSN_SRA
; goto extract_sfmt_add
;
311 case 20 : itype
= M32R2F_INSN_SLL
; goto extract_sfmt_add
;
312 case 22 : itype
= M32R2F_INSN_MUL
; goto extract_sfmt_add
;
313 case 24 : itype
= M32R2F_INSN_MV
; goto extract_sfmt_mv
;
314 case 25 : itype
= M32R2F_INSN_MVFC
; goto extract_sfmt_mvfc
;
315 case 26 : itype
= M32R2F_INSN_MVTC
; goto extract_sfmt_mvtc
;
318 unsigned int val
= (((insn
>> 8) & (3 << 0)));
322 if ((entire_insn
& 0xfff0) == 0x1cc0)
323 { itype
= M32R2F_INSN_JC
; goto extract_sfmt_jc
; }
324 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
326 if ((entire_insn
& 0xfff0) == 0x1dc0)
327 { itype
= M32R2F_INSN_JNC
; goto extract_sfmt_jc
; }
328 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
330 if ((entire_insn
& 0xfff0) == 0x1ec0)
331 { itype
= M32R2F_INSN_JL
; goto extract_sfmt_jl
; }
332 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
334 if ((entire_insn
& 0xfff0) == 0x1fc0)
335 { itype
= M32R2F_INSN_JMP
; goto extract_sfmt_jmp
; }
336 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
337 default : itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
341 if ((entire_insn
& 0xffff) == 0x10d6)
342 { itype
= M32R2F_INSN_RTE
; goto extract_sfmt_rte
; }
343 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
345 if ((entire_insn
& 0xfff0) == 0x10f0)
346 { itype
= M32R2F_INSN_TRAP
; goto extract_sfmt_trap
; }
347 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
348 case 32 : itype
= M32R2F_INSN_STB
; goto extract_sfmt_stb
;
349 case 33 : itype
= M32R2F_INSN_STB_PLUS
; goto extract_sfmt_stb_plus
;
350 case 34 : itype
= M32R2F_INSN_STH
; goto extract_sfmt_sth
;
351 case 35 : itype
= M32R2F_INSN_STH_PLUS
; goto extract_sfmt_sth_plus
;
352 case 36 : itype
= M32R2F_INSN_ST
; goto extract_sfmt_st
;
353 case 37 : itype
= M32R2F_INSN_UNLOCK
; goto extract_sfmt_unlock
;
354 case 38 : itype
= M32R2F_INSN_ST_PLUS
; goto extract_sfmt_st_plus
;
355 case 39 : itype
= M32R2F_INSN_ST_MINUS
; goto extract_sfmt_st_plus
;
356 case 40 : itype
= M32R2F_INSN_LDB
; goto extract_sfmt_ldb
;
357 case 41 : itype
= M32R2F_INSN_LDUB
; goto extract_sfmt_ldb
;
358 case 42 : itype
= M32R2F_INSN_LDH
; goto extract_sfmt_ldh
;
359 case 43 : itype
= M32R2F_INSN_LDUH
; goto extract_sfmt_ldh
;
360 case 44 : itype
= M32R2F_INSN_LD
; goto extract_sfmt_ld
;
361 case 45 : itype
= M32R2F_INSN_LOCK
; goto extract_sfmt_lock
;
362 case 46 : itype
= M32R2F_INSN_LD_PLUS
; goto extract_sfmt_ld_plus
;
363 case 48 : /* fall through */
364 case 56 : itype
= M32R2F_INSN_MULHI_A
; goto extract_sfmt_mulhi_a
;
365 case 49 : /* fall through */
366 case 57 : itype
= M32R2F_INSN_MULLO_A
; goto extract_sfmt_mulhi_a
;
367 case 50 : /* fall through */
368 case 58 : itype
= M32R2F_INSN_MULWHI_A
; goto extract_sfmt_mulhi_a
;
369 case 51 : /* fall through */
370 case 59 : itype
= M32R2F_INSN_MULWLO_A
; goto extract_sfmt_mulhi_a
;
371 case 52 : /* fall through */
372 case 60 : itype
= M32R2F_INSN_MACHI_A
; goto extract_sfmt_machi_a
;
373 case 53 : /* fall through */
374 case 61 : itype
= M32R2F_INSN_MACLO_A
; goto extract_sfmt_machi_a
;
375 case 54 : /* fall through */
376 case 62 : itype
= M32R2F_INSN_MACWHI_A
; goto extract_sfmt_machi_a
;
377 case 55 : /* fall through */
378 case 63 : itype
= M32R2F_INSN_MACWLO_A
; goto extract_sfmt_machi_a
;
379 case 64 : /* fall through */
380 case 65 : /* fall through */
381 case 66 : /* fall through */
382 case 67 : /* fall through */
383 case 68 : /* fall through */
384 case 69 : /* fall through */
385 case 70 : /* fall through */
386 case 71 : /* fall through */
387 case 72 : /* fall through */
388 case 73 : /* fall through */
389 case 74 : /* fall through */
390 case 75 : /* fall through */
391 case 76 : /* fall through */
392 case 77 : /* fall through */
393 case 78 : /* fall through */
394 case 79 : itype
= M32R2F_INSN_ADDI
; goto extract_sfmt_addi
;
395 case 80 : /* fall through */
396 case 81 : itype
= M32R2F_INSN_SRLI
; goto extract_sfmt_slli
;
397 case 82 : /* fall through */
398 case 83 : itype
= M32R2F_INSN_SRAI
; goto extract_sfmt_slli
;
399 case 84 : /* fall through */
400 case 85 : itype
= M32R2F_INSN_SLLI
; goto extract_sfmt_slli
;
403 unsigned int val
= (((insn
>> 0) & (1 << 0)));
407 if ((entire_insn
& 0xf0f3) == 0x5070)
408 { itype
= M32R2F_INSN_MVTACHI_A
; goto extract_sfmt_mvtachi_a
; }
409 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
411 if ((entire_insn
& 0xf0f3) == 0x5071)
412 { itype
= M32R2F_INSN_MVTACLO_A
; goto extract_sfmt_mvtachi_a
; }
413 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
414 default : itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
418 if ((entire_insn
& 0xf3f2) == 0x5080)
419 { itype
= M32R2F_INSN_RACH_DSI
; goto extract_sfmt_rac_dsi
; }
420 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
422 if ((entire_insn
& 0xf3f2) == 0x5090)
423 { itype
= M32R2F_INSN_RAC_DSI
; goto extract_sfmt_rac_dsi
; }
424 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
425 case 90 : itype
= M32R2F_INSN_MULWU1
; goto extract_sfmt_mulwu1
;
426 case 91 : itype
= M32R2F_INSN_MACWU1
; goto extract_sfmt_macwu1
;
427 case 92 : itype
= M32R2F_INSN_MACLH1
; goto extract_sfmt_macwu1
;
428 case 93 : itype
= M32R2F_INSN_MSBLO
; goto extract_sfmt_msblo
;
430 if ((entire_insn
& 0xffff) == 0x50e4)
431 { itype
= M32R2F_INSN_SADD
; goto extract_sfmt_sadd
; }
432 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
435 unsigned int val
= (((insn
>> 0) & (3 << 0)));
438 case 0 : itype
= M32R2F_INSN_MVFACHI_A
; goto extract_sfmt_mvfachi_a
;
439 case 1 : itype
= M32R2F_INSN_MVFACLO_A
; goto extract_sfmt_mvfachi_a
;
440 case 2 : itype
= M32R2F_INSN_MVFACMI_A
; goto extract_sfmt_mvfachi_a
;
441 default : itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
444 case 96 : /* fall through */
445 case 97 : /* fall through */
446 case 98 : /* fall through */
447 case 99 : /* fall through */
448 case 100 : /* fall through */
449 case 101 : /* fall through */
450 case 102 : /* fall through */
451 case 103 : /* fall through */
452 case 104 : /* fall through */
453 case 105 : /* fall through */
454 case 106 : /* fall through */
455 case 107 : /* fall through */
456 case 108 : /* fall through */
457 case 109 : /* fall through */
458 case 110 : /* fall through */
459 case 111 : itype
= M32R2F_INSN_LDI8
; goto extract_sfmt_ldi8
;
462 unsigned int val
= (((insn
>> 7) & (15 << 1)) | ((insn
>> 0) & (1 << 0)));
466 if ((entire_insn
& 0xffff) == 0x7000)
467 { itype
= M32R2F_INSN_NOP
; goto extract_sfmt_nop
; }
468 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
469 case 2 : /* fall through */
470 case 3 : itype
= M32R2F_INSN_SETPSW
; goto extract_sfmt_setpsw
;
471 case 4 : /* fall through */
472 case 5 : itype
= M32R2F_INSN_CLRPSW
; goto extract_sfmt_clrpsw
;
474 if ((entire_insn
& 0xffff) == 0x7401)
475 { itype
= M32R2F_INSN_SC
; goto extract_sfmt_sc
; }
476 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
478 if ((entire_insn
& 0xffff) == 0x7501)
479 { itype
= M32R2F_INSN_SNC
; goto extract_sfmt_sc
; }
480 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
481 case 16 : /* fall through */
482 case 17 : itype
= M32R2F_INSN_BCL8
; goto extract_sfmt_bcl8
;
483 case 18 : /* fall through */
484 case 19 : itype
= M32R2F_INSN_BNCL8
; goto extract_sfmt_bcl8
;
485 case 24 : /* fall through */
486 case 25 : itype
= M32R2F_INSN_BC8
; goto extract_sfmt_bc8
;
487 case 26 : /* fall through */
488 case 27 : itype
= M32R2F_INSN_BNC8
; goto extract_sfmt_bc8
;
489 case 28 : /* fall through */
490 case 29 : itype
= M32R2F_INSN_BL8
; goto extract_sfmt_bl8
;
491 case 30 : /* fall through */
492 case 31 : itype
= M32R2F_INSN_BRA8
; goto extract_sfmt_bra8
;
493 default : itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
496 case 113 : /* fall through */
497 case 114 : /* fall through */
498 case 115 : /* fall through */
499 case 116 : /* fall through */
500 case 117 : /* fall through */
501 case 118 : /* fall through */
502 case 119 : /* fall through */
503 case 120 : /* fall through */
504 case 121 : /* fall through */
505 case 122 : /* fall through */
506 case 123 : /* fall through */
507 case 124 : /* fall through */
508 case 125 : /* fall through */
509 case 126 : /* fall through */
512 unsigned int val
= (((insn
>> 8) & (15 << 0)));
515 case 1 : itype
= M32R2F_INSN_SETPSW
; goto extract_sfmt_setpsw
;
516 case 2 : itype
= M32R2F_INSN_CLRPSW
; goto extract_sfmt_clrpsw
;
517 case 8 : itype
= M32R2F_INSN_BCL8
; goto extract_sfmt_bcl8
;
518 case 9 : itype
= M32R2F_INSN_BNCL8
; goto extract_sfmt_bcl8
;
519 case 12 : itype
= M32R2F_INSN_BC8
; goto extract_sfmt_bc8
;
520 case 13 : itype
= M32R2F_INSN_BNC8
; goto extract_sfmt_bc8
;
521 case 14 : itype
= M32R2F_INSN_BL8
; goto extract_sfmt_bl8
;
522 case 15 : itype
= M32R2F_INSN_BRA8
; goto extract_sfmt_bra8
;
523 default : itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
527 if ((entire_insn
& 0xfff00000) == 0x80400000)
528 { itype
= M32R2F_INSN_CMPI
; goto extract_sfmt_cmpi
; }
529 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
531 if ((entire_insn
& 0xfff00000) == 0x80500000)
532 { itype
= M32R2F_INSN_CMPUI
; goto extract_sfmt_cmpi
; }
533 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
536 unsigned int val
= (((entire_insn
>> 8) & (3 << 0)));
540 if ((entire_insn
& 0xf0f0ffff) == 0x80600000)
541 { itype
= M32R2F_INSN_SAT
; goto extract_sfmt_sat
; }
542 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
544 if ((entire_insn
& 0xf0f0ffff) == 0x80600200)
545 { itype
= M32R2F_INSN_SATH
; goto extract_sfmt_satb
; }
546 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
548 if ((entire_insn
& 0xf0f0ffff) == 0x80600300)
549 { itype
= M32R2F_INSN_SATB
; goto extract_sfmt_satb
; }
550 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
551 default : itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
554 case 136 : itype
= M32R2F_INSN_ADDV3
; goto extract_sfmt_addv3
;
555 case 138 : itype
= M32R2F_INSN_ADD3
; goto extract_sfmt_add3
;
556 case 140 : itype
= M32R2F_INSN_AND3
; goto extract_sfmt_and3
;
557 case 141 : itype
= M32R2F_INSN_XOR3
; goto extract_sfmt_and3
;
558 case 142 : itype
= M32R2F_INSN_OR3
; goto extract_sfmt_or3
;
561 unsigned int val
= (((entire_insn
>> 3) & (3 << 0)));
565 if ((entire_insn
& 0xf0f0ffff) == 0x90000000)
566 { itype
= M32R2F_INSN_DIV
; goto extract_sfmt_div
; }
567 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
569 if ((entire_insn
& 0xf0f0ffff) == 0x90000010)
570 { itype
= M32R2F_INSN_DIVH
; goto extract_sfmt_div
; }
571 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
573 if ((entire_insn
& 0xf0f0ffff) == 0x90000018)
574 { itype
= M32R2F_INSN_DIVB
; goto extract_sfmt_div
; }
575 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
576 default : itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
581 unsigned int val
= (((entire_insn
>> 3) & (3 << 0)));
585 if ((entire_insn
& 0xf0f0ffff) == 0x90100000)
586 { itype
= M32R2F_INSN_DIVU
; goto extract_sfmt_div
; }
587 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
589 if ((entire_insn
& 0xf0f0ffff) == 0x90100010)
590 { itype
= M32R2F_INSN_DIVUH
; goto extract_sfmt_div
; }
591 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
593 if ((entire_insn
& 0xf0f0ffff) == 0x90100018)
594 { itype
= M32R2F_INSN_DIVUB
; goto extract_sfmt_div
; }
595 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
596 default : itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
601 unsigned int val
= (((entire_insn
>> 3) & (3 << 0)));
605 if ((entire_insn
& 0xf0f0ffff) == 0x90200000)
606 { itype
= M32R2F_INSN_REM
; goto extract_sfmt_div
; }
607 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
609 if ((entire_insn
& 0xf0f0ffff) == 0x90200010)
610 { itype
= M32R2F_INSN_REMH
; goto extract_sfmt_div
; }
611 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
613 if ((entire_insn
& 0xf0f0ffff) == 0x90200018)
614 { itype
= M32R2F_INSN_REMB
; goto extract_sfmt_div
; }
615 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
616 default : itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
621 unsigned int val
= (((entire_insn
>> 3) & (3 << 0)));
625 if ((entire_insn
& 0xf0f0ffff) == 0x90300000)
626 { itype
= M32R2F_INSN_REMU
; goto extract_sfmt_div
; }
627 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
629 if ((entire_insn
& 0xf0f0ffff) == 0x90300010)
630 { itype
= M32R2F_INSN_REMUH
; goto extract_sfmt_div
; }
631 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
633 if ((entire_insn
& 0xf0f0ffff) == 0x90300018)
634 { itype
= M32R2F_INSN_REMUB
; goto extract_sfmt_div
; }
635 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
636 default : itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
639 case 152 : itype
= M32R2F_INSN_SRL3
; goto extract_sfmt_sll3
;
640 case 154 : itype
= M32R2F_INSN_SRA3
; goto extract_sfmt_sll3
;
641 case 156 : itype
= M32R2F_INSN_SLL3
; goto extract_sfmt_sll3
;
643 if ((entire_insn
& 0xf0ff0000) == 0x90f00000)
644 { itype
= M32R2F_INSN_LDI16
; goto extract_sfmt_ldi16
; }
645 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
646 case 160 : itype
= M32R2F_INSN_STB_D
; goto extract_sfmt_stb_d
;
647 case 162 : itype
= M32R2F_INSN_STH_D
; goto extract_sfmt_sth_d
;
648 case 164 : itype
= M32R2F_INSN_ST_D
; goto extract_sfmt_st_d
;
650 if ((entire_insn
& 0xf8f00000) == 0xa0600000)
651 { itype
= M32R2F_INSN_BSET
; goto extract_sfmt_bset
; }
652 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
654 if ((entire_insn
& 0xf8f00000) == 0xa0700000)
655 { itype
= M32R2F_INSN_BCLR
; goto extract_sfmt_bset
; }
656 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
657 case 168 : itype
= M32R2F_INSN_LDB_D
; goto extract_sfmt_ldb_d
;
658 case 169 : itype
= M32R2F_INSN_LDUB_D
; goto extract_sfmt_ldb_d
;
659 case 170 : itype
= M32R2F_INSN_LDH_D
; goto extract_sfmt_ldh_d
;
660 case 171 : itype
= M32R2F_INSN_LDUH_D
; goto extract_sfmt_ldh_d
;
661 case 172 : itype
= M32R2F_INSN_LD_D
; goto extract_sfmt_ld_d
;
662 case 176 : itype
= M32R2F_INSN_BEQ
; goto extract_sfmt_beq
;
663 case 177 : itype
= M32R2F_INSN_BNE
; goto extract_sfmt_beq
;
665 if ((entire_insn
& 0xfff00000) == 0xb0800000)
666 { itype
= M32R2F_INSN_BEQZ
; goto extract_sfmt_beqz
; }
667 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
669 if ((entire_insn
& 0xfff00000) == 0xb0900000)
670 { itype
= M32R2F_INSN_BNEZ
; goto extract_sfmt_beqz
; }
671 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
673 if ((entire_insn
& 0xfff00000) == 0xb0a00000)
674 { itype
= M32R2F_INSN_BLTZ
; goto extract_sfmt_beqz
; }
675 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
677 if ((entire_insn
& 0xfff00000) == 0xb0b00000)
678 { itype
= M32R2F_INSN_BGEZ
; goto extract_sfmt_beqz
; }
679 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
681 if ((entire_insn
& 0xfff00000) == 0xb0c00000)
682 { itype
= M32R2F_INSN_BLEZ
; goto extract_sfmt_beqz
; }
683 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
685 if ((entire_insn
& 0xfff00000) == 0xb0d00000)
686 { itype
= M32R2F_INSN_BGTZ
; goto extract_sfmt_beqz
; }
687 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
689 if ((entire_insn
& 0xf0ff0000) == 0xd0c00000)
690 { itype
= M32R2F_INSN_SETH
; goto extract_sfmt_seth
; }
691 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
692 case 224 : /* fall through */
693 case 225 : /* fall through */
694 case 226 : /* fall through */
695 case 227 : /* fall through */
696 case 228 : /* fall through */
697 case 229 : /* fall through */
698 case 230 : /* fall through */
699 case 231 : /* fall through */
700 case 232 : /* fall through */
701 case 233 : /* fall through */
702 case 234 : /* fall through */
703 case 235 : /* fall through */
704 case 236 : /* fall through */
705 case 237 : /* fall through */
706 case 238 : /* fall through */
707 case 239 : itype
= M32R2F_INSN_LD24
; goto extract_sfmt_ld24
;
708 case 240 : /* fall through */
709 case 241 : /* fall through */
710 case 242 : /* fall through */
711 case 243 : /* fall through */
712 case 244 : /* fall through */
713 case 245 : /* fall through */
714 case 246 : /* fall through */
715 case 247 : /* fall through */
716 case 248 : /* fall through */
717 case 249 : /* fall through */
718 case 250 : /* fall through */
719 case 251 : /* fall through */
720 case 252 : /* fall through */
721 case 253 : /* fall through */
722 case 254 : /* fall through */
725 unsigned int val
= (((insn
>> 8) & (7 << 0)));
729 if ((entire_insn
& 0xff000000) == 0xf8000000)
730 { itype
= M32R2F_INSN_BCL24
; goto extract_sfmt_bcl24
; }
731 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
733 if ((entire_insn
& 0xff000000) == 0xf9000000)
734 { itype
= M32R2F_INSN_BNCL24
; goto extract_sfmt_bcl24
; }
735 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
737 if ((entire_insn
& 0xff000000) == 0xfc000000)
738 { itype
= M32R2F_INSN_BC24
; goto extract_sfmt_bc24
; }
739 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
741 if ((entire_insn
& 0xff000000) == 0xfd000000)
742 { itype
= M32R2F_INSN_BNC24
; goto extract_sfmt_bc24
; }
743 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
745 if ((entire_insn
& 0xff000000) == 0xfe000000)
746 { itype
= M32R2F_INSN_BL24
; goto extract_sfmt_bl24
; }
747 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
749 if ((entire_insn
& 0xff000000) == 0xff000000)
750 { itype
= M32R2F_INSN_BRA24
; goto extract_sfmt_bra24
; }
751 itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
752 default : itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
755 default : itype
= M32R2F_INSN_X_INVALID
; goto extract_sfmt_empty
;
760 /* The instruction has been decoded, now extract the fields. */
764 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
765 #define FLD(f) abuf->fields.sfmt_empty.f
768 /* Record the fields for the semantic handler. */
769 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_empty", (char *) 0));
777 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
778 CGEN_INSN_WORD insn
= entire_insn
;
779 #define FLD(f) abuf->fields.sfmt_add.f
783 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
784 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
786 /* Record the fields for the semantic handler. */
789 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
790 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
791 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_add", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, (char *) 0));
793 #if WITH_PROFILE_MODEL_P
794 /* Record the fields for profiling. */
795 if (PROFILE_MODEL_P (current_cpu
))
808 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
809 CGEN_INSN_WORD insn
= entire_insn
;
810 #define FLD(f) abuf->fields.sfmt_add3.f
815 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
816 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
817 f_simm16
= EXTRACT_MSB0_SINT (insn
, 32, 16, 16);
819 /* Record the fields for the semantic handler. */
820 FLD (f_simm16
) = f_simm16
;
823 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
824 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
825 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_add3", "f_simm16 0x%x", 'x', f_simm16
, "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
827 #if WITH_PROFILE_MODEL_P
828 /* Record the fields for profiling. */
829 if (PROFILE_MODEL_P (current_cpu
))
841 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
842 CGEN_INSN_WORD insn
= entire_insn
;
843 #define FLD(f) abuf->fields.sfmt_and3.f
848 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
849 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
850 f_uimm16
= EXTRACT_MSB0_UINT (insn
, 32, 16, 16);
852 /* Record the fields for the semantic handler. */
854 FLD (f_uimm16
) = f_uimm16
;
856 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
857 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
858 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_and3", "f_r2 0x%x", 'x', f_r2
, "f_uimm16 0x%x", 'x', f_uimm16
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
860 #if WITH_PROFILE_MODEL_P
861 /* Record the fields for profiling. */
862 if (PROFILE_MODEL_P (current_cpu
))
874 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
875 CGEN_INSN_WORD insn
= entire_insn
;
876 #define FLD(f) abuf->fields.sfmt_and3.f
881 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
882 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
883 f_uimm16
= EXTRACT_MSB0_UINT (insn
, 32, 16, 16);
885 /* Record the fields for the semantic handler. */
887 FLD (f_uimm16
) = f_uimm16
;
889 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
890 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
891 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_or3", "f_r2 0x%x", 'x', f_r2
, "f_uimm16 0x%x", 'x', f_uimm16
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
893 #if WITH_PROFILE_MODEL_P
894 /* Record the fields for profiling. */
895 if (PROFILE_MODEL_P (current_cpu
))
907 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
908 CGEN_INSN_WORD insn
= entire_insn
;
909 #define FLD(f) abuf->fields.sfmt_addi.f
913 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
914 f_simm8
= EXTRACT_MSB0_SINT (insn
, 16, 8, 8);
916 /* Record the fields for the semantic handler. */
918 FLD (f_simm8
) = f_simm8
;
919 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
920 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_addi", "f_r1 0x%x", 'x', f_r1
, "f_simm8 0x%x", 'x', f_simm8
, "dr 0x%x", 'x', f_r1
, (char *) 0));
922 #if WITH_PROFILE_MODEL_P
923 /* Record the fields for profiling. */
924 if (PROFILE_MODEL_P (current_cpu
))
936 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
937 CGEN_INSN_WORD insn
= entire_insn
;
938 #define FLD(f) abuf->fields.sfmt_add.f
942 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
943 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
945 /* Record the fields for the semantic handler. */
948 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
949 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
950 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_addv", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, (char *) 0));
952 #if WITH_PROFILE_MODEL_P
953 /* Record the fields for profiling. */
954 if (PROFILE_MODEL_P (current_cpu
))
967 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
968 CGEN_INSN_WORD insn
= entire_insn
;
969 #define FLD(f) abuf->fields.sfmt_add3.f
974 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
975 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
976 f_simm16
= EXTRACT_MSB0_SINT (insn
, 32, 16, 16);
978 /* Record the fields for the semantic handler. */
979 FLD (f_simm16
) = f_simm16
;
982 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
983 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
984 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_addv3", "f_simm16 0x%x", 'x', f_simm16
, "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
986 #if WITH_PROFILE_MODEL_P
987 /* Record the fields for profiling. */
988 if (PROFILE_MODEL_P (current_cpu
))
1000 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1001 CGEN_INSN_WORD insn
= entire_insn
;
1002 #define FLD(f) abuf->fields.sfmt_add.f
1006 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1007 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1009 /* Record the fields for the semantic handler. */
1012 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1013 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1014 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_addx", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, (char *) 0));
1016 #if WITH_PROFILE_MODEL_P
1017 /* Record the fields for profiling. */
1018 if (PROFILE_MODEL_P (current_cpu
))
1022 FLD (out_dr
) = f_r1
;
1031 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1032 CGEN_INSN_WORD insn
= entire_insn
;
1033 #define FLD(f) abuf->fields.sfmt_bl8.f
1036 f_disp8
= ((((EXTRACT_MSB0_SINT (insn
, 16, 8, 8)) << (2))) + (((pc
) & (-4))));
1038 /* Record the fields for the semantic handler. */
1039 FLD (i_disp8
) = f_disp8
;
1040 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_bc8", "disp8 0x%x", 'x', f_disp8
, (char *) 0));
1042 #if WITH_PROFILE_MODEL_P
1043 /* Record the fields for profiling. */
1044 if (PROFILE_MODEL_P (current_cpu
))
1054 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1055 CGEN_INSN_WORD insn
= entire_insn
;
1056 #define FLD(f) abuf->fields.sfmt_bl24.f
1059 f_disp24
= ((((EXTRACT_MSB0_SINT (insn
, 32, 8, 24)) << (2))) + (pc
));
1061 /* Record the fields for the semantic handler. */
1062 FLD (i_disp24
) = f_disp24
;
1063 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_bc24", "disp24 0x%x", 'x', f_disp24
, (char *) 0));
1065 #if WITH_PROFILE_MODEL_P
1066 /* Record the fields for profiling. */
1067 if (PROFILE_MODEL_P (current_cpu
))
1077 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1078 CGEN_INSN_WORD insn
= entire_insn
;
1079 #define FLD(f) abuf->fields.sfmt_beq.f
1084 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
1085 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
1086 f_disp16
= ((((EXTRACT_MSB0_SINT (insn
, 32, 16, 16)) << (2))) + (pc
));
1088 /* Record the fields for the semantic handler. */
1091 FLD (i_disp16
) = f_disp16
;
1092 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
1093 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
1094 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_beq", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "disp16 0x%x", 'x', f_disp16
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
1096 #if WITH_PROFILE_MODEL_P
1097 /* Record the fields for profiling. */
1098 if (PROFILE_MODEL_P (current_cpu
))
1100 FLD (in_src1
) = f_r1
;
1101 FLD (in_src2
) = f_r2
;
1110 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1111 CGEN_INSN_WORD insn
= entire_insn
;
1112 #define FLD(f) abuf->fields.sfmt_beq.f
1116 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
1117 f_disp16
= ((((EXTRACT_MSB0_SINT (insn
, 32, 16, 16)) << (2))) + (pc
));
1119 /* Record the fields for the semantic handler. */
1121 FLD (i_disp16
) = f_disp16
;
1122 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
1123 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_beqz", "f_r2 0x%x", 'x', f_r2
, "disp16 0x%x", 'x', f_disp16
, "src2 0x%x", 'x', f_r2
, (char *) 0));
1125 #if WITH_PROFILE_MODEL_P
1126 /* Record the fields for profiling. */
1127 if (PROFILE_MODEL_P (current_cpu
))
1129 FLD (in_src2
) = f_r2
;
1138 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1139 CGEN_INSN_WORD insn
= entire_insn
;
1140 #define FLD(f) abuf->fields.sfmt_bl8.f
1143 f_disp8
= ((((EXTRACT_MSB0_SINT (insn
, 16, 8, 8)) << (2))) + (((pc
) & (-4))));
1145 /* Record the fields for the semantic handler. */
1146 FLD (i_disp8
) = f_disp8
;
1147 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_bl8", "disp8 0x%x", 'x', f_disp8
, (char *) 0));
1149 #if WITH_PROFILE_MODEL_P
1150 /* Record the fields for profiling. */
1151 if (PROFILE_MODEL_P (current_cpu
))
1153 FLD (out_h_gr_SI_14
) = 14;
1162 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1163 CGEN_INSN_WORD insn
= entire_insn
;
1164 #define FLD(f) abuf->fields.sfmt_bl24.f
1167 f_disp24
= ((((EXTRACT_MSB0_SINT (insn
, 32, 8, 24)) << (2))) + (pc
));
1169 /* Record the fields for the semantic handler. */
1170 FLD (i_disp24
) = f_disp24
;
1171 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_bl24", "disp24 0x%x", 'x', f_disp24
, (char *) 0));
1173 #if WITH_PROFILE_MODEL_P
1174 /* Record the fields for profiling. */
1175 if (PROFILE_MODEL_P (current_cpu
))
1177 FLD (out_h_gr_SI_14
) = 14;
1186 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1187 CGEN_INSN_WORD insn
= entire_insn
;
1188 #define FLD(f) abuf->fields.sfmt_bl8.f
1191 f_disp8
= ((((EXTRACT_MSB0_SINT (insn
, 16, 8, 8)) << (2))) + (((pc
) & (-4))));
1193 /* Record the fields for the semantic handler. */
1194 FLD (i_disp8
) = f_disp8
;
1195 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_bcl8", "disp8 0x%x", 'x', f_disp8
, (char *) 0));
1197 #if WITH_PROFILE_MODEL_P
1198 /* Record the fields for profiling. */
1199 if (PROFILE_MODEL_P (current_cpu
))
1201 FLD (out_h_gr_SI_14
) = 14;
1210 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1211 CGEN_INSN_WORD insn
= entire_insn
;
1212 #define FLD(f) abuf->fields.sfmt_bl24.f
1215 f_disp24
= ((((EXTRACT_MSB0_SINT (insn
, 32, 8, 24)) << (2))) + (pc
));
1217 /* Record the fields for the semantic handler. */
1218 FLD (i_disp24
) = f_disp24
;
1219 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_bcl24", "disp24 0x%x", 'x', f_disp24
, (char *) 0));
1221 #if WITH_PROFILE_MODEL_P
1222 /* Record the fields for profiling. */
1223 if (PROFILE_MODEL_P (current_cpu
))
1225 FLD (out_h_gr_SI_14
) = 14;
1234 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1235 CGEN_INSN_WORD insn
= entire_insn
;
1236 #define FLD(f) abuf->fields.sfmt_bl8.f
1239 f_disp8
= ((((EXTRACT_MSB0_SINT (insn
, 16, 8, 8)) << (2))) + (((pc
) & (-4))));
1241 /* Record the fields for the semantic handler. */
1242 FLD (i_disp8
) = f_disp8
;
1243 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_bra8", "disp8 0x%x", 'x', f_disp8
, (char *) 0));
1245 #if WITH_PROFILE_MODEL_P
1246 /* Record the fields for profiling. */
1247 if (PROFILE_MODEL_P (current_cpu
))
1257 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1258 CGEN_INSN_WORD insn
= entire_insn
;
1259 #define FLD(f) abuf->fields.sfmt_bl24.f
1262 f_disp24
= ((((EXTRACT_MSB0_SINT (insn
, 32, 8, 24)) << (2))) + (pc
));
1264 /* Record the fields for the semantic handler. */
1265 FLD (i_disp24
) = f_disp24
;
1266 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_bra24", "disp24 0x%x", 'x', f_disp24
, (char *) 0));
1268 #if WITH_PROFILE_MODEL_P
1269 /* Record the fields for profiling. */
1270 if (PROFILE_MODEL_P (current_cpu
))
1280 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1281 CGEN_INSN_WORD insn
= entire_insn
;
1282 #define FLD(f) abuf->fields.sfmt_st_plus.f
1286 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1287 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1289 /* Record the fields for the semantic handler. */
1292 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
1293 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
1294 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_cmp", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
1296 #if WITH_PROFILE_MODEL_P
1297 /* Record the fields for profiling. */
1298 if (PROFILE_MODEL_P (current_cpu
))
1300 FLD (in_src1
) = f_r1
;
1301 FLD (in_src2
) = f_r2
;
1310 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1311 CGEN_INSN_WORD insn
= entire_insn
;
1312 #define FLD(f) abuf->fields.sfmt_st_d.f
1316 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
1317 f_simm16
= EXTRACT_MSB0_SINT (insn
, 32, 16, 16);
1319 /* Record the fields for the semantic handler. */
1320 FLD (f_simm16
) = f_simm16
;
1322 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
1323 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_cmpi", "f_simm16 0x%x", 'x', f_simm16
, "f_r2 0x%x", 'x', f_r2
, "src2 0x%x", 'x', f_r2
, (char *) 0));
1325 #if WITH_PROFILE_MODEL_P
1326 /* Record the fields for profiling. */
1327 if (PROFILE_MODEL_P (current_cpu
))
1329 FLD (in_src2
) = f_r2
;
1338 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1339 CGEN_INSN_WORD insn
= entire_insn
;
1340 #define FLD(f) abuf->fields.sfmt_st_plus.f
1343 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1345 /* Record the fields for the semantic handler. */
1347 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
1348 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_cmpz", "f_r2 0x%x", 'x', f_r2
, "src2 0x%x", 'x', f_r2
, (char *) 0));
1350 #if WITH_PROFILE_MODEL_P
1351 /* Record the fields for profiling. */
1352 if (PROFILE_MODEL_P (current_cpu
))
1354 FLD (in_src2
) = f_r2
;
1363 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1364 CGEN_INSN_WORD insn
= entire_insn
;
1365 #define FLD(f) abuf->fields.sfmt_add.f
1369 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
1370 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
1372 /* Record the fields for the semantic handler. */
1375 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1376 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1377 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_div", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, (char *) 0));
1379 #if WITH_PROFILE_MODEL_P
1380 /* Record the fields for profiling. */
1381 if (PROFILE_MODEL_P (current_cpu
))
1385 FLD (out_dr
) = f_r1
;
1394 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1395 CGEN_INSN_WORD insn
= entire_insn
;
1396 #define FLD(f) abuf->fields.sfmt_jl.f
1399 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1401 /* Record the fields for the semantic handler. */
1403 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1404 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_jc", "f_r2 0x%x", 'x', f_r2
, "sr 0x%x", 'x', f_r2
, (char *) 0));
1406 #if WITH_PROFILE_MODEL_P
1407 /* Record the fields for profiling. */
1408 if (PROFILE_MODEL_P (current_cpu
))
1419 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1420 CGEN_INSN_WORD insn
= entire_insn
;
1421 #define FLD(f) abuf->fields.sfmt_jl.f
1424 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1426 /* Record the fields for the semantic handler. */
1428 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1429 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_jl", "f_r2 0x%x", 'x', f_r2
, "sr 0x%x", 'x', f_r2
, (char *) 0));
1431 #if WITH_PROFILE_MODEL_P
1432 /* Record the fields for profiling. */
1433 if (PROFILE_MODEL_P (current_cpu
))
1436 FLD (out_h_gr_SI_14
) = 14;
1445 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1446 CGEN_INSN_WORD insn
= entire_insn
;
1447 #define FLD(f) abuf->fields.sfmt_jl.f
1450 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1452 /* Record the fields for the semantic handler. */
1454 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1455 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_jmp", "f_r2 0x%x", 'x', f_r2
, "sr 0x%x", 'x', f_r2
, (char *) 0));
1457 #if WITH_PROFILE_MODEL_P
1458 /* Record the fields for profiling. */
1459 if (PROFILE_MODEL_P (current_cpu
))
1470 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1471 CGEN_INSN_WORD insn
= entire_insn
;
1472 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1476 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1477 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1479 /* Record the fields for the semantic handler. */
1482 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1483 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1484 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_ld", "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1486 #if WITH_PROFILE_MODEL_P
1487 /* Record the fields for profiling. */
1488 if (PROFILE_MODEL_P (current_cpu
))
1491 FLD (out_dr
) = f_r1
;
1500 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1501 CGEN_INSN_WORD insn
= entire_insn
;
1502 #define FLD(f) abuf->fields.sfmt_add3.f
1507 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
1508 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
1509 f_simm16
= EXTRACT_MSB0_SINT (insn
, 32, 16, 16);
1511 /* Record the fields for the semantic handler. */
1512 FLD (f_simm16
) = f_simm16
;
1515 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1516 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1517 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_ld_d", "f_simm16 0x%x", 'x', f_simm16
, "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1519 #if WITH_PROFILE_MODEL_P
1520 /* Record the fields for profiling. */
1521 if (PROFILE_MODEL_P (current_cpu
))
1524 FLD (out_dr
) = f_r1
;
1533 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1534 CGEN_INSN_WORD insn
= entire_insn
;
1535 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1539 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1540 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1542 /* Record the fields for the semantic handler. */
1545 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1546 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1547 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_ldb", "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1549 #if WITH_PROFILE_MODEL_P
1550 /* Record the fields for profiling. */
1551 if (PROFILE_MODEL_P (current_cpu
))
1554 FLD (out_dr
) = f_r1
;
1563 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1564 CGEN_INSN_WORD insn
= entire_insn
;
1565 #define FLD(f) abuf->fields.sfmt_add3.f
1570 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
1571 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
1572 f_simm16
= EXTRACT_MSB0_SINT (insn
, 32, 16, 16);
1574 /* Record the fields for the semantic handler. */
1575 FLD (f_simm16
) = f_simm16
;
1578 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1579 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1580 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_ldb_d", "f_simm16 0x%x", 'x', f_simm16
, "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1582 #if WITH_PROFILE_MODEL_P
1583 /* Record the fields for profiling. */
1584 if (PROFILE_MODEL_P (current_cpu
))
1587 FLD (out_dr
) = f_r1
;
1596 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1597 CGEN_INSN_WORD insn
= entire_insn
;
1598 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1602 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1603 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1605 /* Record the fields for the semantic handler. */
1608 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1609 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1610 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_ldh", "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1612 #if WITH_PROFILE_MODEL_P
1613 /* Record the fields for profiling. */
1614 if (PROFILE_MODEL_P (current_cpu
))
1617 FLD (out_dr
) = f_r1
;
1626 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1627 CGEN_INSN_WORD insn
= entire_insn
;
1628 #define FLD(f) abuf->fields.sfmt_add3.f
1633 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
1634 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
1635 f_simm16
= EXTRACT_MSB0_SINT (insn
, 32, 16, 16);
1637 /* Record the fields for the semantic handler. */
1638 FLD (f_simm16
) = f_simm16
;
1641 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1642 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1643 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_ldh_d", "f_simm16 0x%x", 'x', f_simm16
, "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1645 #if WITH_PROFILE_MODEL_P
1646 /* Record the fields for profiling. */
1647 if (PROFILE_MODEL_P (current_cpu
))
1650 FLD (out_dr
) = f_r1
;
1657 extract_sfmt_ld_plus
:
1659 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1660 CGEN_INSN_WORD insn
= entire_insn
;
1661 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1665 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1666 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1668 /* Record the fields for the semantic handler. */
1671 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1672 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1673 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_ld_plus", "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1675 #if WITH_PROFILE_MODEL_P
1676 /* Record the fields for profiling. */
1677 if (PROFILE_MODEL_P (current_cpu
))
1680 FLD (out_dr
) = f_r1
;
1681 FLD (out_sr
) = f_r2
;
1690 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1691 CGEN_INSN_WORD insn
= entire_insn
;
1692 #define FLD(f) abuf->fields.sfmt_ld24.f
1696 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
1697 f_uimm24
= EXTRACT_MSB0_UINT (insn
, 32, 8, 24);
1699 /* Record the fields for the semantic handler. */
1701 FLD (i_uimm24
) = f_uimm24
;
1702 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1703 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_ld24", "f_r1 0x%x", 'x', f_r1
, "uimm24 0x%x", 'x', f_uimm24
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1705 #if WITH_PROFILE_MODEL_P
1706 /* Record the fields for profiling. */
1707 if (PROFILE_MODEL_P (current_cpu
))
1709 FLD (out_dr
) = f_r1
;
1718 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1719 CGEN_INSN_WORD insn
= entire_insn
;
1720 #define FLD(f) abuf->fields.sfmt_addi.f
1724 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1725 f_simm8
= EXTRACT_MSB0_SINT (insn
, 16, 8, 8);
1727 /* Record the fields for the semantic handler. */
1728 FLD (f_simm8
) = f_simm8
;
1730 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1731 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_ldi8", "f_simm8 0x%x", 'x', f_simm8
, "f_r1 0x%x", 'x', f_r1
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1733 #if WITH_PROFILE_MODEL_P
1734 /* Record the fields for profiling. */
1735 if (PROFILE_MODEL_P (current_cpu
))
1737 FLD (out_dr
) = f_r1
;
1746 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1747 CGEN_INSN_WORD insn
= entire_insn
;
1748 #define FLD(f) abuf->fields.sfmt_add3.f
1752 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
1753 f_simm16
= EXTRACT_MSB0_SINT (insn
, 32, 16, 16);
1755 /* Record the fields for the semantic handler. */
1756 FLD (f_simm16
) = f_simm16
;
1758 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1759 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_ldi16", "f_simm16 0x%x", 'x', f_simm16
, "f_r1 0x%x", 'x', f_r1
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1761 #if WITH_PROFILE_MODEL_P
1762 /* Record the fields for profiling. */
1763 if (PROFILE_MODEL_P (current_cpu
))
1765 FLD (out_dr
) = f_r1
;
1774 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1775 CGEN_INSN_WORD insn
= entire_insn
;
1776 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1780 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1781 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1783 /* Record the fields for the semantic handler. */
1786 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1787 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1788 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_lock", "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1790 #if WITH_PROFILE_MODEL_P
1791 /* Record the fields for profiling. */
1792 if (PROFILE_MODEL_P (current_cpu
))
1795 FLD (out_dr
) = f_r1
;
1802 extract_sfmt_machi_a
:
1804 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1805 CGEN_INSN_WORD insn
= entire_insn
;
1806 #define FLD(f) abuf->fields.sfmt_machi_a.f
1811 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1812 f_acc
= EXTRACT_MSB0_UINT (insn
, 16, 8, 1);
1813 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1815 /* Record the fields for the semantic handler. */
1816 FLD (f_acc
) = f_acc
;
1819 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
1820 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
1821 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_machi_a", "f_acc 0x%x", 'x', f_acc
, "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
1823 #if WITH_PROFILE_MODEL_P
1824 /* Record the fields for profiling. */
1825 if (PROFILE_MODEL_P (current_cpu
))
1827 FLD (in_src1
) = f_r1
;
1828 FLD (in_src2
) = f_r2
;
1835 extract_sfmt_mulhi_a
:
1837 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1838 CGEN_INSN_WORD insn
= entire_insn
;
1839 #define FLD(f) abuf->fields.sfmt_machi_a.f
1844 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1845 f_acc
= EXTRACT_MSB0_UINT (insn
, 16, 8, 1);
1846 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1848 /* Record the fields for the semantic handler. */
1851 FLD (f_acc
) = f_acc
;
1852 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
1853 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
1854 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_mulhi_a", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "f_acc 0x%x", 'x', f_acc
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
1856 #if WITH_PROFILE_MODEL_P
1857 /* Record the fields for profiling. */
1858 if (PROFILE_MODEL_P (current_cpu
))
1860 FLD (in_src1
) = f_r1
;
1861 FLD (in_src2
) = f_r2
;
1870 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1871 CGEN_INSN_WORD insn
= entire_insn
;
1872 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1876 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1877 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1879 /* Record the fields for the semantic handler. */
1882 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1883 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1884 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_mv", "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1886 #if WITH_PROFILE_MODEL_P
1887 /* Record the fields for profiling. */
1888 if (PROFILE_MODEL_P (current_cpu
))
1891 FLD (out_dr
) = f_r1
;
1898 extract_sfmt_mvfachi_a
:
1900 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1901 CGEN_INSN_WORD insn
= entire_insn
;
1902 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
1906 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1907 f_accs
= EXTRACT_MSB0_UINT (insn
, 16, 12, 2);
1909 /* Record the fields for the semantic handler. */
1910 FLD (f_accs
) = f_accs
;
1912 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1913 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_mvfachi_a", "f_accs 0x%x", 'x', f_accs
, "f_r1 0x%x", 'x', f_r1
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1915 #if WITH_PROFILE_MODEL_P
1916 /* Record the fields for profiling. */
1917 if (PROFILE_MODEL_P (current_cpu
))
1919 FLD (out_dr
) = f_r1
;
1928 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1929 CGEN_INSN_WORD insn
= entire_insn
;
1930 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1934 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1935 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1937 /* Record the fields for the semantic handler. */
1940 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1941 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_mvfc", "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1943 #if WITH_PROFILE_MODEL_P
1944 /* Record the fields for profiling. */
1945 if (PROFILE_MODEL_P (current_cpu
))
1947 FLD (out_dr
) = f_r1
;
1954 extract_sfmt_mvtachi_a
:
1956 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1957 CGEN_INSN_WORD insn
= entire_insn
;
1958 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
1962 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1963 f_accs
= EXTRACT_MSB0_UINT (insn
, 16, 12, 2);
1965 /* Record the fields for the semantic handler. */
1966 FLD (f_accs
) = f_accs
;
1968 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
1969 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_mvtachi_a", "f_accs 0x%x", 'x', f_accs
, "f_r1 0x%x", 'x', f_r1
, "src1 0x%x", 'x', f_r1
, (char *) 0));
1971 #if WITH_PROFILE_MODEL_P
1972 /* Record the fields for profiling. */
1973 if (PROFILE_MODEL_P (current_cpu
))
1975 FLD (in_src1
) = f_r1
;
1984 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
1985 CGEN_INSN_WORD insn
= entire_insn
;
1986 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1990 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1991 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1993 /* Record the fields for the semantic handler. */
1996 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1997 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_mvtc", "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, (char *) 0));
1999 #if WITH_PROFILE_MODEL_P
2000 /* Record the fields for profiling. */
2001 if (PROFILE_MODEL_P (current_cpu
))
2012 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
2013 #define FLD(f) abuf->fields.sfmt_empty.f
2016 /* Record the fields for the semantic handler. */
2017 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_nop", (char *) 0));
2023 extract_sfmt_rac_dsi
:
2025 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
2026 CGEN_INSN_WORD insn
= entire_insn
;
2027 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
2032 f_accd
= EXTRACT_MSB0_UINT (insn
, 16, 4, 2);
2033 f_accs
= EXTRACT_MSB0_UINT (insn
, 16, 12, 2);
2034 f_imm1
= ((EXTRACT_MSB0_UINT (insn
, 16, 15, 1)) + (1));
2036 /* Record the fields for the semantic handler. */
2037 FLD (f_accs
) = f_accs
;
2038 FLD (f_imm1
) = f_imm1
;
2039 FLD (f_accd
) = f_accd
;
2040 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_rac_dsi", "f_accs 0x%x", 'x', f_accs
, "f_imm1 0x%x", 'x', f_imm1
, "f_accd 0x%x", 'x', f_accd
, (char *) 0));
2048 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
2049 #define FLD(f) abuf->fields.sfmt_empty.f
2052 /* Record the fields for the semantic handler. */
2053 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_rte", (char *) 0));
2055 #if WITH_PROFILE_MODEL_P
2056 /* Record the fields for profiling. */
2057 if (PROFILE_MODEL_P (current_cpu
))
2067 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
2068 CGEN_INSN_WORD insn
= entire_insn
;
2069 #define FLD(f) abuf->fields.sfmt_seth.f
2073 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
2074 f_hi16
= EXTRACT_MSB0_UINT (insn
, 32, 16, 16);
2076 /* Record the fields for the semantic handler. */
2077 FLD (f_hi16
) = f_hi16
;
2079 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
2080 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_seth", "f_hi16 0x%x", 'x', f_hi16
, "f_r1 0x%x", 'x', f_r1
, "dr 0x%x", 'x', f_r1
, (char *) 0));
2082 #if WITH_PROFILE_MODEL_P
2083 /* Record the fields for profiling. */
2084 if (PROFILE_MODEL_P (current_cpu
))
2086 FLD (out_dr
) = f_r1
;
2095 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
2096 CGEN_INSN_WORD insn
= entire_insn
;
2097 #define FLD(f) abuf->fields.sfmt_add3.f
2102 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
2103 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
2104 f_simm16
= EXTRACT_MSB0_SINT (insn
, 32, 16, 16);
2106 /* Record the fields for the semantic handler. */
2107 FLD (f_simm16
) = f_simm16
;
2110 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
2111 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
2112 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_sll3", "f_simm16 0x%x", 'x', f_simm16
, "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
2114 #if WITH_PROFILE_MODEL_P
2115 /* Record the fields for profiling. */
2116 if (PROFILE_MODEL_P (current_cpu
))
2119 FLD (out_dr
) = f_r1
;
2128 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
2129 CGEN_INSN_WORD insn
= entire_insn
;
2130 #define FLD(f) abuf->fields.sfmt_slli.f
2134 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
2135 f_uimm5
= EXTRACT_MSB0_UINT (insn
, 16, 11, 5);
2137 /* Record the fields for the semantic handler. */
2139 FLD (f_uimm5
) = f_uimm5
;
2140 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
2141 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_slli", "f_r1 0x%x", 'x', f_r1
, "f_uimm5 0x%x", 'x', f_uimm5
, "dr 0x%x", 'x', f_r1
, (char *) 0));
2143 #if WITH_PROFILE_MODEL_P
2144 /* Record the fields for profiling. */
2145 if (PROFILE_MODEL_P (current_cpu
))
2148 FLD (out_dr
) = f_r1
;
2157 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
2158 CGEN_INSN_WORD insn
= entire_insn
;
2159 #define FLD(f) abuf->fields.sfmt_st_plus.f
2163 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
2164 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
2166 /* Record the fields for the semantic handler. */
2169 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
2170 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
2171 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_st", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
2173 #if WITH_PROFILE_MODEL_P
2174 /* Record the fields for profiling. */
2175 if (PROFILE_MODEL_P (current_cpu
))
2177 FLD (in_src1
) = f_r1
;
2178 FLD (in_src2
) = f_r2
;
2187 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
2188 CGEN_INSN_WORD insn
= entire_insn
;
2189 #define FLD(f) abuf->fields.sfmt_st_d.f
2194 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
2195 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
2196 f_simm16
= EXTRACT_MSB0_SINT (insn
, 32, 16, 16);
2198 /* Record the fields for the semantic handler. */
2199 FLD (f_simm16
) = f_simm16
;
2202 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
2203 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
2204 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_st_d", "f_simm16 0x%x", 'x', f_simm16
, "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
2206 #if WITH_PROFILE_MODEL_P
2207 /* Record the fields for profiling. */
2208 if (PROFILE_MODEL_P (current_cpu
))
2210 FLD (in_src1
) = f_r1
;
2211 FLD (in_src2
) = f_r2
;
2220 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
2221 CGEN_INSN_WORD insn
= entire_insn
;
2222 #define FLD(f) abuf->fields.sfmt_st_plus.f
2226 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
2227 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
2229 /* Record the fields for the semantic handler. */
2232 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
2233 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
2234 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_stb", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
2236 #if WITH_PROFILE_MODEL_P
2237 /* Record the fields for profiling. */
2238 if (PROFILE_MODEL_P (current_cpu
))
2240 FLD (in_src1
) = f_r1
;
2241 FLD (in_src2
) = f_r2
;
2250 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
2251 CGEN_INSN_WORD insn
= entire_insn
;
2252 #define FLD(f) abuf->fields.sfmt_st_d.f
2257 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
2258 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
2259 f_simm16
= EXTRACT_MSB0_SINT (insn
, 32, 16, 16);
2261 /* Record the fields for the semantic handler. */
2262 FLD (f_simm16
) = f_simm16
;
2265 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
2266 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
2267 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_stb_d", "f_simm16 0x%x", 'x', f_simm16
, "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
2269 #if WITH_PROFILE_MODEL_P
2270 /* Record the fields for profiling. */
2271 if (PROFILE_MODEL_P (current_cpu
))
2273 FLD (in_src1
) = f_r1
;
2274 FLD (in_src2
) = f_r2
;
2283 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
2284 CGEN_INSN_WORD insn
= entire_insn
;
2285 #define FLD(f) abuf->fields.sfmt_st_plus.f
2289 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
2290 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
2292 /* Record the fields for the semantic handler. */
2295 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
2296 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
2297 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_sth", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
2299 #if WITH_PROFILE_MODEL_P
2300 /* Record the fields for profiling. */
2301 if (PROFILE_MODEL_P (current_cpu
))
2303 FLD (in_src1
) = f_r1
;
2304 FLD (in_src2
) = f_r2
;
2313 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
2314 CGEN_INSN_WORD insn
= entire_insn
;
2315 #define FLD(f) abuf->fields.sfmt_st_d.f
2320 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
2321 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
2322 f_simm16
= EXTRACT_MSB0_SINT (insn
, 32, 16, 16);
2324 /* Record the fields for the semantic handler. */
2325 FLD (f_simm16
) = f_simm16
;
2328 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
2329 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
2330 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_sth_d", "f_simm16 0x%x", 'x', f_simm16
, "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
2332 #if WITH_PROFILE_MODEL_P
2333 /* Record the fields for profiling. */
2334 if (PROFILE_MODEL_P (current_cpu
))
2336 FLD (in_src1
) = f_r1
;
2337 FLD (in_src2
) = f_r2
;
2344 extract_sfmt_st_plus
:
2346 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
2347 CGEN_INSN_WORD insn
= entire_insn
;
2348 #define FLD(f) abuf->fields.sfmt_st_plus.f
2352 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
2353 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
2355 /* Record the fields for the semantic handler. */
2358 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
2359 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
2360 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_st_plus", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
2362 #if WITH_PROFILE_MODEL_P
2363 /* Record the fields for profiling. */
2364 if (PROFILE_MODEL_P (current_cpu
))
2366 FLD (in_src1
) = f_r1
;
2367 FLD (in_src2
) = f_r2
;
2368 FLD (out_src2
) = f_r2
;
2375 extract_sfmt_sth_plus
:
2377 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
2378 CGEN_INSN_WORD insn
= entire_insn
;
2379 #define FLD(f) abuf->fields.sfmt_st_plus.f
2383 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
2384 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
2386 /* Record the fields for the semantic handler. */
2389 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
2390 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
2391 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_sth_plus", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
2393 #if WITH_PROFILE_MODEL_P
2394 /* Record the fields for profiling. */
2395 if (PROFILE_MODEL_P (current_cpu
))
2397 FLD (in_src1
) = f_r1
;
2398 FLD (in_src2
) = f_r2
;
2399 FLD (out_src2
) = f_r2
;
2406 extract_sfmt_stb_plus
:
2408 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
2409 CGEN_INSN_WORD insn
= entire_insn
;
2410 #define FLD(f) abuf->fields.sfmt_st_plus.f
2414 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
2415 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
2417 /* Record the fields for the semantic handler. */
2420 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
2421 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
2422 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_stb_plus", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
2424 #if WITH_PROFILE_MODEL_P
2425 /* Record the fields for profiling. */
2426 if (PROFILE_MODEL_P (current_cpu
))
2428 FLD (in_src1
) = f_r1
;
2429 FLD (in_src2
) = f_r2
;
2430 FLD (out_src2
) = f_r2
;
2439 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
2440 CGEN_INSN_WORD insn
= entire_insn
;
2441 #define FLD(f) abuf->fields.sfmt_trap.f
2444 f_uimm4
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
2446 /* Record the fields for the semantic handler. */
2447 FLD (f_uimm4
) = f_uimm4
;
2448 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_trap", "f_uimm4 0x%x", 'x', f_uimm4
, (char *) 0));
2450 #if WITH_PROFILE_MODEL_P
2451 /* Record the fields for profiling. */
2452 if (PROFILE_MODEL_P (current_cpu
))
2460 extract_sfmt_unlock
:
2462 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
2463 CGEN_INSN_WORD insn
= entire_insn
;
2464 #define FLD(f) abuf->fields.sfmt_st_plus.f
2468 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
2469 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
2471 /* Record the fields for the semantic handler. */
2474 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
2475 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
2476 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_unlock", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
2478 #if WITH_PROFILE_MODEL_P
2479 /* Record the fields for profiling. */
2480 if (PROFILE_MODEL_P (current_cpu
))
2482 FLD (in_src1
) = f_r1
;
2483 FLD (in_src2
) = f_r2
;
2492 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
2493 CGEN_INSN_WORD insn
= entire_insn
;
2494 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2498 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
2499 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
2501 /* Record the fields for the semantic handler. */
2504 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
2505 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
2506 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_satb", "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
2508 #if WITH_PROFILE_MODEL_P
2509 /* Record the fields for profiling. */
2510 if (PROFILE_MODEL_P (current_cpu
))
2513 FLD (out_dr
) = f_r1
;
2522 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
2523 CGEN_INSN_WORD insn
= entire_insn
;
2524 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2528 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
2529 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
2531 /* Record the fields for the semantic handler. */
2534 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
2535 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
2536 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_sat", "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
2538 #if WITH_PROFILE_MODEL_P
2539 /* Record the fields for profiling. */
2540 if (PROFILE_MODEL_P (current_cpu
))
2543 FLD (out_dr
) = f_r1
;
2552 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
2553 #define FLD(f) abuf->fields.sfmt_empty.f
2556 /* Record the fields for the semantic handler. */
2557 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_sadd", (char *) 0));
2563 extract_sfmt_macwu1
:
2565 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
2566 CGEN_INSN_WORD insn
= entire_insn
;
2567 #define FLD(f) abuf->fields.sfmt_st_plus.f
2571 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
2572 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
2574 /* Record the fields for the semantic handler. */
2577 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
2578 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
2579 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_macwu1", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
2581 #if WITH_PROFILE_MODEL_P
2582 /* Record the fields for profiling. */
2583 if (PROFILE_MODEL_P (current_cpu
))
2585 FLD (in_src1
) = f_r1
;
2586 FLD (in_src2
) = f_r2
;
2595 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
2596 CGEN_INSN_WORD insn
= entire_insn
;
2597 #define FLD(f) abuf->fields.sfmt_st_plus.f
2601 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
2602 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
2604 /* Record the fields for the semantic handler. */
2607 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
2608 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
2609 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_msblo", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
2611 #if WITH_PROFILE_MODEL_P
2612 /* Record the fields for profiling. */
2613 if (PROFILE_MODEL_P (current_cpu
))
2615 FLD (in_src1
) = f_r1
;
2616 FLD (in_src2
) = f_r2
;
2623 extract_sfmt_mulwu1
:
2625 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
2626 CGEN_INSN_WORD insn
= entire_insn
;
2627 #define FLD(f) abuf->fields.sfmt_st_plus.f
2631 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
2632 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
2634 /* Record the fields for the semantic handler. */
2637 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
2638 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
2639 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_mulwu1", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
2641 #if WITH_PROFILE_MODEL_P
2642 /* Record the fields for profiling. */
2643 if (PROFILE_MODEL_P (current_cpu
))
2645 FLD (in_src1
) = f_r1
;
2646 FLD (in_src2
) = f_r2
;
2655 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
2656 #define FLD(f) abuf->fields.sfmt_empty.f
2659 /* Record the fields for the semantic handler. */
2660 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_sc", (char *) 0));
2666 extract_sfmt_clrpsw
:
2668 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
2669 CGEN_INSN_WORD insn
= entire_insn
;
2670 #define FLD(f) abuf->fields.sfmt_clrpsw.f
2673 f_uimm8
= EXTRACT_MSB0_UINT (insn
, 16, 8, 8);
2675 /* Record the fields for the semantic handler. */
2676 FLD (f_uimm8
) = f_uimm8
;
2677 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_clrpsw", "f_uimm8 0x%x", 'x', f_uimm8
, (char *) 0));
2683 extract_sfmt_setpsw
:
2685 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
2686 CGEN_INSN_WORD insn
= entire_insn
;
2687 #define FLD(f) abuf->fields.sfmt_clrpsw.f
2690 f_uimm8
= EXTRACT_MSB0_UINT (insn
, 16, 8, 8);
2692 /* Record the fields for the semantic handler. */
2693 FLD (f_uimm8
) = f_uimm8
;
2694 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_setpsw", "f_uimm8 0x%x", 'x', f_uimm8
, (char *) 0));
2702 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
2703 CGEN_INSN_WORD insn
= entire_insn
;
2704 #define FLD(f) abuf->fields.sfmt_bset.f
2709 f_uimm3
= EXTRACT_MSB0_UINT (insn
, 32, 5, 3);
2710 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
2711 f_simm16
= EXTRACT_MSB0_SINT (insn
, 32, 16, 16);
2713 /* Record the fields for the semantic handler. */
2714 FLD (f_simm16
) = f_simm16
;
2716 FLD (f_uimm3
) = f_uimm3
;
2717 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
2718 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_bset", "f_simm16 0x%x", 'x', f_simm16
, "f_r2 0x%x", 'x', f_r2
, "f_uimm3 0x%x", 'x', f_uimm3
, "sr 0x%x", 'x', f_r2
, (char *) 0));
2720 #if WITH_PROFILE_MODEL_P
2721 /* Record the fields for profiling. */
2722 if (PROFILE_MODEL_P (current_cpu
))
2733 const IDESC
*idesc
= &m32r2f_insn_data
[itype
];
2734 CGEN_INSN_WORD insn
= entire_insn
;
2735 #define FLD(f) abuf->fields.sfmt_bset.f
2739 f_uimm3
= EXTRACT_MSB0_UINT (insn
, 16, 5, 3);
2740 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
2742 /* Record the fields for the semantic handler. */
2744 FLD (f_uimm3
) = f_uimm3
;
2745 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
2746 CGEN_TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_btst", "f_r2 0x%x", 'x', f_r2
, "f_uimm3 0x%x", 'x', f_uimm3
, "sr 0x%x", 'x', f_r2
, (char *) 0));
2748 #if WITH_PROFILE_MODEL_P
2749 /* Record the fields for profiling. */
2750 if (PROFILE_MODEL_P (current_cpu
))