1 /* Simulator instruction decoder for m32r.
3 This file is machine generated with CGEN.
5 Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
7 This file is part of the GNU Simulators.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
26 #define WANT_CPU_M32RX
33 /* FIXME: wip, may eventually only want one form so this would then go
34 away. However, in the mean time, having both keeps a stable version
35 around while the cache version is being developed.
36 It may still be useful to allow two versions to exist though. */
38 #define EX(fn) XCONCAT3 (m32rx,_ex_,fn)
43 #ifdef HAVE_PARALLEL_EXEC
47 #define READ(n) XCONCAT3 (READ,_,n)
51 /* FIXME: Need to review choices for the following. */
53 #if WITH_SEM_SWITCH_FULL
56 #define FULL(fn) XCONCAT3 (m32rx,_sem_,fn)
60 #if WITH_SEM_SWITCH_FAST
63 #define FAST(fn) XCONCAT3 (m32rx,_semf_,fn) /* f for fast */
69 /*#define DECODE M32RX_DECODE*/
71 /* The decode_illegal case is currently non-static and the generator doesn't
72 prepend m32rx_, so simplify things by handling it here. */
73 #define decode_illegal m32rx_decode_illegal
75 #define ITAB(n) m32r_cgen_insn_table_entries[n]
77 static DECODE decode_add
= { M32R_INSN_ADD
, & ITAB (M32R_INSN_ADD
), EX (fmt_0_add
), READ (FMT_0_ADD
), FULL (add
), FAST (add
) };
78 static DECODE decode_add3
= { M32R_INSN_ADD3
, & ITAB (M32R_INSN_ADD3
), EX (fmt_1_add3
), READ (FMT_1_ADD3
), FULL (add3
), FAST (add3
) };
79 static DECODE decode_and
= { M32R_INSN_AND
, & ITAB (M32R_INSN_AND
), EX (fmt_0_add
), READ (FMT_0_ADD
), FULL (and), FAST (and) };
80 static DECODE decode_and3
= { M32R_INSN_AND3
, & ITAB (M32R_INSN_AND3
), EX (fmt_2_and3
), READ (FMT_2_AND3
), FULL (and3
), FAST (and3
) };
81 static DECODE decode_or
= { M32R_INSN_OR
, & ITAB (M32R_INSN_OR
), EX (fmt_0_add
), READ (FMT_0_ADD
), FULL (or), FAST (or) };
82 static DECODE decode_or3
= { M32R_INSN_OR3
, & ITAB (M32R_INSN_OR3
), EX (fmt_3_or3
), READ (FMT_3_OR3
), FULL (or3
), FAST (or3
) };
83 static DECODE decode_xor
= { M32R_INSN_XOR
, & ITAB (M32R_INSN_XOR
), EX (fmt_0_add
), READ (FMT_0_ADD
), FULL (xor), FAST (xor) };
84 static DECODE decode_xor3
= { M32R_INSN_XOR3
, & ITAB (M32R_INSN_XOR3
), EX (fmt_2_and3
), READ (FMT_2_AND3
), FULL (xor3
), FAST (xor3
) };
85 static DECODE decode_addi
= { M32R_INSN_ADDI
, & ITAB (M32R_INSN_ADDI
), EX (fmt_4_addi
), READ (FMT_4_ADDI
), FULL (addi
), FAST (addi
) };
86 static DECODE decode_addv
= { M32R_INSN_ADDV
, & ITAB (M32R_INSN_ADDV
), EX (fmt_5_addv
), READ (FMT_5_ADDV
), FULL (addv
), FAST (addv
) };
87 static DECODE decode_addv3
= { M32R_INSN_ADDV3
, & ITAB (M32R_INSN_ADDV3
), EX (fmt_6_addv3
), READ (FMT_6_ADDV3
), FULL (addv3
), FAST (addv3
) };
88 static DECODE decode_addx
= { M32R_INSN_ADDX
, & ITAB (M32R_INSN_ADDX
), EX (fmt_7_addx
), READ (FMT_7_ADDX
), FULL (addx
), FAST (addx
) };
89 static DECODE decode_bc8
= { M32R_INSN_BC8
, & ITAB (M32R_INSN_BC8
), EX (fmt_8_bc8
), READ (FMT_8_BC8
), FULL (bc8
), FAST (bc8
) };
90 static DECODE decode_bc24
= { M32R_INSN_BC24
, & ITAB (M32R_INSN_BC24
), EX (fmt_9_bc24
), READ (FMT_9_BC24
), FULL (bc24
), FAST (bc24
) };
91 static DECODE decode_beq
= { M32R_INSN_BEQ
, & ITAB (M32R_INSN_BEQ
), EX (fmt_10_beq
), READ (FMT_10_BEQ
), FULL (beq
), FAST (beq
) };
92 static DECODE decode_beqz
= { M32R_INSN_BEQZ
, & ITAB (M32R_INSN_BEQZ
), EX (fmt_11_beqz
), READ (FMT_11_BEQZ
), FULL (beqz
), FAST (beqz
) };
93 static DECODE decode_bgez
= { M32R_INSN_BGEZ
, & ITAB (M32R_INSN_BGEZ
), EX (fmt_11_beqz
), READ (FMT_11_BEQZ
), FULL (bgez
), FAST (bgez
) };
94 static DECODE decode_bgtz
= { M32R_INSN_BGTZ
, & ITAB (M32R_INSN_BGTZ
), EX (fmt_11_beqz
), READ (FMT_11_BEQZ
), FULL (bgtz
), FAST (bgtz
) };
95 static DECODE decode_blez
= { M32R_INSN_BLEZ
, & ITAB (M32R_INSN_BLEZ
), EX (fmt_11_beqz
), READ (FMT_11_BEQZ
), FULL (blez
), FAST (blez
) };
96 static DECODE decode_bltz
= { M32R_INSN_BLTZ
, & ITAB (M32R_INSN_BLTZ
), EX (fmt_11_beqz
), READ (FMT_11_BEQZ
), FULL (bltz
), FAST (bltz
) };
97 static DECODE decode_bnez
= { M32R_INSN_BNEZ
, & ITAB (M32R_INSN_BNEZ
), EX (fmt_11_beqz
), READ (FMT_11_BEQZ
), FULL (bnez
), FAST (bnez
) };
98 static DECODE decode_bl8
= { M32R_INSN_BL8
, & ITAB (M32R_INSN_BL8
), EX (fmt_12_bl8
), READ (FMT_12_BL8
), FULL (bl8
), FAST (bl8
) };
99 static DECODE decode_bl24
= { M32R_INSN_BL24
, & ITAB (M32R_INSN_BL24
), EX (fmt_13_bl24
), READ (FMT_13_BL24
), FULL (bl24
), FAST (bl24
) };
100 static DECODE decode_bcl8
= { M32R_INSN_BCL8
, & ITAB (M32R_INSN_BCL8
), EX (fmt_14_bcl8
), READ (FMT_14_BCL8
), FULL (bcl8
), FAST (bcl8
) };
101 static DECODE decode_bcl24
= { M32R_INSN_BCL24
, & ITAB (M32R_INSN_BCL24
), EX (fmt_15_bcl24
), READ (FMT_15_BCL24
), FULL (bcl24
), FAST (bcl24
) };
102 static DECODE decode_bnc8
= { M32R_INSN_BNC8
, & ITAB (M32R_INSN_BNC8
), EX (fmt_8_bc8
), READ (FMT_8_BC8
), FULL (bnc8
), FAST (bnc8
) };
103 static DECODE decode_bnc24
= { M32R_INSN_BNC24
, & ITAB (M32R_INSN_BNC24
), EX (fmt_9_bc24
), READ (FMT_9_BC24
), FULL (bnc24
), FAST (bnc24
) };
104 static DECODE decode_bne
= { M32R_INSN_BNE
, & ITAB (M32R_INSN_BNE
), EX (fmt_10_beq
), READ (FMT_10_BEQ
), FULL (bne
), FAST (bne
) };
105 static DECODE decode_bra8
= { M32R_INSN_BRA8
, & ITAB (M32R_INSN_BRA8
), EX (fmt_16_bra8
), READ (FMT_16_BRA8
), FULL (bra8
), FAST (bra8
) };
106 static DECODE decode_bra24
= { M32R_INSN_BRA24
, & ITAB (M32R_INSN_BRA24
), EX (fmt_17_bra24
), READ (FMT_17_BRA24
), FULL (bra24
), FAST (bra24
) };
107 static DECODE decode_bncl8
= { M32R_INSN_BNCL8
, & ITAB (M32R_INSN_BNCL8
), EX (fmt_14_bcl8
), READ (FMT_14_BCL8
), FULL (bncl8
), FAST (bncl8
) };
108 static DECODE decode_bncl24
= { M32R_INSN_BNCL24
, & ITAB (M32R_INSN_BNCL24
), EX (fmt_15_bcl24
), READ (FMT_15_BCL24
), FULL (bncl24
), FAST (bncl24
) };
109 static DECODE decode_cmp
= { M32R_INSN_CMP
, & ITAB (M32R_INSN_CMP
), EX (fmt_18_cmp
), READ (FMT_18_CMP
), FULL (cmp
), FAST (cmp
) };
110 static DECODE decode_cmpi
= { M32R_INSN_CMPI
, & ITAB (M32R_INSN_CMPI
), EX (fmt_19_cmpi
), READ (FMT_19_CMPI
), FULL (cmpi
), FAST (cmpi
) };
111 static DECODE decode_cmpu
= { M32R_INSN_CMPU
, & ITAB (M32R_INSN_CMPU
), EX (fmt_18_cmp
), READ (FMT_18_CMP
), FULL (cmpu
), FAST (cmpu
) };
112 static DECODE decode_cmpui
= { M32R_INSN_CMPUI
, & ITAB (M32R_INSN_CMPUI
), EX (fmt_20_cmpui
), READ (FMT_20_CMPUI
), FULL (cmpui
), FAST (cmpui
) };
113 static DECODE decode_cmpeq
= { M32R_INSN_CMPEQ
, & ITAB (M32R_INSN_CMPEQ
), EX (fmt_18_cmp
), READ (FMT_18_CMP
), FULL (cmpeq
), FAST (cmpeq
) };
114 static DECODE decode_cmpz
= { M32R_INSN_CMPZ
, & ITAB (M32R_INSN_CMPZ
), EX (fmt_21_cmpz
), READ (FMT_21_CMPZ
), FULL (cmpz
), FAST (cmpz
) };
115 static DECODE decode_div
= { M32R_INSN_DIV
, & ITAB (M32R_INSN_DIV
), EX (fmt_22_div
), READ (FMT_22_DIV
), FULL (div
), FAST (div
) };
116 static DECODE decode_divu
= { M32R_INSN_DIVU
, & ITAB (M32R_INSN_DIVU
), EX (fmt_22_div
), READ (FMT_22_DIV
), FULL (divu
), FAST (divu
) };
117 static DECODE decode_rem
= { M32R_INSN_REM
, & ITAB (M32R_INSN_REM
), EX (fmt_22_div
), READ (FMT_22_DIV
), FULL (rem
), FAST (rem
) };
118 static DECODE decode_remu
= { M32R_INSN_REMU
, & ITAB (M32R_INSN_REMU
), EX (fmt_22_div
), READ (FMT_22_DIV
), FULL (remu
), FAST (remu
) };
119 static DECODE decode_divh
= { M32R_INSN_DIVH
, & ITAB (M32R_INSN_DIVH
), EX (fmt_22_div
), READ (FMT_22_DIV
), FULL (divh
), FAST (divh
) };
120 static DECODE decode_jc
= { M32R_INSN_JC
, & ITAB (M32R_INSN_JC
), EX (fmt_23_jc
), READ (FMT_23_JC
), FULL (jc
), FAST (jc
) };
121 static DECODE decode_jnc
= { M32R_INSN_JNC
, & ITAB (M32R_INSN_JNC
), EX (fmt_23_jc
), READ (FMT_23_JC
), FULL (jnc
), FAST (jnc
) };
122 static DECODE decode_jl
= { M32R_INSN_JL
, & ITAB (M32R_INSN_JL
), EX (fmt_24_jl
), READ (FMT_24_JL
), FULL (jl
), FAST (jl
) };
123 static DECODE decode_jmp
= { M32R_INSN_JMP
, & ITAB (M32R_INSN_JMP
), EX (fmt_25_jmp
), READ (FMT_25_JMP
), FULL (jmp
), FAST (jmp
) };
124 static DECODE decode_ld
= { M32R_INSN_LD
, & ITAB (M32R_INSN_LD
), EX (fmt_26_ld
), READ (FMT_26_LD
), FULL (ld
), FAST (ld
) };
125 static DECODE decode_ld_d
= { M32R_INSN_LD_D
, & ITAB (M32R_INSN_LD_D
), EX (fmt_27_ld_d
), READ (FMT_27_LD_D
), FULL (ld_d
), FAST (ld_d
) };
126 static DECODE decode_ldb
= { M32R_INSN_LDB
, & ITAB (M32R_INSN_LDB
), EX (fmt_28_ldb
), READ (FMT_28_LDB
), FULL (ldb
), FAST (ldb
) };
127 static DECODE decode_ldb_d
= { M32R_INSN_LDB_D
, & ITAB (M32R_INSN_LDB_D
), EX (fmt_29_ldb_d
), READ (FMT_29_LDB_D
), FULL (ldb_d
), FAST (ldb_d
) };
128 static DECODE decode_ldh
= { M32R_INSN_LDH
, & ITAB (M32R_INSN_LDH
), EX (fmt_30_ldh
), READ (FMT_30_LDH
), FULL (ldh
), FAST (ldh
) };
129 static DECODE decode_ldh_d
= { M32R_INSN_LDH_D
, & ITAB (M32R_INSN_LDH_D
), EX (fmt_31_ldh_d
), READ (FMT_31_LDH_D
), FULL (ldh_d
), FAST (ldh_d
) };
130 static DECODE decode_ldub
= { M32R_INSN_LDUB
, & ITAB (M32R_INSN_LDUB
), EX (fmt_28_ldb
), READ (FMT_28_LDB
), FULL (ldub
), FAST (ldub
) };
131 static DECODE decode_ldub_d
= { M32R_INSN_LDUB_D
, & ITAB (M32R_INSN_LDUB_D
), EX (fmt_29_ldb_d
), READ (FMT_29_LDB_D
), FULL (ldub_d
), FAST (ldub_d
) };
132 static DECODE decode_lduh
= { M32R_INSN_LDUH
, & ITAB (M32R_INSN_LDUH
), EX (fmt_30_ldh
), READ (FMT_30_LDH
), FULL (lduh
), FAST (lduh
) };
133 static DECODE decode_lduh_d
= { M32R_INSN_LDUH_D
, & ITAB (M32R_INSN_LDUH_D
), EX (fmt_31_ldh_d
), READ (FMT_31_LDH_D
), FULL (lduh_d
), FAST (lduh_d
) };
134 static DECODE decode_ld_plus
= { M32R_INSN_LD_PLUS
, & ITAB (M32R_INSN_LD_PLUS
), EX (fmt_32_ld_plus
), READ (FMT_32_LD_PLUS
), FULL (ld_plus
), FAST (ld_plus
) };
135 static DECODE decode_ld24
= { M32R_INSN_LD24
, & ITAB (M32R_INSN_LD24
), EX (fmt_33_ld24
), READ (FMT_33_LD24
), FULL (ld24
), FAST (ld24
) };
136 static DECODE decode_ldi8
= { M32R_INSN_LDI8
, & ITAB (M32R_INSN_LDI8
), EX (fmt_34_ldi8
), READ (FMT_34_LDI8
), FULL (ldi8
), FAST (ldi8
) };
137 static DECODE decode_ldi16
= { M32R_INSN_LDI16
, & ITAB (M32R_INSN_LDI16
), EX (fmt_35_ldi16
), READ (FMT_35_LDI16
), FULL (ldi16
), FAST (ldi16
) };
138 static DECODE decode_lock
= { M32R_INSN_LOCK
, & ITAB (M32R_INSN_LOCK
), EX (fmt_36_lock
), READ (FMT_36_LOCK
), FULL (lock
), FAST (lock
) };
139 static DECODE decode_machi_a
= { M32R_INSN_MACHI_A
, & ITAB (M32R_INSN_MACHI_A
), EX (fmt_37_machi_a
), READ (FMT_37_MACHI_A
), FULL (machi_a
), FAST (machi_a
) };
140 static DECODE decode_maclo_a
= { M32R_INSN_MACLO_A
, & ITAB (M32R_INSN_MACLO_A
), EX (fmt_37_machi_a
), READ (FMT_37_MACHI_A
), FULL (maclo_a
), FAST (maclo_a
) };
141 static DECODE decode_mul
= { M32R_INSN_MUL
, & ITAB (M32R_INSN_MUL
), EX (fmt_0_add
), READ (FMT_0_ADD
), FULL (mul
), FAST (mul
) };
142 static DECODE decode_mulhi_a
= { M32R_INSN_MULHI_A
, & ITAB (M32R_INSN_MULHI_A
), EX (fmt_38_mulhi_a
), READ (FMT_38_MULHI_A
), FULL (mulhi_a
), FAST (mulhi_a
) };
143 static DECODE decode_mullo_a
= { M32R_INSN_MULLO_A
, & ITAB (M32R_INSN_MULLO_A
), EX (fmt_38_mulhi_a
), READ (FMT_38_MULHI_A
), FULL (mullo_a
), FAST (mullo_a
) };
144 static DECODE decode_mv
= { M32R_INSN_MV
, & ITAB (M32R_INSN_MV
), EX (fmt_39_mv
), READ (FMT_39_MV
), FULL (mv
), FAST (mv
) };
145 static DECODE decode_mvfachi_a
= { M32R_INSN_MVFACHI_A
, & ITAB (M32R_INSN_MVFACHI_A
), EX (fmt_40_mvfachi_a
), READ (FMT_40_MVFACHI_A
), FULL (mvfachi_a
), FAST (mvfachi_a
) };
146 static DECODE decode_mvfaclo_a
= { M32R_INSN_MVFACLO_A
, & ITAB (M32R_INSN_MVFACLO_A
), EX (fmt_40_mvfachi_a
), READ (FMT_40_MVFACHI_A
), FULL (mvfaclo_a
), FAST (mvfaclo_a
) };
147 static DECODE decode_mvfacmi_a
= { M32R_INSN_MVFACMI_A
, & ITAB (M32R_INSN_MVFACMI_A
), EX (fmt_40_mvfachi_a
), READ (FMT_40_MVFACHI_A
), FULL (mvfacmi_a
), FAST (mvfacmi_a
) };
148 static DECODE decode_mvfc
= { M32R_INSN_MVFC
, & ITAB (M32R_INSN_MVFC
), EX (fmt_41_mvfc
), READ (FMT_41_MVFC
), FULL (mvfc
), FAST (mvfc
) };
149 static DECODE decode_mvtachi_a
= { M32R_INSN_MVTACHI_A
, & ITAB (M32R_INSN_MVTACHI_A
), EX (fmt_42_mvtachi_a
), READ (FMT_42_MVTACHI_A
), FULL (mvtachi_a
), FAST (mvtachi_a
) };
150 static DECODE decode_mvtaclo_a
= { M32R_INSN_MVTACLO_A
, & ITAB (M32R_INSN_MVTACLO_A
), EX (fmt_42_mvtachi_a
), READ (FMT_42_MVTACHI_A
), FULL (mvtaclo_a
), FAST (mvtaclo_a
) };
151 static DECODE decode_mvtc
= { M32R_INSN_MVTC
, & ITAB (M32R_INSN_MVTC
), EX (fmt_43_mvtc
), READ (FMT_43_MVTC
), FULL (mvtc
), FAST (mvtc
) };
152 static DECODE decode_neg
= { M32R_INSN_NEG
, & ITAB (M32R_INSN_NEG
), EX (fmt_39_mv
), READ (FMT_39_MV
), FULL (neg
), FAST (neg
) };
153 static DECODE decode_nop
= { M32R_INSN_NOP
, & ITAB (M32R_INSN_NOP
), EX (fmt_44_nop
), READ (FMT_44_NOP
), FULL (nop
), FAST (nop
) };
154 static DECODE decode_not
= { M32R_INSN_NOT
, & ITAB (M32R_INSN_NOT
), EX (fmt_39_mv
), READ (FMT_39_MV
), FULL (not), FAST (not) };
155 static DECODE decode_rac_dsi
= { M32R_INSN_RAC_DSI
, & ITAB (M32R_INSN_RAC_DSI
), EX (fmt_45_rac_dsi
), READ (FMT_45_RAC_DSI
), FULL (rac_dsi
), FAST (rac_dsi
) };
156 static DECODE decode_rach_dsi
= { M32R_INSN_RACH_DSI
, & ITAB (M32R_INSN_RACH_DSI
), EX (fmt_45_rac_dsi
), READ (FMT_45_RAC_DSI
), FULL (rach_dsi
), FAST (rach_dsi
) };
157 static DECODE decode_rte
= { M32R_INSN_RTE
, & ITAB (M32R_INSN_RTE
), EX (fmt_46_rte
), READ (FMT_46_RTE
), FULL (rte
), FAST (rte
) };
158 static DECODE decode_seth
= { M32R_INSN_SETH
, & ITAB (M32R_INSN_SETH
), EX (fmt_47_seth
), READ (FMT_47_SETH
), FULL (seth
), FAST (seth
) };
159 static DECODE decode_sll
= { M32R_INSN_SLL
, & ITAB (M32R_INSN_SLL
), EX (fmt_0_add
), READ (FMT_0_ADD
), FULL (sll
), FAST (sll
) };
160 static DECODE decode_sll3
= { M32R_INSN_SLL3
, & ITAB (M32R_INSN_SLL3
), EX (fmt_48_sll3
), READ (FMT_48_SLL3
), FULL (sll3
), FAST (sll3
) };
161 static DECODE decode_slli
= { M32R_INSN_SLLI
, & ITAB (M32R_INSN_SLLI
), EX (fmt_49_slli
), READ (FMT_49_SLLI
), FULL (slli
), FAST (slli
) };
162 static DECODE decode_sra
= { M32R_INSN_SRA
, & ITAB (M32R_INSN_SRA
), EX (fmt_0_add
), READ (FMT_0_ADD
), FULL (sra
), FAST (sra
) };
163 static DECODE decode_sra3
= { M32R_INSN_SRA3
, & ITAB (M32R_INSN_SRA3
), EX (fmt_48_sll3
), READ (FMT_48_SLL3
), FULL (sra3
), FAST (sra3
) };
164 static DECODE decode_srai
= { M32R_INSN_SRAI
, & ITAB (M32R_INSN_SRAI
), EX (fmt_49_slli
), READ (FMT_49_SLLI
), FULL (srai
), FAST (srai
) };
165 static DECODE decode_srl
= { M32R_INSN_SRL
, & ITAB (M32R_INSN_SRL
), EX (fmt_0_add
), READ (FMT_0_ADD
), FULL (srl
), FAST (srl
) };
166 static DECODE decode_srl3
= { M32R_INSN_SRL3
, & ITAB (M32R_INSN_SRL3
), EX (fmt_48_sll3
), READ (FMT_48_SLL3
), FULL (srl3
), FAST (srl3
) };
167 static DECODE decode_srli
= { M32R_INSN_SRLI
, & ITAB (M32R_INSN_SRLI
), EX (fmt_49_slli
), READ (FMT_49_SLLI
), FULL (srli
), FAST (srli
) };
168 static DECODE decode_st
= { M32R_INSN_ST
, & ITAB (M32R_INSN_ST
), EX (fmt_50_st
), READ (FMT_50_ST
), FULL (st
), FAST (st
) };
169 static DECODE decode_st_d
= { M32R_INSN_ST_D
, & ITAB (M32R_INSN_ST_D
), EX (fmt_51_st_d
), READ (FMT_51_ST_D
), FULL (st_d
), FAST (st_d
) };
170 static DECODE decode_stb
= { M32R_INSN_STB
, & ITAB (M32R_INSN_STB
), EX (fmt_52_stb
), READ (FMT_52_STB
), FULL (stb
), FAST (stb
) };
171 static DECODE decode_stb_d
= { M32R_INSN_STB_D
, & ITAB (M32R_INSN_STB_D
), EX (fmt_53_stb_d
), READ (FMT_53_STB_D
), FULL (stb_d
), FAST (stb_d
) };
172 static DECODE decode_sth
= { M32R_INSN_STH
, & ITAB (M32R_INSN_STH
), EX (fmt_54_sth
), READ (FMT_54_STH
), FULL (sth
), FAST (sth
) };
173 static DECODE decode_sth_d
= { M32R_INSN_STH_D
, & ITAB (M32R_INSN_STH_D
), EX (fmt_55_sth_d
), READ (FMT_55_STH_D
), FULL (sth_d
), FAST (sth_d
) };
174 static DECODE decode_st_plus
= { M32R_INSN_ST_PLUS
, & ITAB (M32R_INSN_ST_PLUS
), EX (fmt_56_st_plus
), READ (FMT_56_ST_PLUS
), FULL (st_plus
), FAST (st_plus
) };
175 static DECODE decode_st_minus
= { M32R_INSN_ST_MINUS
, & ITAB (M32R_INSN_ST_MINUS
), EX (fmt_56_st_plus
), READ (FMT_56_ST_PLUS
), FULL (st_minus
), FAST (st_minus
) };
176 static DECODE decode_sub
= { M32R_INSN_SUB
, & ITAB (M32R_INSN_SUB
), EX (fmt_0_add
), READ (FMT_0_ADD
), FULL (sub
), FAST (sub
) };
177 static DECODE decode_subv
= { M32R_INSN_SUBV
, & ITAB (M32R_INSN_SUBV
), EX (fmt_5_addv
), READ (FMT_5_ADDV
), FULL (subv
), FAST (subv
) };
178 static DECODE decode_subx
= { M32R_INSN_SUBX
, & ITAB (M32R_INSN_SUBX
), EX (fmt_7_addx
), READ (FMT_7_ADDX
), FULL (subx
), FAST (subx
) };
179 static DECODE decode_trap
= { M32R_INSN_TRAP
, & ITAB (M32R_INSN_TRAP
), EX (fmt_57_trap
), READ (FMT_57_TRAP
), FULL (trap
), FAST (trap
) };
180 static DECODE decode_unlock
= { M32R_INSN_UNLOCK
, & ITAB (M32R_INSN_UNLOCK
), EX (fmt_58_unlock
), READ (FMT_58_UNLOCK
), FULL (unlock
), FAST (unlock
) };
181 static DECODE decode_satb
= { M32R_INSN_SATB
, & ITAB (M32R_INSN_SATB
), EX (fmt_59_satb
), READ (FMT_59_SATB
), FULL (satb
), FAST (satb
) };
182 static DECODE decode_sath
= { M32R_INSN_SATH
, & ITAB (M32R_INSN_SATH
), EX (fmt_59_satb
), READ (FMT_59_SATB
), FULL (sath
), FAST (sath
) };
183 static DECODE decode_sat
= { M32R_INSN_SAT
, & ITAB (M32R_INSN_SAT
), EX (fmt_60_sat
), READ (FMT_60_SAT
), FULL (sat
), FAST (sat
) };
184 static DECODE decode_pcmpbz
= { M32R_INSN_PCMPBZ
, & ITAB (M32R_INSN_PCMPBZ
), EX (fmt_21_cmpz
), READ (FMT_21_CMPZ
), FULL (pcmpbz
), FAST (pcmpbz
) };
185 static DECODE decode_sadd
= { M32R_INSN_SADD
, & ITAB (M32R_INSN_SADD
), EX (fmt_61_sadd
), READ (FMT_61_SADD
), FULL (sadd
), FAST (sadd
) };
186 static DECODE decode_macwu1
= { M32R_INSN_MACWU1
, & ITAB (M32R_INSN_MACWU1
), EX (fmt_62_macwu1
), READ (FMT_62_MACWU1
), FULL (macwu1
), FAST (macwu1
) };
187 static DECODE decode_msblo
= { M32R_INSN_MSBLO
, & ITAB (M32R_INSN_MSBLO
), EX (fmt_63_msblo
), READ (FMT_63_MSBLO
), FULL (msblo
), FAST (msblo
) };
188 static DECODE decode_mulwu1
= { M32R_INSN_MULWU1
, & ITAB (M32R_INSN_MULWU1
), EX (fmt_64_mulwu1
), READ (FMT_64_MULWU1
), FULL (mulwu1
), FAST (mulwu1
) };
189 static DECODE decode_maclh1
= { M32R_INSN_MACLH1
, & ITAB (M32R_INSN_MACLH1
), EX (fmt_62_macwu1
), READ (FMT_62_MACWU1
), FULL (maclh1
), FAST (maclh1
) };
190 static DECODE decode_sc
= { M32R_INSN_SC
, & ITAB (M32R_INSN_SC
), EX (fmt_65_sc
), READ (FMT_65_SC
), FULL (sc
), FAST (sc
) };
191 static DECODE decode_snc
= { M32R_INSN_SNC
, & ITAB (M32R_INSN_SNC
), EX (fmt_65_sc
), READ (FMT_65_SC
), FULL (snc
), FAST (snc
) };
193 DECODE m32rx_decode_illegal
= {
194 M32R_INSN_ILLEGAL
, & ITAB (M32R_INSN_ILLEGAL
),
195 EX (illegal
), FULL (illegal
), FAST (illegal
)
198 /* The order must match that of `labels' in sem-switch.c/read.c. */
200 DECODE
*m32rx_decode_vars
[] = {
201 & m32rx_decode_illegal
,
320 /* The decoder needs a slightly different computed goto switch control. */
322 #define DECODE_SWITCH(N, X) goto *labels_##N[X];
324 #define DECODE_SWITCH(N, X) switch (X)
327 /* Given an instruction, return a pointer to its DECODE entry. */
330 m32rx_decode (current_cpu
, pc
, insn
)
331 SIM_CPU
*current_cpu
;
337 static void *labels_0
[256] = {
338 && default_0
, && default_0
, && default_0
, && default_0
,
339 && default_0
, && default_0
, && default_0
, && case_0_7
,
340 && default_0
, && default_0
, && default_0
, && default_0
,
341 && default_0
, && default_0
, && default_0
, && default_0
,
342 && default_0
, && default_0
, && default_0
, && default_0
,
343 && default_0
, && default_0
, && default_0
, && default_0
,
344 && default_0
, && default_0
, && default_0
, && default_0
,
345 && case_0_28
, && default_0
, && default_0
, && default_0
,
346 && default_0
, && default_0
, && default_0
, && default_0
,
347 && default_0
, && default_0
, && default_0
, && default_0
,
348 && default_0
, && default_0
, && default_0
, && default_0
,
349 && default_0
, && default_0
, && default_0
, && default_0
,
350 && default_0
, && default_0
, && default_0
, && default_0
,
351 && default_0
, && default_0
, && default_0
, && default_0
,
352 && default_0
, && default_0
, && default_0
, && default_0
,
353 && default_0
, && default_0
, && default_0
, && default_0
,
354 && default_0
, && default_0
, && default_0
, && default_0
,
355 && default_0
, && default_0
, && default_0
, && default_0
,
356 && default_0
, && default_0
, && default_0
, && default_0
,
357 && default_0
, && default_0
, && default_0
, && default_0
,
358 && default_0
, && default_0
, && default_0
, && default_0
,
359 && default_0
, && default_0
, && default_0
, && case_0_87
,
360 && default_0
, && default_0
, && default_0
, && default_0
,
361 && default_0
, && default_0
, && default_0
, && case_0_95
,
362 && default_0
, && default_0
, && default_0
, && default_0
,
363 && default_0
, && default_0
, && default_0
, && default_0
,
364 && default_0
, && default_0
, && default_0
, && default_0
,
365 && default_0
, && default_0
, && default_0
, && default_0
,
366 && case_0_112
, && case_0_113
, && case_0_114
, && case_0_115
,
367 && case_0_116
, && case_0_117
, && case_0_118
, && case_0_119
,
368 && case_0_120
, && case_0_121
, && case_0_122
, && case_0_123
,
369 && case_0_124
, && case_0_125
, && case_0_126
, && case_0_127
,
370 && case_0_128
, && default_0
, && default_0
, && default_0
,
371 && default_0
, && default_0
, && default_0
, && default_0
,
372 && default_0
, && default_0
, && default_0
, && default_0
,
373 && default_0
, && default_0
, && default_0
, && default_0
,
374 && case_0_144
, && default_0
, && default_0
, && default_0
,
375 && default_0
, && default_0
, && default_0
, && default_0
,
376 && default_0
, && default_0
, && default_0
, && default_0
,
377 && default_0
, && default_0
, && default_0
, && default_0
,
378 && default_0
, && default_0
, && default_0
, && default_0
,
379 && default_0
, && default_0
, && default_0
, && default_0
,
380 && default_0
, && default_0
, && default_0
, && default_0
,
381 && default_0
, && default_0
, && default_0
, && default_0
,
382 && default_0
, && default_0
, && default_0
, && default_0
,
383 && default_0
, && default_0
, && default_0
, && default_0
,
384 && default_0
, && default_0
, && default_0
, && default_0
,
385 && default_0
, && default_0
, && default_0
, && default_0
,
386 && default_0
, && default_0
, && default_0
, && default_0
,
387 && default_0
, && default_0
, && default_0
, && default_0
,
388 && default_0
, && default_0
, && default_0
, && default_0
,
389 && default_0
, && default_0
, && default_0
, && default_0
,
390 && default_0
, && default_0
, && default_0
, && default_0
,
391 && default_0
, && default_0
, && default_0
, && default_0
,
392 && default_0
, && default_0
, && default_0
, && default_0
,
393 && default_0
, && default_0
, && default_0
, && default_0
,
394 && default_0
, && default_0
, && default_0
, && default_0
,
395 && default_0
, && default_0
, && default_0
, && default_0
,
396 && default_0
, && default_0
, && default_0
, && default_0
,
397 && default_0
, && default_0
, && default_0
, && default_0
,
398 && case_0_240
, && case_0_241
, && case_0_242
, && case_0_243
,
399 && case_0_244
, && case_0_245
, && case_0_246
, && case_0_247
,
400 && case_0_248
, && case_0_249
, && case_0_250
, && case_0_251
,
401 && case_0_252
, && case_0_253
, && case_0_254
, && case_0_255
,
404 static DECODE
*insns
[256] = {
405 &decode_subv
, &decode_subx
, &decode_sub
, &decode_neg
,
406 &decode_cmp
, &decode_cmpu
, &decode_cmpeq
, 0,
407 &decode_addv
, &decode_addx
, &decode_add
, &decode_not
,
408 &decode_and
, &decode_xor
, &decode_or
, &decode_illegal
,
409 &decode_srl
, &decode_illegal
, &decode_sra
, &decode_illegal
,
410 &decode_sll
, &decode_illegal
, &decode_mul
, &decode_illegal
,
411 &decode_mv
, &decode_mvfc
, &decode_mvtc
, &decode_illegal
,
412 0, &decode_rte
, &decode_illegal
, &decode_trap
,
413 &decode_stb
, &decode_illegal
, &decode_sth
, &decode_illegal
,
414 &decode_st
, &decode_unlock
, &decode_st_plus
, &decode_st_minus
,
415 &decode_ldb
, &decode_ldub
, &decode_ldh
, &decode_lduh
,
416 &decode_ld
, &decode_lock
, &decode_ld_plus
, &decode_illegal
,
417 &decode_mulhi_a
, &decode_mullo_a
, &decode_illegal
, &decode_illegal
,
418 &decode_machi_a
, &decode_maclo_a
, &decode_illegal
, &decode_illegal
,
419 &decode_mulhi_a
, &decode_mullo_a
, &decode_illegal
, &decode_illegal
,
420 &decode_machi_a
, &decode_maclo_a
, &decode_illegal
, &decode_illegal
,
421 &decode_addi
, &decode_addi
, &decode_addi
, &decode_addi
,
422 &decode_addi
, &decode_addi
, &decode_addi
, &decode_addi
,
423 &decode_addi
, &decode_addi
, &decode_addi
, &decode_addi
,
424 &decode_addi
, &decode_addi
, &decode_addi
, &decode_addi
,
425 &decode_srli
, &decode_srli
, &decode_srai
, &decode_srai
,
426 &decode_slli
, &decode_slli
, &decode_illegal
, 0,
427 &decode_rach_dsi
, &decode_rac_dsi
, &decode_mulwu1
, &decode_macwu1
,
428 &decode_maclh1
, &decode_msblo
, &decode_sadd
, 0,
429 &decode_ldi8
, &decode_ldi8
, &decode_ldi8
, &decode_ldi8
,
430 &decode_ldi8
, &decode_ldi8
, &decode_ldi8
, &decode_ldi8
,
431 &decode_ldi8
, &decode_ldi8
, &decode_ldi8
, &decode_ldi8
,
432 &decode_ldi8
, &decode_ldi8
, &decode_ldi8
, &decode_ldi8
,
437 0, &decode_illegal
, &decode_illegal
, &decode_illegal
,
438 &decode_cmpi
, &decode_cmpui
, &decode_illegal
, &decode_illegal
,
439 &decode_addv3
, &decode_illegal
, &decode_add3
, &decode_illegal
,
440 &decode_and3
, &decode_xor3
, &decode_or3
, &decode_illegal
,
441 0, &decode_divu
, &decode_rem
, &decode_remu
,
442 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
443 &decode_srl3
, &decode_illegal
, &decode_sra3
, &decode_illegal
,
444 &decode_sll3
, &decode_illegal
, &decode_illegal
, &decode_ldi16
,
445 &decode_stb_d
, &decode_illegal
, &decode_sth_d
, &decode_illegal
,
446 &decode_st_d
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
447 &decode_ldb_d
, &decode_ldub_d
, &decode_ldh_d
, &decode_lduh_d
,
448 &decode_ld_d
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
449 &decode_beq
, &decode_bne
, &decode_illegal
, &decode_illegal
,
450 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
451 &decode_beqz
, &decode_bnez
, &decode_bltz
, &decode_bgez
,
452 &decode_blez
, &decode_bgtz
, &decode_illegal
, &decode_illegal
,
453 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
454 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
455 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
456 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
457 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
458 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
459 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
460 &decode_seth
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
461 &decode_ld24
, &decode_ld24
, &decode_ld24
, &decode_ld24
,
462 &decode_ld24
, &decode_ld24
, &decode_ld24
, &decode_ld24
,
463 &decode_ld24
, &decode_ld24
, &decode_ld24
, &decode_ld24
,
464 &decode_ld24
, &decode_ld24
, &decode_ld24
, &decode_ld24
,
471 val
= (((insn
>> 8) & (15 << 4)) | ((insn
>> 4) & (15 << 0)));
472 DECODE_SWITCH (0, val
)
476 static DECODE
*insns
[16] = {
477 &decode_cmpz
, &decode_illegal
, &decode_illegal
, &decode_pcmpbz
,
478 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
479 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
480 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
482 unsigned int val
= (((insn
>> 8) & (15 << 0)));
487 static DECODE
*insns
[16] = {
488 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
489 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
490 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
491 &decode_jc
, &decode_jnc
, &decode_jl
, &decode_jmp
,
493 unsigned int val
= (((insn
>> 8) & (15 << 0)));
498 static DECODE
*insns
[4] = {
499 &decode_mvtachi_a
, &decode_mvtaclo_a
, &decode_illegal
, &decode_illegal
,
501 unsigned int val
= (((insn
>> 0) & (3 << 0)));
506 static DECODE
*insns
[4] = {
507 &decode_mvfachi_a
, &decode_mvfaclo_a
, &decode_mvfacmi_a
, &decode_illegal
,
509 unsigned int val
= (((insn
>> 0) & (3 << 0)));
514 static DECODE
*insns
[16] = {
515 &decode_nop
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
516 &decode_sc
, &decode_snc
, &decode_illegal
, &decode_illegal
,
517 &decode_bcl8
, &decode_bncl8
, &decode_illegal
, &decode_illegal
,
518 &decode_bc8
, &decode_bnc8
, &decode_bl8
, &decode_bra8
,
520 unsigned int val
= (((insn
>> 8) & (15 << 0)));
523 CASE (0, 113) : /* fall through */
524 CASE (0, 114) : /* fall through */
525 CASE (0, 115) : /* fall through */
526 CASE (0, 116) : /* fall through */
527 CASE (0, 117) : /* fall through */
528 CASE (0, 118) : /* fall through */
529 CASE (0, 119) : /* fall through */
530 CASE (0, 120) : /* fall through */
531 CASE (0, 121) : /* fall through */
532 CASE (0, 122) : /* fall through */
533 CASE (0, 123) : /* fall through */
534 CASE (0, 124) : /* fall through */
535 CASE (0, 125) : /* fall through */
536 CASE (0, 126) : /* fall through */
539 static DECODE
*insns
[16] = {
540 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
541 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
542 &decode_bcl8
, &decode_bncl8
, &decode_illegal
, &decode_illegal
,
543 &decode_bc8
, &decode_bnc8
, &decode_bl8
, &decode_bra8
,
545 unsigned int val
= (((insn
>> 8) & (15 << 0)));
551 static void *labels_0_128
[16] = {
552 && case_0_128_0
, && default_0_128
, && default_0_128
, && default_0_128
,
553 && default_0_128
, && default_0_128
, && default_0_128
, && default_0_128
,
554 && default_0_128
, && default_0_128
, && default_0_128
, && default_0_128
,
555 && default_0_128
, && default_0_128
, && default_0_128
, && default_0_128
,
558 static DECODE
*insns
[16] = {
559 0, &decode_illegal
, &decode_illegal
, &decode_illegal
,
560 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
561 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
562 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
565 /* Must fetch more bits. */
566 insn
= GETIMEMUHI (current_cpu
, CPU (h_pc
) + 2);
567 val
= (((insn
>> 12) & (15 << 0)));
568 DECODE_SWITCH (0_128
, val
)
572 static DECODE
*insns
[16] = {
573 &decode_sat
, &decode_satb
, &decode_sath
, &decode_illegal
,
574 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
575 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
576 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
578 unsigned int val
= (((insn
>> 8) & (15 << 0)));
581 DEFAULT (0_128
) : return insns
[val
];
588 static void *labels_0_144
[16] = {
589 && case_0_144_0
, && default_0_144
, && default_0_144
, && default_0_144
,
590 && default_0_144
, && default_0_144
, && default_0_144
, && default_0_144
,
591 && default_0_144
, && default_0_144
, && default_0_144
, && default_0_144
,
592 && default_0_144
, && default_0_144
, && default_0_144
, && default_0_144
,
595 static DECODE
*insns
[16] = {
596 0, &decode_illegal
, &decode_illegal
, &decode_illegal
,
597 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
598 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
599 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
602 /* Must fetch more bits. */
603 insn
= GETIMEMUHI (current_cpu
, CPU (h_pc
) + 2);
604 val
= (((insn
>> 12) & (15 << 0)));
605 DECODE_SWITCH (0_144
, val
)
610 static void *labels_0_144_0
[16] = {
611 && case_0_144_0_0
, && default_0_144_0
, && default_0_144_0
, && default_0_144_0
,
612 && default_0_144_0
, && default_0_144_0
, && default_0_144_0
, && default_0_144_0
,
613 && default_0_144_0
, && default_0_144_0
, && default_0_144_0
, && default_0_144_0
,
614 && default_0_144_0
, && default_0_144_0
, && default_0_144_0
, && default_0_144_0
,
617 static DECODE
*insns
[16] = {
618 0, &decode_illegal
, &decode_illegal
, &decode_illegal
,
619 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
620 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
621 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
624 val
= (((insn
>> 8) & (15 << 0)));
625 DECODE_SWITCH (0_144_0
, val
)
629 static DECODE
*insns
[16] = {
630 &decode_div
, &decode_divh
, &decode_illegal
, &decode_illegal
,
631 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
632 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
633 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
635 unsigned int val
= (((insn
>> 4) & (15 << 0)));
638 DEFAULT (0_144_0
) : return insns
[val
];
642 DEFAULT (0_144
) : return insns
[val
];
646 CASE (0, 240) : /* fall through */
647 CASE (0, 241) : /* fall through */
648 CASE (0, 242) : /* fall through */
649 CASE (0, 243) : /* fall through */
650 CASE (0, 244) : /* fall through */
651 CASE (0, 245) : /* fall through */
652 CASE (0, 246) : /* fall through */
653 CASE (0, 247) : /* fall through */
654 CASE (0, 248) : /* fall through */
655 CASE (0, 249) : /* fall through */
656 CASE (0, 250) : /* fall through */
657 CASE (0, 251) : /* fall through */
658 CASE (0, 252) : /* fall through */
659 CASE (0, 253) : /* fall through */
660 CASE (0, 254) : /* fall through */
663 static DECODE
*insns
[16] = {
664 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
665 &decode_illegal
, &decode_illegal
, &decode_illegal
, &decode_illegal
,
666 &decode_bcl24
, &decode_bncl24
, &decode_illegal
, &decode_illegal
,
667 &decode_bc24
, &decode_bnc24
, &decode_bl24
, &decode_bra24
,
669 unsigned int val
= (((insn
>> 8) & (15 << 0)));
672 DEFAULT (0) : return insns
[val
];
projects / binutils-gdb.git / blob