sim/m32r/semx-switch.c

   1 /* Simulator instruction semantics for m32rxf.
   2
   3 THIS FILE IS MACHINE GENERATED WITH CGEN.
   4
   5 Copyright 1996-2009 Free Software Foundation, Inc.
   6
   7 This file is part of the GNU simulators.
   8
   9    This file is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation; either version 3, or (at your option)
  12    any later version.
  13
  14    It is distributed in the hope that it will be useful, but WITHOUT
  15    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  16    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  17    License for more details.
  18
  19    You should have received a copy of the GNU General Public License along
  20    with this program; if not, write to the Free Software Foundation, Inc.,
  21    51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
  22
  23 */
  24
  25 #ifdef DEFINE_LABELS
  26
  27   /* The labels have the case they have because the enum of insn types
  28      is all uppercase and in the non-stdc case the insn symbol is built
  29      into the enum name.  */
  30
  31   static struct {
  32     int index;
  33     void *label;
  34   } labels[] = {
  35     { M32RXF_INSN_X_INVALID, && case_sem_INSN_X_INVALID },
  36     { M32RXF_INSN_X_AFTER, && case_sem_INSN_X_AFTER },
  37     { M32RXF_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE },
  38     { M32RXF_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN },
  39     { M32RXF_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN },
  40     { M32RXF_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN },
  41     { M32RXF_INSN_ADD, && case_sem_INSN_ADD },
  42     { M32RXF_INSN_ADD3, && case_sem_INSN_ADD3 },
  43     { M32RXF_INSN_AND, && case_sem_INSN_AND },
  44     { M32RXF_INSN_AND3, && case_sem_INSN_AND3 },
  45     { M32RXF_INSN_OR, && case_sem_INSN_OR },
  46     { M32RXF_INSN_OR3, && case_sem_INSN_OR3 },
  47     { M32RXF_INSN_XOR, && case_sem_INSN_XOR },
  48     { M32RXF_INSN_XOR3, && case_sem_INSN_XOR3 },
  49     { M32RXF_INSN_ADDI, && case_sem_INSN_ADDI },
  50     { M32RXF_INSN_ADDV, && case_sem_INSN_ADDV },
  51     { M32RXF_INSN_ADDV3, && case_sem_INSN_ADDV3 },
  52     { M32RXF_INSN_ADDX, && case_sem_INSN_ADDX },
  53     { M32RXF_INSN_BC8, && case_sem_INSN_BC8 },
  54     { M32RXF_INSN_BC24, && case_sem_INSN_BC24 },
  55     { M32RXF_INSN_BEQ, && case_sem_INSN_BEQ },
  56     { M32RXF_INSN_BEQZ, && case_sem_INSN_BEQZ },
  57     { M32RXF_INSN_BGEZ, && case_sem_INSN_BGEZ },
  58     { M32RXF_INSN_BGTZ, && case_sem_INSN_BGTZ },
  59     { M32RXF_INSN_BLEZ, && case_sem_INSN_BLEZ },
  60     { M32RXF_INSN_BLTZ, && case_sem_INSN_BLTZ },
  61     { M32RXF_INSN_BNEZ, && case_sem_INSN_BNEZ },
  62     { M32RXF_INSN_BL8, && case_sem_INSN_BL8 },
  63     { M32RXF_INSN_BL24, && case_sem_INSN_BL24 },
  64     { M32RXF_INSN_BCL8, && case_sem_INSN_BCL8 },
  65     { M32RXF_INSN_BCL24, && case_sem_INSN_BCL24 },
  66     { M32RXF_INSN_BNC8, && case_sem_INSN_BNC8 },
  67     { M32RXF_INSN_BNC24, && case_sem_INSN_BNC24 },
  68     { M32RXF_INSN_BNE, && case_sem_INSN_BNE },
  69     { M32RXF_INSN_BRA8, && case_sem_INSN_BRA8 },
  70     { M32RXF_INSN_BRA24, && case_sem_INSN_BRA24 },
  71     { M32RXF_INSN_BNCL8, && case_sem_INSN_BNCL8 },
  72     { M32RXF_INSN_BNCL24, && case_sem_INSN_BNCL24 },
  73     { M32RXF_INSN_CMP, && case_sem_INSN_CMP },
  74     { M32RXF_INSN_CMPI, && case_sem_INSN_CMPI },
  75     { M32RXF_INSN_CMPU, && case_sem_INSN_CMPU },
  76     { M32RXF_INSN_CMPUI, && case_sem_INSN_CMPUI },
  77     { M32RXF_INSN_CMPEQ, && case_sem_INSN_CMPEQ },
  78     { M32RXF_INSN_CMPZ, && case_sem_INSN_CMPZ },
  79     { M32RXF_INSN_DIV, && case_sem_INSN_DIV },
  80     { M32RXF_INSN_DIVU, && case_sem_INSN_DIVU },
  81     { M32RXF_INSN_REM, && case_sem_INSN_REM },
  82     { M32RXF_INSN_REMU, && case_sem_INSN_REMU },
  83     { M32RXF_INSN_DIVH, && case_sem_INSN_DIVH },
  84     { M32RXF_INSN_JC, && case_sem_INSN_JC },
  85     { M32RXF_INSN_JNC, && case_sem_INSN_JNC },
  86     { M32RXF_INSN_JL, && case_sem_INSN_JL },
  87     { M32RXF_INSN_JMP, && case_sem_INSN_JMP },
  88     { M32RXF_INSN_LD, && case_sem_INSN_LD },
  89     { M32RXF_INSN_LD_D, && case_sem_INSN_LD_D },
  90     { M32RXF_INSN_LDB, && case_sem_INSN_LDB },
  91     { M32RXF_INSN_LDB_D, && case_sem_INSN_LDB_D },
  92     { M32RXF_INSN_LDH, && case_sem_INSN_LDH },
  93     { M32RXF_INSN_LDH_D, && case_sem_INSN_LDH_D },
  94     { M32RXF_INSN_LDUB, && case_sem_INSN_LDUB },
  95     { M32RXF_INSN_LDUB_D, && case_sem_INSN_LDUB_D },
  96     { M32RXF_INSN_LDUH, && case_sem_INSN_LDUH },
  97     { M32RXF_INSN_LDUH_D, && case_sem_INSN_LDUH_D },
  98     { M32RXF_INSN_LD_PLUS, && case_sem_INSN_LD_PLUS },
  99     { M32RXF_INSN_LD24, && case_sem_INSN_LD24 },
 100     { M32RXF_INSN_LDI8, && case_sem_INSN_LDI8 },
 101     { M32RXF_INSN_LDI16, && case_sem_INSN_LDI16 },
 102     { M32RXF_INSN_LOCK, && case_sem_INSN_LOCK },
 103     { M32RXF_INSN_MACHI_A, && case_sem_INSN_MACHI_A },
 104     { M32RXF_INSN_MACLO_A, && case_sem_INSN_MACLO_A },
 105     { M32RXF_INSN_MACWHI_A, && case_sem_INSN_MACWHI_A },
 106     { M32RXF_INSN_MACWLO_A, && case_sem_INSN_MACWLO_A },
 107     { M32RXF_INSN_MUL, && case_sem_INSN_MUL },
 108     { M32RXF_INSN_MULHI_A, && case_sem_INSN_MULHI_A },
 109     { M32RXF_INSN_MULLO_A, && case_sem_INSN_MULLO_A },
 110     { M32RXF_INSN_MULWHI_A, && case_sem_INSN_MULWHI_A },
 111     { M32RXF_INSN_MULWLO_A, && case_sem_INSN_MULWLO_A },
 112     { M32RXF_INSN_MV, && case_sem_INSN_MV },
 113     { M32RXF_INSN_MVFACHI_A, && case_sem_INSN_MVFACHI_A },
 114     { M32RXF_INSN_MVFACLO_A, && case_sem_INSN_MVFACLO_A },
 115     { M32RXF_INSN_MVFACMI_A, && case_sem_INSN_MVFACMI_A },
 116     { M32RXF_INSN_MVFC, && case_sem_INSN_MVFC },
 117     { M32RXF_INSN_MVTACHI_A, && case_sem_INSN_MVTACHI_A },
 118     { M32RXF_INSN_MVTACLO_A, && case_sem_INSN_MVTACLO_A },
 119     { M32RXF_INSN_MVTC, && case_sem_INSN_MVTC },
 120     { M32RXF_INSN_NEG, && case_sem_INSN_NEG },
 121     { M32RXF_INSN_NOP, && case_sem_INSN_NOP },
 122     { M32RXF_INSN_NOT, && case_sem_INSN_NOT },
 123     { M32RXF_INSN_RAC_DSI, && case_sem_INSN_RAC_DSI },
 124     { M32RXF_INSN_RACH_DSI, && case_sem_INSN_RACH_DSI },
 125     { M32RXF_INSN_RTE, && case_sem_INSN_RTE },
 126     { M32RXF_INSN_SETH, && case_sem_INSN_SETH },
 127     { M32RXF_INSN_SLL, && case_sem_INSN_SLL },
 128     { M32RXF_INSN_SLL3, && case_sem_INSN_SLL3 },
 129     { M32RXF_INSN_SLLI, && case_sem_INSN_SLLI },
 130     { M32RXF_INSN_SRA, && case_sem_INSN_SRA },
 131     { M32RXF_INSN_SRA3, && case_sem_INSN_SRA3 },
 132     { M32RXF_INSN_SRAI, && case_sem_INSN_SRAI },
 133     { M32RXF_INSN_SRL, && case_sem_INSN_SRL },
 134     { M32RXF_INSN_SRL3, && case_sem_INSN_SRL3 },
 135     { M32RXF_INSN_SRLI, && case_sem_INSN_SRLI },
 136     { M32RXF_INSN_ST, && case_sem_INSN_ST },
 137     { M32RXF_INSN_ST_D, && case_sem_INSN_ST_D },
 138     { M32RXF_INSN_STB, && case_sem_INSN_STB },
 139     { M32RXF_INSN_STB_D, && case_sem_INSN_STB_D },
 140     { M32RXF_INSN_STH, && case_sem_INSN_STH },
 141     { M32RXF_INSN_STH_D, && case_sem_INSN_STH_D },
 142     { M32RXF_INSN_ST_PLUS, && case_sem_INSN_ST_PLUS },
 143     { M32RXF_INSN_STH_PLUS, && case_sem_INSN_STH_PLUS },
 144     { M32RXF_INSN_STB_PLUS, && case_sem_INSN_STB_PLUS },
 145     { M32RXF_INSN_ST_MINUS, && case_sem_INSN_ST_MINUS },
 146     { M32RXF_INSN_SUB, && case_sem_INSN_SUB },
 147     { M32RXF_INSN_SUBV, && case_sem_INSN_SUBV },
 148     { M32RXF_INSN_SUBX, && case_sem_INSN_SUBX },
 149     { M32RXF_INSN_TRAP, && case_sem_INSN_TRAP },
 150     { M32RXF_INSN_UNLOCK, && case_sem_INSN_UNLOCK },
 151     { M32RXF_INSN_SATB, && case_sem_INSN_SATB },
 152     { M32RXF_INSN_SATH, && case_sem_INSN_SATH },
 153     { M32RXF_INSN_SAT, && case_sem_INSN_SAT },
 154     { M32RXF_INSN_PCMPBZ, && case_sem_INSN_PCMPBZ },
 155     { M32RXF_INSN_SADD, && case_sem_INSN_SADD },
 156     { M32RXF_INSN_MACWU1, && case_sem_INSN_MACWU1 },
 157     { M32RXF_INSN_MSBLO, && case_sem_INSN_MSBLO },
 158     { M32RXF_INSN_MULWU1, && case_sem_INSN_MULWU1 },
 159     { M32RXF_INSN_MACLH1, && case_sem_INSN_MACLH1 },
 160     { M32RXF_INSN_SC, && case_sem_INSN_SC },
 161     { M32RXF_INSN_SNC, && case_sem_INSN_SNC },
 162     { M32RXF_INSN_CLRPSW, && case_sem_INSN_CLRPSW },
 163     { M32RXF_INSN_SETPSW, && case_sem_INSN_SETPSW },
 164     { M32RXF_INSN_BSET, && case_sem_INSN_BSET },
 165     { M32RXF_INSN_BCLR, && case_sem_INSN_BCLR },
 166     { M32RXF_INSN_BTST, && case_sem_INSN_BTST },
 167     { M32RXF_INSN_PAR_ADD, && case_sem_INSN_PAR_ADD },
 168     { M32RXF_INSN_WRITE_ADD, && case_sem_INSN_WRITE_ADD },
 169     { M32RXF_INSN_PAR_AND, && case_sem_INSN_PAR_AND },
 170     { M32RXF_INSN_WRITE_AND, && case_sem_INSN_WRITE_AND },
 171     { M32RXF_INSN_PAR_OR, && case_sem_INSN_PAR_OR },
 172     { M32RXF_INSN_WRITE_OR, && case_sem_INSN_WRITE_OR },
 173     { M32RXF_INSN_PAR_XOR, && case_sem_INSN_PAR_XOR },
 174     { M32RXF_INSN_WRITE_XOR, && case_sem_INSN_WRITE_XOR },
 175     { M32RXF_INSN_PAR_ADDI, && case_sem_INSN_PAR_ADDI },
 176     { M32RXF_INSN_WRITE_ADDI, && case_sem_INSN_WRITE_ADDI },
 177     { M32RXF_INSN_PAR_ADDV, && case_sem_INSN_PAR_ADDV },
 178     { M32RXF_INSN_WRITE_ADDV, && case_sem_INSN_WRITE_ADDV },
 179     { M32RXF_INSN_PAR_ADDX, && case_sem_INSN_PAR_ADDX },
 180     { M32RXF_INSN_WRITE_ADDX, && case_sem_INSN_WRITE_ADDX },
 181     { M32RXF_INSN_PAR_BC8, && case_sem_INSN_PAR_BC8 },
 182     { M32RXF_INSN_WRITE_BC8, && case_sem_INSN_WRITE_BC8 },
 183     { M32RXF_INSN_PAR_BL8, && case_sem_INSN_PAR_BL8 },
 184     { M32RXF_INSN_WRITE_BL8, && case_sem_INSN_WRITE_BL8 },
 185     { M32RXF_INSN_PAR_BCL8, && case_sem_INSN_PAR_BCL8 },
 186     { M32RXF_INSN_WRITE_BCL8, && case_sem_INSN_WRITE_BCL8 },
 187     { M32RXF_INSN_PAR_BNC8, && case_sem_INSN_PAR_BNC8 },
 188     { M32RXF_INSN_WRITE_BNC8, && case_sem_INSN_WRITE_BNC8 },
 189     { M32RXF_INSN_PAR_BRA8, && case_sem_INSN_PAR_BRA8 },
 190     { M32RXF_INSN_WRITE_BRA8, && case_sem_INSN_WRITE_BRA8 },
 191     { M32RXF_INSN_PAR_BNCL8, && case_sem_INSN_PAR_BNCL8 },
 192     { M32RXF_INSN_WRITE_BNCL8, && case_sem_INSN_WRITE_BNCL8 },
 193     { M32RXF_INSN_PAR_CMP, && case_sem_INSN_PAR_CMP },
 194     { M32RXF_INSN_WRITE_CMP, && case_sem_INSN_WRITE_CMP },
 195     { M32RXF_INSN_PAR_CMPU, && case_sem_INSN_PAR_CMPU },
 196     { M32RXF_INSN_WRITE_CMPU, && case_sem_INSN_WRITE_CMPU },
 197     { M32RXF_INSN_PAR_CMPEQ, && case_sem_INSN_PAR_CMPEQ },
 198     { M32RXF_INSN_WRITE_CMPEQ, && case_sem_INSN_WRITE_CMPEQ },
 199     { M32RXF_INSN_PAR_CMPZ, && case_sem_INSN_PAR_CMPZ },
 200     { M32RXF_INSN_WRITE_CMPZ, && case_sem_INSN_WRITE_CMPZ },
 201     { M32RXF_INSN_PAR_JC, && case_sem_INSN_PAR_JC },
 202     { M32RXF_INSN_WRITE_JC, && case_sem_INSN_WRITE_JC },
 203     { M32RXF_INSN_PAR_JNC, && case_sem_INSN_PAR_JNC },
 204     { M32RXF_INSN_WRITE_JNC, && case_sem_INSN_WRITE_JNC },
 205     { M32RXF_INSN_PAR_JL, && case_sem_INSN_PAR_JL },
 206     { M32RXF_INSN_WRITE_JL, && case_sem_INSN_WRITE_JL },
 207     { M32RXF_INSN_PAR_JMP, && case_sem_INSN_PAR_JMP },
 208     { M32RXF_INSN_WRITE_JMP, && case_sem_INSN_WRITE_JMP },
 209     { M32RXF_INSN_PAR_LD, && case_sem_INSN_PAR_LD },
 210     { M32RXF_INSN_WRITE_LD, && case_sem_INSN_WRITE_LD },
 211     { M32RXF_INSN_PAR_LDB, && case_sem_INSN_PAR_LDB },
 212     { M32RXF_INSN_WRITE_LDB, && case_sem_INSN_WRITE_LDB },
 213     { M32RXF_INSN_PAR_LDH, && case_sem_INSN_PAR_LDH },
 214     { M32RXF_INSN_WRITE_LDH, && case_sem_INSN_WRITE_LDH },
 215     { M32RXF_INSN_PAR_LDUB, && case_sem_INSN_PAR_LDUB },
 216     { M32RXF_INSN_WRITE_LDUB, && case_sem_INSN_WRITE_LDUB },
 217     { M32RXF_INSN_PAR_LDUH, && case_sem_INSN_PAR_LDUH },
 218     { M32RXF_INSN_WRITE_LDUH, && case_sem_INSN_WRITE_LDUH },
 219     { M32RXF_INSN_PAR_LD_PLUS, && case_sem_INSN_PAR_LD_PLUS },
 220     { M32RXF_INSN_WRITE_LD_PLUS, && case_sem_INSN_WRITE_LD_PLUS },
 221     { M32RXF_INSN_PAR_LDI8, && case_sem_INSN_PAR_LDI8 },
 222     { M32RXF_INSN_WRITE_LDI8, && case_sem_INSN_WRITE_LDI8 },
 223     { M32RXF_INSN_PAR_LOCK, && case_sem_INSN_PAR_LOCK },
 224     { M32RXF_INSN_WRITE_LOCK, && case_sem_INSN_WRITE_LOCK },
 225     { M32RXF_INSN_PAR_MACHI_A, && case_sem_INSN_PAR_MACHI_A },
 226     { M32RXF_INSN_WRITE_MACHI_A, && case_sem_INSN_WRITE_MACHI_A },
 227     { M32RXF_INSN_PAR_MACLO_A, && case_sem_INSN_PAR_MACLO_A },
 228     { M32RXF_INSN_WRITE_MACLO_A, && case_sem_INSN_WRITE_MACLO_A },
 229     { M32RXF_INSN_PAR_MACWHI_A, && case_sem_INSN_PAR_MACWHI_A },
 230     { M32RXF_INSN_WRITE_MACWHI_A, && case_sem_INSN_WRITE_MACWHI_A },
 231     { M32RXF_INSN_PAR_MACWLO_A, && case_sem_INSN_PAR_MACWLO_A },
 232     { M32RXF_INSN_WRITE_MACWLO_A, && case_sem_INSN_WRITE_MACWLO_A },
 233     { M32RXF_INSN_PAR_MUL, && case_sem_INSN_PAR_MUL },
 234     { M32RXF_INSN_WRITE_MUL, && case_sem_INSN_WRITE_MUL },
 235     { M32RXF_INSN_PAR_MULHI_A, && case_sem_INSN_PAR_MULHI_A },
 236     { M32RXF_INSN_WRITE_MULHI_A, && case_sem_INSN_WRITE_MULHI_A },
 237     { M32RXF_INSN_PAR_MULLO_A, && case_sem_INSN_PAR_MULLO_A },
 238     { M32RXF_INSN_WRITE_MULLO_A, && case_sem_INSN_WRITE_MULLO_A },
 239     { M32RXF_INSN_PAR_MULWHI_A, && case_sem_INSN_PAR_MULWHI_A },
 240     { M32RXF_INSN_WRITE_MULWHI_A, && case_sem_INSN_WRITE_MULWHI_A },
 241     { M32RXF_INSN_PAR_MULWLO_A, && case_sem_INSN_PAR_MULWLO_A },
 242     { M32RXF_INSN_WRITE_MULWLO_A, && case_sem_INSN_WRITE_MULWLO_A },
 243     { M32RXF_INSN_PAR_MV, && case_sem_INSN_PAR_MV },
 244     { M32RXF_INSN_WRITE_MV, && case_sem_INSN_WRITE_MV },
 245     { M32RXF_INSN_PAR_MVFACHI_A, && case_sem_INSN_PAR_MVFACHI_A },
 246     { M32RXF_INSN_WRITE_MVFACHI_A, && case_sem_INSN_WRITE_MVFACHI_A },
 247     { M32RXF_INSN_PAR_MVFACLO_A, && case_sem_INSN_PAR_MVFACLO_A },
 248     { M32RXF_INSN_WRITE_MVFACLO_A, && case_sem_INSN_WRITE_MVFACLO_A },
 249     { M32RXF_INSN_PAR_MVFACMI_A, && case_sem_INSN_PAR_MVFACMI_A },
 250     { M32RXF_INSN_WRITE_MVFACMI_A, && case_sem_INSN_WRITE_MVFACMI_A },
 251     { M32RXF_INSN_PAR_MVFC, && case_sem_INSN_PAR_MVFC },
 252     { M32RXF_INSN_WRITE_MVFC, && case_sem_INSN_WRITE_MVFC },
 253     { M32RXF_INSN_PAR_MVTACHI_A, && case_sem_INSN_PAR_MVTACHI_A },
 254     { M32RXF_INSN_WRITE_MVTACHI_A, && case_sem_INSN_WRITE_MVTACHI_A },
 255     { M32RXF_INSN_PAR_MVTACLO_A, && case_sem_INSN_PAR_MVTACLO_A },
 256     { M32RXF_INSN_WRITE_MVTACLO_A, && case_sem_INSN_WRITE_MVTACLO_A },
 257     { M32RXF_INSN_PAR_MVTC, && case_sem_INSN_PAR_MVTC },
 258     { M32RXF_INSN_WRITE_MVTC, && case_sem_INSN_WRITE_MVTC },
 259     { M32RXF_INSN_PAR_NEG, && case_sem_INSN_PAR_NEG },
 260     { M32RXF_INSN_WRITE_NEG, && case_sem_INSN_WRITE_NEG },
 261     { M32RXF_INSN_PAR_NOP, && case_sem_INSN_PAR_NOP },
 262     { M32RXF_INSN_WRITE_NOP, && case_sem_INSN_WRITE_NOP },
 263     { M32RXF_INSN_PAR_NOT, && case_sem_INSN_PAR_NOT },
 264     { M32RXF_INSN_WRITE_NOT, && case_sem_INSN_WRITE_NOT },
 265     { M32RXF_INSN_PAR_RAC_DSI, && case_sem_INSN_PAR_RAC_DSI },
 266     { M32RXF_INSN_WRITE_RAC_DSI, && case_sem_INSN_WRITE_RAC_DSI },
 267     { M32RXF_INSN_PAR_RACH_DSI, && case_sem_INSN_PAR_RACH_DSI },
 268     { M32RXF_INSN_WRITE_RACH_DSI, && case_sem_INSN_WRITE_RACH_DSI },
 269     { M32RXF_INSN_PAR_RTE, && case_sem_INSN_PAR_RTE },
 270     { M32RXF_INSN_WRITE_RTE, && case_sem_INSN_WRITE_RTE },
 271     { M32RXF_INSN_PAR_SLL, && case_sem_INSN_PAR_SLL },
 272     { M32RXF_INSN_WRITE_SLL, && case_sem_INSN_WRITE_SLL },
 273     { M32RXF_INSN_PAR_SLLI, && case_sem_INSN_PAR_SLLI },
 274     { M32RXF_INSN_WRITE_SLLI, && case_sem_INSN_WRITE_SLLI },
 275     { M32RXF_INSN_PAR_SRA, && case_sem_INSN_PAR_SRA },
 276     { M32RXF_INSN_WRITE_SRA, && case_sem_INSN_WRITE_SRA },
 277     { M32RXF_INSN_PAR_SRAI, && case_sem_INSN_PAR_SRAI },
 278     { M32RXF_INSN_WRITE_SRAI, && case_sem_INSN_WRITE_SRAI },
 279     { M32RXF_INSN_PAR_SRL, && case_sem_INSN_PAR_SRL },
 280     { M32RXF_INSN_WRITE_SRL, && case_sem_INSN_WRITE_SRL },
 281     { M32RXF_INSN_PAR_SRLI, && case_sem_INSN_PAR_SRLI },
 282     { M32RXF_INSN_WRITE_SRLI, && case_sem_INSN_WRITE_SRLI },
 283     { M32RXF_INSN_PAR_ST, && case_sem_INSN_PAR_ST },
 284     { M32RXF_INSN_WRITE_ST, && case_sem_INSN_WRITE_ST },
 285     { M32RXF_INSN_PAR_STB, && case_sem_INSN_PAR_STB },
 286     { M32RXF_INSN_WRITE_STB, && case_sem_INSN_WRITE_STB },
 287     { M32RXF_INSN_PAR_STH, && case_sem_INSN_PAR_STH },
 288     { M32RXF_INSN_WRITE_STH, && case_sem_INSN_WRITE_STH },
 289     { M32RXF_INSN_PAR_ST_PLUS, && case_sem_INSN_PAR_ST_PLUS },
 290     { M32RXF_INSN_WRITE_ST_PLUS, && case_sem_INSN_WRITE_ST_PLUS },
 291     { M32RXF_INSN_PAR_STH_PLUS, && case_sem_INSN_PAR_STH_PLUS },
 292     { M32RXF_INSN_WRITE_STH_PLUS, && case_sem_INSN_WRITE_STH_PLUS },
 293     { M32RXF_INSN_PAR_STB_PLUS, && case_sem_INSN_PAR_STB_PLUS },
 294     { M32RXF_INSN_WRITE_STB_PLUS, && case_sem_INSN_WRITE_STB_PLUS },
 295     { M32RXF_INSN_PAR_ST_MINUS, && case_sem_INSN_PAR_ST_MINUS },
 296     { M32RXF_INSN_WRITE_ST_MINUS, && case_sem_INSN_WRITE_ST_MINUS },
 297     { M32RXF_INSN_PAR_SUB, && case_sem_INSN_PAR_SUB },
 298     { M32RXF_INSN_WRITE_SUB, && case_sem_INSN_WRITE_SUB },
 299     { M32RXF_INSN_PAR_SUBV, && case_sem_INSN_PAR_SUBV },
 300     { M32RXF_INSN_WRITE_SUBV, && case_sem_INSN_WRITE_SUBV },
 301     { M32RXF_INSN_PAR_SUBX, && case_sem_INSN_PAR_SUBX },
 302     { M32RXF_INSN_WRITE_SUBX, && case_sem_INSN_WRITE_SUBX },
 303     { M32RXF_INSN_PAR_TRAP, && case_sem_INSN_PAR_TRAP },
 304     { M32RXF_INSN_WRITE_TRAP, && case_sem_INSN_WRITE_TRAP },
 305     { M32RXF_INSN_PAR_UNLOCK, && case_sem_INSN_PAR_UNLOCK },
 306     { M32RXF_INSN_WRITE_UNLOCK, && case_sem_INSN_WRITE_UNLOCK },
 307     { M32RXF_INSN_PAR_PCMPBZ, && case_sem_INSN_PAR_PCMPBZ },
 308     { M32RXF_INSN_WRITE_PCMPBZ, && case_sem_INSN_WRITE_PCMPBZ },
 309     { M32RXF_INSN_PAR_SADD, && case_sem_INSN_PAR_SADD },
 310     { M32RXF_INSN_WRITE_SADD, && case_sem_INSN_WRITE_SADD },
 311     { M32RXF_INSN_PAR_MACWU1, && case_sem_INSN_PAR_MACWU1 },
 312     { M32RXF_INSN_WRITE_MACWU1, && case_sem_INSN_WRITE_MACWU1 },
 313     { M32RXF_INSN_PAR_MSBLO, && case_sem_INSN_PAR_MSBLO },
 314     { M32RXF_INSN_WRITE_MSBLO, && case_sem_INSN_WRITE_MSBLO },
 315     { M32RXF_INSN_PAR_MULWU1, && case_sem_INSN_PAR_MULWU1 },
 316     { M32RXF_INSN_WRITE_MULWU1, && case_sem_INSN_WRITE_MULWU1 },
 317     { M32RXF_INSN_PAR_MACLH1, && case_sem_INSN_PAR_MACLH1 },
 318     { M32RXF_INSN_WRITE_MACLH1, && case_sem_INSN_WRITE_MACLH1 },
 319     { M32RXF_INSN_PAR_SC, && case_sem_INSN_PAR_SC },
 320     { M32RXF_INSN_WRITE_SC, && case_sem_INSN_WRITE_SC },
 321     { M32RXF_INSN_PAR_SNC, && case_sem_INSN_PAR_SNC },
 322     { M32RXF_INSN_WRITE_SNC, && case_sem_INSN_WRITE_SNC },
 323     { M32RXF_INSN_PAR_CLRPSW, && case_sem_INSN_PAR_CLRPSW },
 324     { M32RXF_INSN_WRITE_CLRPSW, && case_sem_INSN_WRITE_CLRPSW },
 325     { M32RXF_INSN_PAR_SETPSW, && case_sem_INSN_PAR_SETPSW },
 326     { M32RXF_INSN_WRITE_SETPSW, && case_sem_INSN_WRITE_SETPSW },
 327     { M32RXF_INSN_PAR_BTST, && case_sem_INSN_PAR_BTST },
 328     { M32RXF_INSN_WRITE_BTST, && case_sem_INSN_WRITE_BTST },
 329     { 0, 0 }
 330   };
 331   int i;
 332
 333   for (i = 0; labels[i].label != 0; ++i)
 334     {
 335 #if FAST_P
 336       CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label;
 337 #else
 338       CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label;
 339 #endif
 340     }
 341
 342 #undef DEFINE_LABELS
 343 #endif /* DEFINE_LABELS */
 344
 345 #ifdef DEFINE_SWITCH
 346
 347 /* If hyper-fast [well not unnecessarily slow] execution is selected, turn
 348    off frills like tracing and profiling.  */
 349 /* FIXME: A better way would be to have TRACE_RESULT check for something
 350    that can cause it to be optimized out.  Another way would be to emit
 351    special handlers into the instruction "stream".  */
 352
 353 #if FAST_P
 354 #undef TRACE_RESULT
 355 #define TRACE_RESULT(cpu, abuf, name, type, val)
 356 #endif
 357
 358 #undef GET_ATTR
 359 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 360 #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
 361 #else
 362 #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_/**/attr)
 363 #endif
 364
 365 {
 366
 367 #if WITH_SCACHE_PBB
 368
 369 /* Branch to next handler without going around main loop.  */
 370 #define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case
 371 SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 372
 373 #else /* ! WITH_SCACHE_PBB */
 374
 375 #define NEXT(vpc) BREAK (sem)
 376 #ifdef __GNUC__
 377 #if FAST_P
 378   SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab)
 379 #else
 380   SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab)
 381 #endif
 382 #else
 383   SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num)
 384 #endif
 385
 386 #endif /* ! WITH_SCACHE_PBB */
 387
 388     {
 389
 390   CASE (sem, INSN_X_INVALID) : /* --invalid-- */
 391 {
 392   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 393   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 394 #define FLD(f) abuf->fields.fmt_empty.f
 395   int UNUSED written = 0;
 396   IADDR UNUSED pc = abuf->addr;
 397   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 398
 399   {
 400     /* Update the recorded pc in the cpu state struct.
 401        Only necessary for WITH_SCACHE case, but to avoid the
 402        conditional compilation ....  */
 403     SET_H_PC (pc);
 404     /* Virtual insns have zero size.  Overwrite vpc with address of next insn
 405        using the default-insn-bitsize spec.  When executing insns in parallel
 406        we may want to queue the fault and continue execution.  */
 407     vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 408     vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
 409   }
 410
 411 #undef FLD
 412 }
 413   NEXT (vpc);
 414
 415   CASE (sem, INSN_X_AFTER) : /* --after-- */
 416 {
 417   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 418   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 419 #define FLD(f) abuf->fields.fmt_empty.f
 420   int UNUSED written = 0;
 421   IADDR UNUSED pc = abuf->addr;
 422   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 423
 424   {
 425 #if WITH_SCACHE_PBB_M32RXF
 426     m32rxf_pbb_after (current_cpu, sem_arg);
 427 #endif
 428   }
 429
 430 #undef FLD
 431 }
 432   NEXT (vpc);
 433
 434   CASE (sem, INSN_X_BEFORE) : /* --before-- */
 435 {
 436   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 437   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 438 #define FLD(f) abuf->fields.fmt_empty.f
 439   int UNUSED written = 0;
 440   IADDR UNUSED pc = abuf->addr;
 441   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 442
 443   {
 444 #if WITH_SCACHE_PBB_M32RXF
 445     m32rxf_pbb_before (current_cpu, sem_arg);
 446 #endif
 447   }
 448
 449 #undef FLD
 450 }
 451   NEXT (vpc);
 452
 453   CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */
 454 {
 455   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 456   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 457 #define FLD(f) abuf->fields.fmt_empty.f
 458   int UNUSED written = 0;
 459   IADDR UNUSED pc = abuf->addr;
 460   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 461
 462   {
 463 #if WITH_SCACHE_PBB_M32RXF
 464 #ifdef DEFINE_SWITCH
 465     vpc = m32rxf_pbb_cti_chain (current_cpu, sem_arg,
 466                                pbb_br_type, pbb_br_npc);
 467     BREAK (sem);
 468 #else
 469     /* FIXME: Allow provision of explicit ifmt spec in insn spec.  */
 470     vpc = m32rxf_pbb_cti_chain (current_cpu, sem_arg,
 471                                CPU_PBB_BR_TYPE (current_cpu),
 472                                CPU_PBB_BR_NPC (current_cpu));
 473 #endif
 474 #endif
 475   }
 476
 477 #undef FLD
 478 }
 479   NEXT (vpc);
 480
 481   CASE (sem, INSN_X_CHAIN) : /* --chain-- */
 482 {
 483   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 484   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 485 #define FLD(f) abuf->fields.fmt_empty.f
 486   int UNUSED written = 0;
 487   IADDR UNUSED pc = abuf->addr;
 488   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 489
 490   {
 491 #if WITH_SCACHE_PBB_M32RXF
 492     vpc = m32rxf_pbb_chain (current_cpu, sem_arg);
 493 #ifdef DEFINE_SWITCH
 494     BREAK (sem);
 495 #endif
 496 #endif
 497   }
 498
 499 #undef FLD
 500 }
 501   NEXT (vpc);
 502
 503   CASE (sem, INSN_X_BEGIN) : /* --begin-- */
 504 {
 505   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 506   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 507 #define FLD(f) abuf->fields.fmt_empty.f
 508   int UNUSED written = 0;
 509   IADDR UNUSED pc = abuf->addr;
 510   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 511
 512   {
 513 #if WITH_SCACHE_PBB_M32RXF
 514 #if defined DEFINE_SWITCH || defined FAST_P
 515     /* In the switch case FAST_P is a constant, allowing several optimizations
 516        in any called inline functions.  */
 517     vpc = m32rxf_pbb_begin (current_cpu, FAST_P);
 518 #else
 519 #if 0 /* cgen engine can't handle dynamic fast/full switching yet.  */
 520     vpc = m32rxf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
 521 #else
 522     vpc = m32rxf_pbb_begin (current_cpu, 0);
 523 #endif
 524 #endif
 525 #endif
 526   }
 527
 528 #undef FLD
 529 }
 530   NEXT (vpc);
 531
 532   CASE (sem, INSN_ADD) : /* add $dr,$sr */
 533 {
 534   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 535   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 536 #define FLD(f) abuf->fields.sfmt_add.f
 537   int UNUSED written = 0;
 538   IADDR UNUSED pc = abuf->addr;
 539   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 540
 541   {
 542     SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr));
 543     * FLD (i_dr) = opval;
 544     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 545   }
 546
 547 #undef FLD
 548 }
 549   NEXT (vpc);
 550
 551   CASE (sem, INSN_ADD3) : /* add3 $dr,$sr,$hash$slo16 */
 552 {
 553   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 554   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 555 #define FLD(f) abuf->fields.sfmt_add3.f
 556   int UNUSED written = 0;
 557   IADDR UNUSED pc = abuf->addr;
 558   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 559
 560   {
 561     SI opval = ADDSI (* FLD (i_sr), FLD (f_simm16));
 562     * FLD (i_dr) = opval;
 563     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 564   }
 565
 566 #undef FLD
 567 }
 568   NEXT (vpc);
 569
 570   CASE (sem, INSN_AND) : /* and $dr,$sr */
 571 {
 572   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 573   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 574 #define FLD(f) abuf->fields.sfmt_add.f
 575   int UNUSED written = 0;
 576   IADDR UNUSED pc = abuf->addr;
 577   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 578
 579   {
 580     SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr));
 581     * FLD (i_dr) = opval;
 582     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 583   }
 584
 585 #undef FLD
 586 }
 587   NEXT (vpc);
 588
 589   CASE (sem, INSN_AND3) : /* and3 $dr,$sr,$uimm16 */
 590 {
 591   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 592   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 593 #define FLD(f) abuf->fields.sfmt_and3.f
 594   int UNUSED written = 0;
 595   IADDR UNUSED pc = abuf->addr;
 596   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 597
 598   {
 599     SI opval = ANDSI (* FLD (i_sr), FLD (f_uimm16));
 600     * FLD (i_dr) = opval;
 601     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 602   }
 603
 604 #undef FLD
 605 }
 606   NEXT (vpc);
 607
 608   CASE (sem, INSN_OR) : /* or $dr,$sr */
 609 {
 610   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 611   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 612 #define FLD(f) abuf->fields.sfmt_add.f
 613   int UNUSED written = 0;
 614   IADDR UNUSED pc = abuf->addr;
 615   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 616
 617   {
 618     SI opval = ORSI (* FLD (i_dr), * FLD (i_sr));
 619     * FLD (i_dr) = opval;
 620     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 621   }
 622
 623 #undef FLD
 624 }
 625   NEXT (vpc);
 626
 627   CASE (sem, INSN_OR3) : /* or3 $dr,$sr,$hash$ulo16 */
 628 {
 629   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 630   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 631 #define FLD(f) abuf->fields.sfmt_and3.f
 632   int UNUSED written = 0;
 633   IADDR UNUSED pc = abuf->addr;
 634   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 635
 636   {
 637     SI opval = ORSI (* FLD (i_sr), FLD (f_uimm16));
 638     * FLD (i_dr) = opval;
 639     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 640   }
 641
 642 #undef FLD
 643 }
 644   NEXT (vpc);
 645
 646   CASE (sem, INSN_XOR) : /* xor $dr,$sr */
 647 {
 648   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 649   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 650 #define FLD(f) abuf->fields.sfmt_add.f
 651   int UNUSED written = 0;
 652   IADDR UNUSED pc = abuf->addr;
 653   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 654
 655   {
 656     SI opval = XORSI (* FLD (i_dr), * FLD (i_sr));
 657     * FLD (i_dr) = opval;
 658     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 659   }
 660
 661 #undef FLD
 662 }
 663   NEXT (vpc);
 664
 665   CASE (sem, INSN_XOR3) : /* xor3 $dr,$sr,$uimm16 */
 666 {
 667   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 668   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 669 #define FLD(f) abuf->fields.sfmt_and3.f
 670   int UNUSED written = 0;
 671   IADDR UNUSED pc = abuf->addr;
 672   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 673
 674   {
 675     SI opval = XORSI (* FLD (i_sr), FLD (f_uimm16));
 676     * FLD (i_dr) = opval;
 677     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 678   }
 679
 680 #undef FLD
 681 }
 682   NEXT (vpc);
 683
 684   CASE (sem, INSN_ADDI) : /* addi $dr,$simm8 */
 685 {
 686   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 687   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 688 #define FLD(f) abuf->fields.sfmt_addi.f
 689   int UNUSED written = 0;
 690   IADDR UNUSED pc = abuf->addr;
 691   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 692
 693   {
 694     SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8));
 695     * FLD (i_dr) = opval;
 696     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 697   }
 698
 699 #undef FLD
 700 }
 701   NEXT (vpc);
 702
 703   CASE (sem, INSN_ADDV) : /* addv $dr,$sr */
 704 {
 705   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 706   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 707 #define FLD(f) abuf->fields.sfmt_add.f
 708   int UNUSED written = 0;
 709   IADDR UNUSED pc = abuf->addr;
 710   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 711
 712 {
 713   SI temp0;BI temp1;
 714   temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr));
 715   temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0);
 716   {
 717     SI opval = temp0;
 718     * FLD (i_dr) = opval;
 719     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 720   }
 721   {
 722     BI opval = temp1;
 723     CPU (h_cond) = opval;
 724     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
 725   }
 726 }
 727
 728 #undef FLD
 729 }
 730   NEXT (vpc);
 731
 732   CASE (sem, INSN_ADDV3) : /* addv3 $dr,$sr,$simm16 */
 733 {
 734   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 735   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 736 #define FLD(f) abuf->fields.sfmt_add3.f
 737   int UNUSED written = 0;
 738   IADDR UNUSED pc = abuf->addr;
 739   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 740
 741 {
 742   SI temp0;BI temp1;
 743   temp0 = ADDSI (* FLD (i_sr), FLD (f_simm16));
 744   temp1 = ADDOFSI (* FLD (i_sr), FLD (f_simm16), 0);
 745   {
 746     SI opval = temp0;
 747     * FLD (i_dr) = opval;
 748     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 749   }
 750   {
 751     BI opval = temp1;
 752     CPU (h_cond) = opval;
 753     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
 754   }
 755 }
 756
 757 #undef FLD
 758 }
 759   NEXT (vpc);
 760
 761   CASE (sem, INSN_ADDX) : /* addx $dr,$sr */
 762 {
 763   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 764   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 765 #define FLD(f) abuf->fields.sfmt_add.f
 766   int UNUSED written = 0;
 767   IADDR UNUSED pc = abuf->addr;
 768   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 769
 770 {
 771   SI temp0;BI temp1;
 772   temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
 773   temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
 774   {
 775     SI opval = temp0;
 776     * FLD (i_dr) = opval;
 777     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 778   }
 779   {
 780     BI opval = temp1;
 781     CPU (h_cond) = opval;
 782     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
 783   }
 784 }
 785
 786 #undef FLD
 787 }
 788   NEXT (vpc);
 789
 790   CASE (sem, INSN_BC8) : /* bc.s $disp8 */
 791 {
 792   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 793   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 794 #define FLD(f) abuf->fields.sfmt_bl8.f
 795   int UNUSED written = 0;
 796   IADDR UNUSED pc = abuf->addr;
 797   SEM_BRANCH_INIT
 798   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 799
 800 if (CPU (h_cond)) {
 801   {
 802     USI opval = FLD (i_disp8);
 803     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 804     written |= (1 << 2);
 805     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 806   }
 807 }
 808
 809   abuf->written = written;
 810   SEM_BRANCH_FINI (vpc);
 811 #undef FLD
 812 }
 813   NEXT (vpc);
 814
 815   CASE (sem, INSN_BC24) : /* bc.l $disp24 */
 816 {
 817   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 818   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 819 #define FLD(f) abuf->fields.sfmt_bl24.f
 820   int UNUSED written = 0;
 821   IADDR UNUSED pc = abuf->addr;
 822   SEM_BRANCH_INIT
 823   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 824
 825 if (CPU (h_cond)) {
 826   {
 827     USI opval = FLD (i_disp24);
 828     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 829     written |= (1 << 2);
 830     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 831   }
 832 }
 833
 834   abuf->written = written;
 835   SEM_BRANCH_FINI (vpc);
 836 #undef FLD
 837 }
 838   NEXT (vpc);
 839
 840   CASE (sem, INSN_BEQ) : /* beq $src1,$src2,$disp16 */
 841 {
 842   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 843   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 844 #define FLD(f) abuf->fields.sfmt_beq.f
 845   int UNUSED written = 0;
 846   IADDR UNUSED pc = abuf->addr;
 847   SEM_BRANCH_INIT
 848   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 849
 850 if (EQSI (* FLD (i_src1), * FLD (i_src2))) {
 851   {
 852     USI opval = FLD (i_disp16);
 853     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 854     written |= (1 << 3);
 855     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 856   }
 857 }
 858
 859   abuf->written = written;
 860   SEM_BRANCH_FINI (vpc);
 861 #undef FLD
 862 }
 863   NEXT (vpc);
 864
 865   CASE (sem, INSN_BEQZ) : /* beqz $src2,$disp16 */
 866 {
 867   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 868   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 869 #define FLD(f) abuf->fields.sfmt_beq.f
 870   int UNUSED written = 0;
 871   IADDR UNUSED pc = abuf->addr;
 872   SEM_BRANCH_INIT
 873   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 874
 875 if (EQSI (* FLD (i_src2), 0)) {
 876   {
 877     USI opval = FLD (i_disp16);
 878     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 879     written |= (1 << 2);
 880     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 881   }
 882 }
 883
 884   abuf->written = written;
 885   SEM_BRANCH_FINI (vpc);
 886 #undef FLD
 887 }
 888   NEXT (vpc);
 889
 890   CASE (sem, INSN_BGEZ) : /* bgez $src2,$disp16 */
 891 {
 892   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 893   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 894 #define FLD(f) abuf->fields.sfmt_beq.f
 895   int UNUSED written = 0;
 896   IADDR UNUSED pc = abuf->addr;
 897   SEM_BRANCH_INIT
 898   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 899
 900 if (GESI (* FLD (i_src2), 0)) {
 901   {
 902     USI opval = FLD (i_disp16);
 903     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 904     written |= (1 << 2);
 905     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 906   }
 907 }
 908
 909   abuf->written = written;
 910   SEM_BRANCH_FINI (vpc);
 911 #undef FLD
 912 }
 913   NEXT (vpc);
 914
 915   CASE (sem, INSN_BGTZ) : /* bgtz $src2,$disp16 */
 916 {
 917   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 918   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 919 #define FLD(f) abuf->fields.sfmt_beq.f
 920   int UNUSED written = 0;
 921   IADDR UNUSED pc = abuf->addr;
 922   SEM_BRANCH_INIT
 923   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 924
 925 if (GTSI (* FLD (i_src2), 0)) {
 926   {
 927     USI opval = FLD (i_disp16);
 928     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 929     written |= (1 << 2);
 930     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 931   }
 932 }
 933
 934   abuf->written = written;
 935   SEM_BRANCH_FINI (vpc);
 936 #undef FLD
 937 }
 938   NEXT (vpc);
 939
 940   CASE (sem, INSN_BLEZ) : /* blez $src2,$disp16 */
 941 {
 942   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 943   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 944 #define FLD(f) abuf->fields.sfmt_beq.f
 945   int UNUSED written = 0;
 946   IADDR UNUSED pc = abuf->addr;
 947   SEM_BRANCH_INIT
 948   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 949
 950 if (LESI (* FLD (i_src2), 0)) {
 951   {
 952     USI opval = FLD (i_disp16);
 953     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 954     written |= (1 << 2);
 955     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 956   }
 957 }
 958
 959   abuf->written = written;
 960   SEM_BRANCH_FINI (vpc);
 961 #undef FLD
 962 }
 963   NEXT (vpc);
 964
 965   CASE (sem, INSN_BLTZ) : /* bltz $src2,$disp16 */
 966 {
 967   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 968   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 969 #define FLD(f) abuf->fields.sfmt_beq.f
 970   int UNUSED written = 0;
 971   IADDR UNUSED pc = abuf->addr;
 972   SEM_BRANCH_INIT
 973   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 974
 975 if (LTSI (* FLD (i_src2), 0)) {
 976   {
 977     USI opval = FLD (i_disp16);
 978     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 979     written |= (1 << 2);
 980     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 981   }
 982 }
 983
 984   abuf->written = written;
 985   SEM_BRANCH_FINI (vpc);
 986 #undef FLD
 987 }
 988   NEXT (vpc);
 989
 990   CASE (sem, INSN_BNEZ) : /* bnez $src2,$disp16 */
 991 {
 992   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 993   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 994 #define FLD(f) abuf->fields.sfmt_beq.f
 995   int UNUSED written = 0;
 996   IADDR UNUSED pc = abuf->addr;
 997   SEM_BRANCH_INIT
 998   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 999
1000 if (NESI (* FLD (i_src2), 0)) {
1001   {
1002     USI opval = FLD (i_disp16);
1003     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1004     written |= (1 << 2);
1005     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1006   }
1007 }
1008
1009   abuf->written = written;
1010   SEM_BRANCH_FINI (vpc);
1011 #undef FLD
1012 }
1013   NEXT (vpc);
1014
1015   CASE (sem, INSN_BL8) : /* bl.s $disp8 */
1016 {
1017   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1018   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1019 #define FLD(f) abuf->fields.sfmt_bl8.f
1020   int UNUSED written = 0;
1021   IADDR UNUSED pc = abuf->addr;
1022   SEM_BRANCH_INIT
1023   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1024
1025 {
1026   {
1027     SI opval = ADDSI (ANDSI (pc, -4), 4);
1028     CPU (h_gr[((UINT) 14)]) = opval;
1029     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1030   }
1031   {
1032     USI opval = FLD (i_disp8);
1033     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1034     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1035   }
1036 }
1037
1038   SEM_BRANCH_FINI (vpc);
1039 #undef FLD
1040 }
1041   NEXT (vpc);
1042
1043   CASE (sem, INSN_BL24) : /* bl.l $disp24 */
1044 {
1045   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1046   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1047 #define FLD(f) abuf->fields.sfmt_bl24.f
1048   int UNUSED written = 0;
1049   IADDR UNUSED pc = abuf->addr;
1050   SEM_BRANCH_INIT
1051   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1052
1053 {
1054   {
1055     SI opval = ADDSI (pc, 4);
1056     CPU (h_gr[((UINT) 14)]) = opval;
1057     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1058   }
1059   {
1060     USI opval = FLD (i_disp24);
1061     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1062     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1063   }
1064 }
1065
1066   SEM_BRANCH_FINI (vpc);
1067 #undef FLD
1068 }
1069   NEXT (vpc);
1070
1071   CASE (sem, INSN_BCL8) : /* bcl.s $disp8 */
1072 {
1073   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1074   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1075 #define FLD(f) abuf->fields.sfmt_bl8.f
1076   int UNUSED written = 0;
1077   IADDR UNUSED pc = abuf->addr;
1078   SEM_BRANCH_INIT
1079   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1080
1081 if (CPU (h_cond)) {
1082 {
1083   {
1084     SI opval = ADDSI (ANDSI (pc, -4), 4);
1085     CPU (h_gr[((UINT) 14)]) = opval;
1086     written |= (1 << 3);
1087     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1088   }
1089   {
1090     USI opval = FLD (i_disp8);
1091     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1092     written |= (1 << 4);
1093     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1094   }
1095 }
1096 }
1097
1098   abuf->written = written;
1099   SEM_BRANCH_FINI (vpc);
1100 #undef FLD
1101 }
1102   NEXT (vpc);
1103
1104   CASE (sem, INSN_BCL24) : /* bcl.l $disp24 */
1105 {
1106   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1107   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1108 #define FLD(f) abuf->fields.sfmt_bl24.f
1109   int UNUSED written = 0;
1110   IADDR UNUSED pc = abuf->addr;
1111   SEM_BRANCH_INIT
1112   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1113
1114 if (CPU (h_cond)) {
1115 {
1116   {
1117     SI opval = ADDSI (pc, 4);
1118     CPU (h_gr[((UINT) 14)]) = opval;
1119     written |= (1 << 3);
1120     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1121   }
1122   {
1123     USI opval = FLD (i_disp24);
1124     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1125     written |= (1 << 4);
1126     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1127   }
1128 }
1129 }
1130
1131   abuf->written = written;
1132   SEM_BRANCH_FINI (vpc);
1133 #undef FLD
1134 }
1135   NEXT (vpc);
1136
1137   CASE (sem, INSN_BNC8) : /* bnc.s $disp8 */
1138 {
1139   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1140   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1141 #define FLD(f) abuf->fields.sfmt_bl8.f
1142   int UNUSED written = 0;
1143   IADDR UNUSED pc = abuf->addr;
1144   SEM_BRANCH_INIT
1145   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1146
1147 if (NOTBI (CPU (h_cond))) {
1148   {
1149     USI opval = FLD (i_disp8);
1150     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1151     written |= (1 << 2);
1152     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1153   }
1154 }
1155
1156   abuf->written = written;
1157   SEM_BRANCH_FINI (vpc);
1158 #undef FLD
1159 }
1160   NEXT (vpc);
1161
1162   CASE (sem, INSN_BNC24) : /* bnc.l $disp24 */
1163 {
1164   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1165   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1166 #define FLD(f) abuf->fields.sfmt_bl24.f
1167   int UNUSED written = 0;
1168   IADDR UNUSED pc = abuf->addr;
1169   SEM_BRANCH_INIT
1170   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1171
1172 if (NOTBI (CPU (h_cond))) {
1173   {
1174     USI opval = FLD (i_disp24);
1175     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1176     written |= (1 << 2);
1177     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1178   }
1179 }
1180
1181   abuf->written = written;
1182   SEM_BRANCH_FINI (vpc);
1183 #undef FLD
1184 }
1185   NEXT (vpc);
1186
1187   CASE (sem, INSN_BNE) : /* bne $src1,$src2,$disp16 */
1188 {
1189   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1190   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1191 #define FLD(f) abuf->fields.sfmt_beq.f
1192   int UNUSED written = 0;
1193   IADDR UNUSED pc = abuf->addr;
1194   SEM_BRANCH_INIT
1195   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1196
1197 if (NESI (* FLD (i_src1), * FLD (i_src2))) {
1198   {
1199     USI opval = FLD (i_disp16);
1200     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1201     written |= (1 << 3);
1202     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1203   }
1204 }
1205
1206   abuf->written = written;
1207   SEM_BRANCH_FINI (vpc);
1208 #undef FLD
1209 }
1210   NEXT (vpc);
1211
1212   CASE (sem, INSN_BRA8) : /* bra.s $disp8 */
1213 {
1214   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1215   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1216 #define FLD(f) abuf->fields.sfmt_bl8.f
1217   int UNUSED written = 0;
1218   IADDR UNUSED pc = abuf->addr;
1219   SEM_BRANCH_INIT
1220   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1221
1222   {
1223     USI opval = FLD (i_disp8);
1224     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1225     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1226   }
1227
1228   SEM_BRANCH_FINI (vpc);
1229 #undef FLD
1230 }
1231   NEXT (vpc);
1232
1233   CASE (sem, INSN_BRA24) : /* bra.l $disp24 */
1234 {
1235   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1236   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1237 #define FLD(f) abuf->fields.sfmt_bl24.f
1238   int UNUSED written = 0;
1239   IADDR UNUSED pc = abuf->addr;
1240   SEM_BRANCH_INIT
1241   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1242
1243   {
1244     USI opval = FLD (i_disp24);
1245     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1246     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1247   }
1248
1249   SEM_BRANCH_FINI (vpc);
1250 #undef FLD
1251 }
1252   NEXT (vpc);
1253
1254   CASE (sem, INSN_BNCL8) : /* bncl.s $disp8 */
1255 {
1256   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1257   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1258 #define FLD(f) abuf->fields.sfmt_bl8.f
1259   int UNUSED written = 0;
1260   IADDR UNUSED pc = abuf->addr;
1261   SEM_BRANCH_INIT
1262   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1263
1264 if (NOTBI (CPU (h_cond))) {
1265 {
1266   {
1267     SI opval = ADDSI (ANDSI (pc, -4), 4);
1268     CPU (h_gr[((UINT) 14)]) = opval;
1269     written |= (1 << 3);
1270     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1271   }
1272   {
1273     USI opval = FLD (i_disp8);
1274     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1275     written |= (1 << 4);
1276     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1277   }
1278 }
1279 }
1280
1281   abuf->written = written;
1282   SEM_BRANCH_FINI (vpc);
1283 #undef FLD
1284 }
1285   NEXT (vpc);
1286
1287   CASE (sem, INSN_BNCL24) : /* bncl.l $disp24 */
1288 {
1289   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1290   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1291 #define FLD(f) abuf->fields.sfmt_bl24.f
1292   int UNUSED written = 0;
1293   IADDR UNUSED pc = abuf->addr;
1294   SEM_BRANCH_INIT
1295   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1296
1297 if (NOTBI (CPU (h_cond))) {
1298 {
1299   {
1300     SI opval = ADDSI (pc, 4);
1301     CPU (h_gr[((UINT) 14)]) = opval;
1302     written |= (1 << 3);
1303     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1304   }
1305   {
1306     USI opval = FLD (i_disp24);
1307     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1308     written |= (1 << 4);
1309     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1310   }
1311 }
1312 }
1313
1314   abuf->written = written;
1315   SEM_BRANCH_FINI (vpc);
1316 #undef FLD
1317 }
1318   NEXT (vpc);
1319
1320   CASE (sem, INSN_CMP) : /* cmp $src1,$src2 */
1321 {
1322   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1323   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1324 #define FLD(f) abuf->fields.sfmt_st_plus.f
1325   int UNUSED written = 0;
1326   IADDR UNUSED pc = abuf->addr;
1327   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1328
1329   {
1330     BI opval = LTSI (* FLD (i_src1), * FLD (i_src2));
1331     CPU (h_cond) = opval;
1332     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1333   }
1334
1335 #undef FLD
1336 }
1337   NEXT (vpc);
1338
1339   CASE (sem, INSN_CMPI) : /* cmpi $src2,$simm16 */
1340 {
1341   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1342   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1343 #define FLD(f) abuf->fields.sfmt_st_d.f
1344   int UNUSED written = 0;
1345   IADDR UNUSED pc = abuf->addr;
1346   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1347
1348   {
1349     BI opval = LTSI (* FLD (i_src2), FLD (f_simm16));
1350     CPU (h_cond) = opval;
1351     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1352   }
1353
1354 #undef FLD
1355 }
1356   NEXT (vpc);
1357
1358   CASE (sem, INSN_CMPU) : /* cmpu $src1,$src2 */
1359 {
1360   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1361   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1362 #define FLD(f) abuf->fields.sfmt_st_plus.f
1363   int UNUSED written = 0;
1364   IADDR UNUSED pc = abuf->addr;
1365   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1366
1367   {
1368     BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2));
1369     CPU (h_cond) = opval;
1370     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1371   }
1372
1373 #undef FLD
1374 }
1375   NEXT (vpc);
1376
1377   CASE (sem, INSN_CMPUI) : /* cmpui $src2,$simm16 */
1378 {
1379   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1380   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1381 #define FLD(f) abuf->fields.sfmt_st_d.f
1382   int UNUSED written = 0;
1383   IADDR UNUSED pc = abuf->addr;
1384   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1385
1386   {
1387     BI opval = LTUSI (* FLD (i_src2), FLD (f_simm16));
1388     CPU (h_cond) = opval;
1389     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1390   }
1391
1392 #undef FLD
1393 }
1394   NEXT (vpc);
1395
1396   CASE (sem, INSN_CMPEQ) : /* cmpeq $src1,$src2 */
1397 {
1398   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1399   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1400 #define FLD(f) abuf->fields.sfmt_st_plus.f
1401   int UNUSED written = 0;
1402   IADDR UNUSED pc = abuf->addr;
1403   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1404
1405   {
1406     BI opval = EQSI (* FLD (i_src1), * FLD (i_src2));
1407     CPU (h_cond) = opval;
1408     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1409   }
1410
1411 #undef FLD
1412 }
1413   NEXT (vpc);
1414
1415   CASE (sem, INSN_CMPZ) : /* cmpz $src2 */
1416 {
1417   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1418   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1419 #define FLD(f) abuf->fields.sfmt_st_plus.f
1420   int UNUSED written = 0;
1421   IADDR UNUSED pc = abuf->addr;
1422   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1423
1424   {
1425     BI opval = EQSI (* FLD (i_src2), 0);
1426     CPU (h_cond) = opval;
1427     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1428   }
1429
1430 #undef FLD
1431 }
1432   NEXT (vpc);
1433
1434   CASE (sem, INSN_DIV) : /* div $dr,$sr */
1435 {
1436   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1437   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1438 #define FLD(f) abuf->fields.sfmt_add.f
1439   int UNUSED written = 0;
1440   IADDR UNUSED pc = abuf->addr;
1441   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1442
1443 if (NESI (* FLD (i_sr), 0)) {
1444   {
1445     SI opval = DIVSI (* FLD (i_dr), * FLD (i_sr));
1446     * FLD (i_dr) = opval;
1447     written |= (1 << 2);
1448     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1449   }
1450 }
1451
1452   abuf->written = written;
1453 #undef FLD
1454 }
1455   NEXT (vpc);
1456
1457   CASE (sem, INSN_DIVU) : /* divu $dr,$sr */
1458 {
1459   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1460   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1461 #define FLD(f) abuf->fields.sfmt_add.f
1462   int UNUSED written = 0;
1463   IADDR UNUSED pc = abuf->addr;
1464   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1465
1466 if (NESI (* FLD (i_sr), 0)) {
1467   {
1468     SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr));
1469     * FLD (i_dr) = opval;
1470     written |= (1 << 2);
1471     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1472   }
1473 }
1474
1475   abuf->written = written;
1476 #undef FLD
1477 }
1478   NEXT (vpc);
1479
1480   CASE (sem, INSN_REM) : /* rem $dr,$sr */
1481 {
1482   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1483   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1484 #define FLD(f) abuf->fields.sfmt_add.f
1485   int UNUSED written = 0;
1486   IADDR UNUSED pc = abuf->addr;
1487   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1488
1489 if (NESI (* FLD (i_sr), 0)) {
1490   {
1491     SI opval = MODSI (* FLD (i_dr), * FLD (i_sr));
1492     * FLD (i_dr) = opval;
1493     written |= (1 << 2);
1494     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1495   }
1496 }
1497
1498   abuf->written = written;
1499 #undef FLD
1500 }
1501   NEXT (vpc);
1502
1503   CASE (sem, INSN_REMU) : /* remu $dr,$sr */
1504 {
1505   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1506   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1507 #define FLD(f) abuf->fields.sfmt_add.f
1508   int UNUSED written = 0;
1509   IADDR UNUSED pc = abuf->addr;
1510   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1511
1512 if (NESI (* FLD (i_sr), 0)) {
1513   {
1514     SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr));
1515     * FLD (i_dr) = opval;
1516     written |= (1 << 2);
1517     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1518   }
1519 }
1520
1521   abuf->written = written;
1522 #undef FLD
1523 }
1524   NEXT (vpc);
1525
1526   CASE (sem, INSN_DIVH) : /* divh $dr,$sr */
1527 {
1528   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1529   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1530 #define FLD(f) abuf->fields.sfmt_add.f
1531   int UNUSED written = 0;
1532   IADDR UNUSED pc = abuf->addr;
1533   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1534
1535 if (NESI (* FLD (i_sr), 0)) {
1536   {
1537     SI opval = DIVSI (EXTHISI (TRUNCSIHI (* FLD (i_dr))), * FLD (i_sr));
1538     * FLD (i_dr) = opval;
1539     written |= (1 << 2);
1540     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1541   }
1542 }
1543
1544   abuf->written = written;
1545 #undef FLD
1546 }
1547   NEXT (vpc);
1548
1549   CASE (sem, INSN_JC) : /* jc $sr */
1550 {
1551   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1552   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1553 #define FLD(f) abuf->fields.sfmt_jl.f
1554   int UNUSED written = 0;
1555   IADDR UNUSED pc = abuf->addr;
1556   SEM_BRANCH_INIT
1557   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1558
1559 if (CPU (h_cond)) {
1560   {
1561     USI opval = ANDSI (* FLD (i_sr), -4);
1562     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1563     written |= (1 << 2);
1564     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1565   }
1566 }
1567
1568   abuf->written = written;
1569   SEM_BRANCH_FINI (vpc);
1570 #undef FLD
1571 }
1572   NEXT (vpc);
1573
1574   CASE (sem, INSN_JNC) : /* jnc $sr */
1575 {
1576   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1577   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1578 #define FLD(f) abuf->fields.sfmt_jl.f
1579   int UNUSED written = 0;
1580   IADDR UNUSED pc = abuf->addr;
1581   SEM_BRANCH_INIT
1582   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1583
1584 if (NOTBI (CPU (h_cond))) {
1585   {
1586     USI opval = ANDSI (* FLD (i_sr), -4);
1587     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1588     written |= (1 << 2);
1589     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1590   }
1591 }
1592
1593   abuf->written = written;
1594   SEM_BRANCH_FINI (vpc);
1595 #undef FLD
1596 }
1597   NEXT (vpc);
1598
1599   CASE (sem, INSN_JL) : /* jl $sr */
1600 {
1601   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1602   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1603 #define FLD(f) abuf->fields.sfmt_jl.f
1604   int UNUSED written = 0;
1605   IADDR UNUSED pc = abuf->addr;
1606   SEM_BRANCH_INIT
1607   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1608
1609 {
1610   SI temp0;USI temp1;
1611   temp0 = ADDSI (ANDSI (pc, -4), 4);
1612   temp1 = ANDSI (* FLD (i_sr), -4);
1613   {
1614     SI opval = temp0;
1615     CPU (h_gr[((UINT) 14)]) = opval;
1616     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1617   }
1618   {
1619     USI opval = temp1;
1620     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1621     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1622   }
1623 }
1624
1625   SEM_BRANCH_FINI (vpc);
1626 #undef FLD
1627 }
1628   NEXT (vpc);
1629
1630   CASE (sem, INSN_JMP) : /* jmp $sr */
1631 {
1632   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1633   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1634 #define FLD(f) abuf->fields.sfmt_jl.f
1635   int UNUSED written = 0;
1636   IADDR UNUSED pc = abuf->addr;
1637   SEM_BRANCH_INIT
1638   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1639
1640   {
1641     USI opval = ANDSI (* FLD (i_sr), -4);
1642     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1643     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1644   }
1645
1646   SEM_BRANCH_FINI (vpc);
1647 #undef FLD
1648 }
1649   NEXT (vpc);
1650
1651   CASE (sem, INSN_LD) : /* ld $dr,@$sr */
1652 {
1653   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1654   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1655 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1656   int UNUSED written = 0;
1657   IADDR UNUSED pc = abuf->addr;
1658   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1659
1660   {
1661     SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1662     * FLD (i_dr) = opval;
1663     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1664   }
1665
1666 #undef FLD
1667 }
1668   NEXT (vpc);
1669
1670   CASE (sem, INSN_LD_D) : /* ld $dr,@($slo16,$sr) */
1671 {
1672   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1673   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1674 #define FLD(f) abuf->fields.sfmt_add3.f
1675   int UNUSED written = 0;
1676   IADDR UNUSED pc = abuf->addr;
1677   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1678
1679   {
1680     SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)));
1681     * FLD (i_dr) = opval;
1682     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1683   }
1684
1685 #undef FLD
1686 }
1687   NEXT (vpc);
1688
1689   CASE (sem, INSN_LDB) : /* ldb $dr,@$sr */
1690 {
1691   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1692   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1693 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1694   int UNUSED written = 0;
1695   IADDR UNUSED pc = abuf->addr;
1696   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1697
1698   {
1699     SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
1700     * FLD (i_dr) = opval;
1701     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1702   }
1703
1704 #undef FLD
1705 }
1706   NEXT (vpc);
1707
1708   CASE (sem, INSN_LDB_D) : /* ldb $dr,@($slo16,$sr) */
1709 {
1710   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1711   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1712 #define FLD(f) abuf->fields.sfmt_add3.f
1713   int UNUSED written = 0;
1714   IADDR UNUSED pc = abuf->addr;
1715   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1716
1717   {
1718     SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1719     * FLD (i_dr) = opval;
1720     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1721   }
1722
1723 #undef FLD
1724 }
1725   NEXT (vpc);
1726
1727   CASE (sem, INSN_LDH) : /* ldh $dr,@$sr */
1728 {
1729   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1730   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1731 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1732   int UNUSED written = 0;
1733   IADDR UNUSED pc = abuf->addr;
1734   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1735
1736   {
1737     SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
1738     * FLD (i_dr) = opval;
1739     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1740   }
1741
1742 #undef FLD
1743 }
1744   NEXT (vpc);
1745
1746   CASE (sem, INSN_LDH_D) : /* ldh $dr,@($slo16,$sr) */
1747 {
1748   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1749   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1750 #define FLD(f) abuf->fields.sfmt_add3.f
1751   int UNUSED written = 0;
1752   IADDR UNUSED pc = abuf->addr;
1753   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1754
1755   {
1756     SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1757     * FLD (i_dr) = opval;
1758     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1759   }
1760
1761 #undef FLD
1762 }
1763   NEXT (vpc);
1764
1765   CASE (sem, INSN_LDUB) : /* ldub $dr,@$sr */
1766 {
1767   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1768   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1769 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1770   int UNUSED written = 0;
1771   IADDR UNUSED pc = abuf->addr;
1772   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1773
1774   {
1775     SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
1776     * FLD (i_dr) = opval;
1777     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1778   }
1779
1780 #undef FLD
1781 }
1782   NEXT (vpc);
1783
1784   CASE (sem, INSN_LDUB_D) : /* ldub $dr,@($slo16,$sr) */
1785 {
1786   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1787   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1788 #define FLD(f) abuf->fields.sfmt_add3.f
1789   int UNUSED written = 0;
1790   IADDR UNUSED pc = abuf->addr;
1791   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1792
1793   {
1794     SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1795     * FLD (i_dr) = opval;
1796     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1797   }
1798
1799 #undef FLD
1800 }
1801   NEXT (vpc);
1802
1803   CASE (sem, INSN_LDUH) : /* lduh $dr,@$sr */
1804 {
1805   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1806   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1807 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1808   int UNUSED written = 0;
1809   IADDR UNUSED pc = abuf->addr;
1810   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1811
1812   {
1813     SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
1814     * FLD (i_dr) = opval;
1815     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1816   }
1817
1818 #undef FLD
1819 }
1820   NEXT (vpc);
1821
1822   CASE (sem, INSN_LDUH_D) : /* lduh $dr,@($slo16,$sr) */
1823 {
1824   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1825   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1826 #define FLD(f) abuf->fields.sfmt_add3.f
1827   int UNUSED written = 0;
1828   IADDR UNUSED pc = abuf->addr;
1829   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1830
1831   {
1832     SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1833     * FLD (i_dr) = opval;
1834     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1835   }
1836
1837 #undef FLD
1838 }
1839   NEXT (vpc);
1840
1841   CASE (sem, INSN_LD_PLUS) : /* ld $dr,@$sr+ */
1842 {
1843   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1844   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1845 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1846   int UNUSED written = 0;
1847   IADDR UNUSED pc = abuf->addr;
1848   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1849
1850 {
1851   SI temp0;SI temp1;
1852   temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1853   temp1 = ADDSI (* FLD (i_sr), 4);
1854   {
1855     SI opval = temp0;
1856     * FLD (i_dr) = opval;
1857     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1858   }
1859   {
1860     SI opval = temp1;
1861     * FLD (i_sr) = opval;
1862     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1863   }
1864 }
1865
1866 #undef FLD
1867 }
1868   NEXT (vpc);
1869
1870   CASE (sem, INSN_LD24) : /* ld24 $dr,$uimm24 */
1871 {
1872   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1873   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1874 #define FLD(f) abuf->fields.sfmt_ld24.f
1875   int UNUSED written = 0;
1876   IADDR UNUSED pc = abuf->addr;
1877   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1878
1879   {
1880     SI opval = FLD (i_uimm24);
1881     * FLD (i_dr) = opval;
1882     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1883   }
1884
1885 #undef FLD
1886 }
1887   NEXT (vpc);
1888
1889   CASE (sem, INSN_LDI8) : /* ldi8 $dr,$simm8 */
1890 {
1891   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1892   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1893 #define FLD(f) abuf->fields.sfmt_addi.f
1894   int UNUSED written = 0;
1895   IADDR UNUSED pc = abuf->addr;
1896   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1897
1898   {
1899     SI opval = FLD (f_simm8);
1900     * FLD (i_dr) = opval;
1901     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1902   }
1903
1904 #undef FLD
1905 }
1906   NEXT (vpc);
1907
1908   CASE (sem, INSN_LDI16) : /* ldi16 $dr,$hash$slo16 */
1909 {
1910   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1911   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1912 #define FLD(f) abuf->fields.sfmt_add3.f
1913   int UNUSED written = 0;
1914   IADDR UNUSED pc = abuf->addr;
1915   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1916
1917   {
1918     SI opval = FLD (f_simm16);
1919     * FLD (i_dr) = opval;
1920     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1921   }
1922
1923 #undef FLD
1924 }
1925   NEXT (vpc);
1926
1927   CASE (sem, INSN_LOCK) : /* lock $dr,@$sr */
1928 {
1929   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1930   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1931 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1932   int UNUSED written = 0;
1933   IADDR UNUSED pc = abuf->addr;
1934   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1935
1936 {
1937   {
1938     BI opval = 1;
1939     CPU (h_lock) = opval;
1940     TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
1941   }
1942   {
1943     SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1944     * FLD (i_dr) = opval;
1945     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1946   }
1947 }
1948
1949 #undef FLD
1950 }
1951   NEXT (vpc);
1952
1953   CASE (sem, INSN_MACHI_A) : /* machi $src1,$src2,$acc */
1954 {
1955   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1956   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1957 #define FLD(f) abuf->fields.sfmt_machi_a.f
1958   int UNUSED written = 0;
1959   IADDR UNUSED pc = abuf->addr;
1960   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1961
1962   {
1963     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
1964     SET_H_ACCUMS (FLD (f_acc), opval);
1965     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
1966   }
1967
1968 #undef FLD
1969 }
1970   NEXT (vpc);
1971
1972   CASE (sem, INSN_MACLO_A) : /* maclo $src1,$src2,$acc */
1973 {
1974   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1975   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1976 #define FLD(f) abuf->fields.sfmt_machi_a.f
1977   int UNUSED written = 0;
1978   IADDR UNUSED pc = abuf->addr;
1979   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1980
1981   {
1982     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
1983     SET_H_ACCUMS (FLD (f_acc), opval);
1984     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
1985   }
1986
1987 #undef FLD
1988 }
1989   NEXT (vpc);
1990
1991   CASE (sem, INSN_MACWHI_A) : /* macwhi $src1,$src2,$acc */
1992 {
1993   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1994   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1995 #define FLD(f) abuf->fields.sfmt_machi_a.f
1996   int UNUSED written = 0;
1997   IADDR UNUSED pc = abuf->addr;
1998   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1999
2000   {
2001     DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))));
2002     SET_H_ACCUMS (FLD (f_acc), opval);
2003     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2004   }
2005
2006 #undef FLD
2007 }
2008   NEXT (vpc);
2009
2010   CASE (sem, INSN_MACWLO_A) : /* macwlo $src1,$src2,$acc */
2011 {
2012   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2013   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2014 #define FLD(f) abuf->fields.sfmt_machi_a.f
2015   int UNUSED written = 0;
2016   IADDR UNUSED pc = abuf->addr;
2017   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2018
2019   {
2020     DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))));
2021     SET_H_ACCUMS (FLD (f_acc), opval);
2022     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2023   }
2024
2025 #undef FLD
2026 }
2027   NEXT (vpc);
2028
2029   CASE (sem, INSN_MUL) : /* mul $dr,$sr */
2030 {
2031   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2032   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2033 #define FLD(f) abuf->fields.sfmt_add.f
2034   int UNUSED written = 0;
2035   IADDR UNUSED pc = abuf->addr;
2036   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2037
2038   {
2039     SI opval = MULSI (* FLD (i_dr), * FLD (i_sr));
2040     * FLD (i_dr) = opval;
2041     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2042   }
2043
2044 #undef FLD
2045 }
2046   NEXT (vpc);
2047
2048   CASE (sem, INSN_MULHI_A) : /* mulhi $src1,$src2,$acc */
2049 {
2050   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2051   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2052 #define FLD(f) abuf->fields.sfmt_machi_a.f
2053   int UNUSED written = 0;
2054   IADDR UNUSED pc = abuf->addr;
2055   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2056
2057   {
2058     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16);
2059     SET_H_ACCUMS (FLD (f_acc), opval);
2060     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2061   }
2062
2063 #undef FLD
2064 }
2065   NEXT (vpc);
2066
2067   CASE (sem, INSN_MULLO_A) : /* mullo $src1,$src2,$acc */
2068 {
2069   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2070   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2071 #define FLD(f) abuf->fields.sfmt_machi_a.f
2072   int UNUSED written = 0;
2073   IADDR UNUSED pc = abuf->addr;
2074   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2075
2076   {
2077     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16);
2078     SET_H_ACCUMS (FLD (f_acc), opval);
2079     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2080   }
2081
2082 #undef FLD
2083 }
2084   NEXT (vpc);
2085
2086   CASE (sem, INSN_MULWHI_A) : /* mulwhi $src1,$src2,$acc */
2087 {
2088   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2089   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2090 #define FLD(f) abuf->fields.sfmt_machi_a.f
2091   int UNUSED written = 0;
2092   IADDR UNUSED pc = abuf->addr;
2093   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2094
2095   {
2096     DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))));
2097     SET_H_ACCUMS (FLD (f_acc), opval);
2098     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2099   }
2100
2101 #undef FLD
2102 }
2103   NEXT (vpc);
2104
2105   CASE (sem, INSN_MULWLO_A) : /* mulwlo $src1,$src2,$acc */
2106 {
2107   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2108   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2109 #define FLD(f) abuf->fields.sfmt_machi_a.f
2110   int UNUSED written = 0;
2111   IADDR UNUSED pc = abuf->addr;
2112   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2113
2114   {
2115     DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))));
2116     SET_H_ACCUMS (FLD (f_acc), opval);
2117     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2118   }
2119
2120 #undef FLD
2121 }
2122   NEXT (vpc);
2123
2124   CASE (sem, INSN_MV) : /* mv $dr,$sr */
2125 {
2126   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2127   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2128 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2129   int UNUSED written = 0;
2130   IADDR UNUSED pc = abuf->addr;
2131   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2132
2133   {
2134     SI opval = * FLD (i_sr);
2135     * FLD (i_dr) = opval;
2136     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2137   }
2138
2139 #undef FLD
2140 }
2141   NEXT (vpc);
2142
2143   CASE (sem, INSN_MVFACHI_A) : /* mvfachi $dr,$accs */
2144 {
2145   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2146   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2147 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
2148   int UNUSED written = 0;
2149   IADDR UNUSED pc = abuf->addr;
2150   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2151
2152   {
2153     SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 32));
2154     * FLD (i_dr) = opval;
2155     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2156   }
2157
2158 #undef FLD
2159 }
2160   NEXT (vpc);
2161
2162   CASE (sem, INSN_MVFACLO_A) : /* mvfaclo $dr,$accs */
2163 {
2164   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2165   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2166 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
2167   int UNUSED written = 0;
2168   IADDR UNUSED pc = abuf->addr;
2169   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2170
2171   {
2172     SI opval = TRUNCDISI (GET_H_ACCUMS (FLD (f_accs)));
2173     * FLD (i_dr) = opval;
2174     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2175   }
2176
2177 #undef FLD
2178 }
2179   NEXT (vpc);
2180
2181   CASE (sem, INSN_MVFACMI_A) : /* mvfacmi $dr,$accs */
2182 {
2183   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2184   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2185 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
2186   int UNUSED written = 0;
2187   IADDR UNUSED pc = abuf->addr;
2188   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2189
2190   {
2191     SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 16));
2192     * FLD (i_dr) = opval;
2193     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2194   }
2195
2196 #undef FLD
2197 }
2198   NEXT (vpc);
2199
2200   CASE (sem, INSN_MVFC) : /* mvfc $dr,$scr */
2201 {
2202   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2203   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2204 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2205   int UNUSED written = 0;
2206   IADDR UNUSED pc = abuf->addr;
2207   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2208
2209   {
2210     SI opval = GET_H_CR (FLD (f_r2));
2211     * FLD (i_dr) = opval;
2212     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2213   }
2214
2215 #undef FLD
2216 }
2217   NEXT (vpc);
2218
2219   CASE (sem, INSN_MVTACHI_A) : /* mvtachi $src1,$accs */
2220 {
2221   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2222   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2223 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
2224   int UNUSED written = 0;
2225   IADDR UNUSED pc = abuf->addr;
2226   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2227
2228   {
2229     DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32));
2230     SET_H_ACCUMS (FLD (f_accs), opval);
2231     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2232   }
2233
2234 #undef FLD
2235 }
2236   NEXT (vpc);
2237
2238   CASE (sem, INSN_MVTACLO_A) : /* mvtaclo $src1,$accs */
2239 {
2240   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2241   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2242 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
2243   int UNUSED written = 0;
2244   IADDR UNUSED pc = abuf->addr;
2245   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2246
2247   {
2248     DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1)));
2249     SET_H_ACCUMS (FLD (f_accs), opval);
2250     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2251   }
2252
2253 #undef FLD
2254 }
2255   NEXT (vpc);
2256
2257   CASE (sem, INSN_MVTC) : /* mvtc $sr,$dcr */
2258 {
2259   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2260   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2261 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2262   int UNUSED written = 0;
2263   IADDR UNUSED pc = abuf->addr;
2264   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2265
2266   {
2267     USI opval = * FLD (i_sr);
2268     SET_H_CR (FLD (f_r1), opval);
2269     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
2270   }
2271
2272 #undef FLD
2273 }
2274   NEXT (vpc);
2275
2276   CASE (sem, INSN_NEG) : /* neg $dr,$sr */
2277 {
2278   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2279   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2280 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2281   int UNUSED written = 0;
2282   IADDR UNUSED pc = abuf->addr;
2283   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2284
2285   {
2286     SI opval = NEGSI (* FLD (i_sr));
2287     * FLD (i_dr) = opval;
2288     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2289   }
2290
2291 #undef FLD
2292 }
2293   NEXT (vpc);
2294
2295   CASE (sem, INSN_NOP) : /* nop */
2296 {
2297   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2298   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2299 #define FLD(f) abuf->fields.fmt_empty.f
2300   int UNUSED written = 0;
2301   IADDR UNUSED pc = abuf->addr;
2302   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2303
2304 PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
2305
2306 #undef FLD
2307 }
2308   NEXT (vpc);
2309
2310   CASE (sem, INSN_NOT) : /* not $dr,$sr */
2311 {
2312   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2313   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2314 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2315   int UNUSED written = 0;
2316   IADDR UNUSED pc = abuf->addr;
2317   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2318
2319   {
2320     SI opval = INVSI (* FLD (i_sr));
2321     * FLD (i_dr) = opval;
2322     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2323   }
2324
2325 #undef FLD
2326 }
2327   NEXT (vpc);
2328
2329   CASE (sem, INSN_RAC_DSI) : /* rac $accd,$accs,$imm1 */
2330 {
2331   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2332   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2333 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
2334   int UNUSED written = 0;
2335   IADDR UNUSED pc = abuf->addr;
2336   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2337
2338 {
2339   DI tmp_tmp1;
2340   tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
2341   tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
2342   {
2343     DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000)));
2344     SET_H_ACCUMS (FLD (f_accd), opval);
2345     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2346   }
2347 }
2348
2349 #undef FLD
2350 }
2351   NEXT (vpc);
2352
2353   CASE (sem, INSN_RACH_DSI) : /* rach $accd,$accs,$imm1 */
2354 {
2355   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2356   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2357 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
2358   int UNUSED written = 0;
2359   IADDR UNUSED pc = abuf->addr;
2360   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2361
2362 {
2363   DI tmp_tmp1;
2364   tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
2365   tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000));
2366   {
2367     DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0)));
2368     SET_H_ACCUMS (FLD (f_accd), opval);
2369     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2370   }
2371 }
2372
2373 #undef FLD
2374 }
2375   NEXT (vpc);
2376
2377   CASE (sem, INSN_RTE) : /* rte */
2378 {
2379   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2380   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2381 #define FLD(f) abuf->fields.fmt_empty.f
2382   int UNUSED written = 0;
2383   IADDR UNUSED pc = abuf->addr;
2384   SEM_BRANCH_INIT
2385   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2386
2387 {
2388   {
2389     USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4);
2390     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
2391     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
2392   }
2393   {
2394     USI opval = GET_H_CR (((UINT) 14));
2395     SET_H_CR (((UINT) 6), opval);
2396     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
2397   }
2398   {
2399     UQI opval = CPU (h_bpsw);
2400     SET_H_PSW (opval);
2401     TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
2402   }
2403   {
2404     UQI opval = CPU (h_bbpsw);
2405     CPU (h_bpsw) = opval;
2406     TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
2407   }
2408 }
2409
2410   SEM_BRANCH_FINI (vpc);
2411 #undef FLD
2412 }
2413   NEXT (vpc);
2414
2415   CASE (sem, INSN_SETH) : /* seth $dr,$hash$hi16 */
2416 {
2417   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2418   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2419 #define FLD(f) abuf->fields.sfmt_seth.f
2420   int UNUSED written = 0;
2421   IADDR UNUSED pc = abuf->addr;
2422   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2423
2424   {
2425     SI opval = SLLSI (FLD (f_hi16), 16);
2426     * FLD (i_dr) = opval;
2427     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2428   }
2429
2430 #undef FLD
2431 }
2432   NEXT (vpc);
2433
2434   CASE (sem, INSN_SLL) : /* sll $dr,$sr */
2435 {
2436   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2437   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2438 #define FLD(f) abuf->fields.sfmt_add.f
2439   int UNUSED written = 0;
2440   IADDR UNUSED pc = abuf->addr;
2441   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2442
2443   {
2444     SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2445     * FLD (i_dr) = opval;
2446     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2447   }
2448
2449 #undef FLD
2450 }
2451   NEXT (vpc);
2452
2453   CASE (sem, INSN_SLL3) : /* sll3 $dr,$sr,$simm16 */
2454 {
2455   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2456   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2457 #define FLD(f) abuf->fields.sfmt_add3.f
2458   int UNUSED written = 0;
2459   IADDR UNUSED pc = abuf->addr;
2460   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2461
2462   {
2463     SI opval = SLLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2464     * FLD (i_dr) = opval;
2465     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2466   }
2467
2468 #undef FLD
2469 }
2470   NEXT (vpc);
2471
2472   CASE (sem, INSN_SLLI) : /* slli $dr,$uimm5 */
2473 {
2474   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2475   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2476 #define FLD(f) abuf->fields.sfmt_slli.f
2477   int UNUSED written = 0;
2478   IADDR UNUSED pc = abuf->addr;
2479   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2480
2481   {
2482     SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5));
2483     * FLD (i_dr) = opval;
2484     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2485   }
2486
2487 #undef FLD
2488 }
2489   NEXT (vpc);
2490
2491   CASE (sem, INSN_SRA) : /* sra $dr,$sr */
2492 {
2493   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2494   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2495 #define FLD(f) abuf->fields.sfmt_add.f
2496   int UNUSED written = 0;
2497   IADDR UNUSED pc = abuf->addr;
2498   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2499
2500   {
2501     SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2502     * FLD (i_dr) = opval;
2503     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2504   }
2505
2506 #undef FLD
2507 }
2508   NEXT (vpc);
2509
2510   CASE (sem, INSN_SRA3) : /* sra3 $dr,$sr,$simm16 */
2511 {
2512   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2513   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2514 #define FLD(f) abuf->fields.sfmt_add3.f
2515   int UNUSED written = 0;
2516   IADDR UNUSED pc = abuf->addr;
2517   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2518
2519   {
2520     SI opval = SRASI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2521     * FLD (i_dr) = opval;
2522     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2523   }
2524
2525 #undef FLD
2526 }
2527   NEXT (vpc);
2528
2529   CASE (sem, INSN_SRAI) : /* srai $dr,$uimm5 */
2530 {
2531   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2532   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2533 #define FLD(f) abuf->fields.sfmt_slli.f
2534   int UNUSED written = 0;
2535   IADDR UNUSED pc = abuf->addr;
2536   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2537
2538   {
2539     SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5));
2540     * FLD (i_dr) = opval;
2541     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2542   }
2543
2544 #undef FLD
2545 }
2546   NEXT (vpc);
2547
2548   CASE (sem, INSN_SRL) : /* srl $dr,$sr */
2549 {
2550   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2551   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2552 #define FLD(f) abuf->fields.sfmt_add.f
2553   int UNUSED written = 0;
2554   IADDR UNUSED pc = abuf->addr;
2555   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2556
2557   {
2558     SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2559     * FLD (i_dr) = opval;
2560     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2561   }
2562
2563 #undef FLD
2564 }
2565   NEXT (vpc);
2566
2567   CASE (sem, INSN_SRL3) : /* srl3 $dr,$sr,$simm16 */
2568 {
2569   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2570   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2571 #define FLD(f) abuf->fields.sfmt_add3.f
2572   int UNUSED written = 0;
2573   IADDR UNUSED pc = abuf->addr;
2574   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2575
2576   {
2577     SI opval = SRLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2578     * FLD (i_dr) = opval;
2579     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2580   }
2581
2582 #undef FLD
2583 }
2584   NEXT (vpc);
2585
2586   CASE (sem, INSN_SRLI) : /* srli $dr,$uimm5 */
2587 {
2588   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2589   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2590 #define FLD(f) abuf->fields.sfmt_slli.f
2591   int UNUSED written = 0;
2592   IADDR UNUSED pc = abuf->addr;
2593   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2594
2595   {
2596     SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5));
2597     * FLD (i_dr) = opval;
2598     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2599   }
2600
2601 #undef FLD
2602 }
2603   NEXT (vpc);
2604
2605   CASE (sem, INSN_ST) : /* st $src1,@$src2 */
2606 {
2607   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2608   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2609 #define FLD(f) abuf->fields.sfmt_st_plus.f
2610   int UNUSED written = 0;
2611   IADDR UNUSED pc = abuf->addr;
2612   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2613
2614   {
2615     SI opval = * FLD (i_src1);
2616     SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
2617     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2618   }
2619
2620 #undef FLD
2621 }
2622   NEXT (vpc);
2623
2624   CASE (sem, INSN_ST_D) : /* st $src1,@($slo16,$src2) */
2625 {
2626   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2627   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2628 #define FLD(f) abuf->fields.sfmt_st_d.f
2629   int UNUSED written = 0;
2630   IADDR UNUSED pc = abuf->addr;
2631   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2632
2633   {
2634     SI opval = * FLD (i_src1);
2635     SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2636     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2637   }
2638
2639 #undef FLD
2640 }
2641   NEXT (vpc);
2642
2643   CASE (sem, INSN_STB) : /* stb $src1,@$src2 */
2644 {
2645   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2646   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2647 #define FLD(f) abuf->fields.sfmt_st_plus.f
2648   int UNUSED written = 0;
2649   IADDR UNUSED pc = abuf->addr;
2650   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2651
2652   {
2653     QI opval = * FLD (i_src1);
2654     SETMEMQI (current_cpu, pc, * FLD (i_src2), opval);
2655     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2656   }
2657
2658 #undef FLD
2659 }
2660   NEXT (vpc);
2661
2662   CASE (sem, INSN_STB_D) : /* stb $src1,@($slo16,$src2) */
2663 {
2664   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2665   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2666 #define FLD(f) abuf->fields.sfmt_st_d.f
2667   int UNUSED written = 0;
2668   IADDR UNUSED pc = abuf->addr;
2669   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2670
2671   {
2672     QI opval = * FLD (i_src1);
2673     SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2674     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2675   }
2676
2677 #undef FLD
2678 }
2679   NEXT (vpc);
2680
2681   CASE (sem, INSN_STH) : /* sth $src1,@$src2 */
2682 {
2683   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2684   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2685 #define FLD(f) abuf->fields.sfmt_st_plus.f
2686   int UNUSED written = 0;
2687   IADDR UNUSED pc = abuf->addr;
2688   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2689
2690   {
2691     HI opval = * FLD (i_src1);
2692     SETMEMHI (current_cpu, pc, * FLD (i_src2), opval);
2693     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2694   }
2695
2696 #undef FLD
2697 }
2698   NEXT (vpc);
2699
2700   CASE (sem, INSN_STH_D) : /* sth $src1,@($slo16,$src2) */
2701 {
2702   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2703   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2704 #define FLD(f) abuf->fields.sfmt_st_d.f
2705   int UNUSED written = 0;
2706   IADDR UNUSED pc = abuf->addr;
2707   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2708
2709   {
2710     HI opval = * FLD (i_src1);
2711     SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2712     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2713   }
2714
2715 #undef FLD
2716 }
2717   NEXT (vpc);
2718
2719   CASE (sem, INSN_ST_PLUS) : /* st $src1,@+$src2 */
2720 {
2721   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2722   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2723 #define FLD(f) abuf->fields.sfmt_st_plus.f
2724   int UNUSED written = 0;
2725   IADDR UNUSED pc = abuf->addr;
2726   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2727
2728 {
2729   SI tmp_new_src2;
2730   tmp_new_src2 = ADDSI (* FLD (i_src2), 4);
2731   {
2732     SI opval = * FLD (i_src1);
2733     SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
2734     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2735   }
2736   {
2737     SI opval = tmp_new_src2;
2738     * FLD (i_src2) = opval;
2739     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2740   }
2741 }
2742
2743 #undef FLD
2744 }
2745   NEXT (vpc);
2746
2747   CASE (sem, INSN_STH_PLUS) : /* sth $src1,@$src2+ */
2748 {
2749   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2750   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2751 #define FLD(f) abuf->fields.sfmt_st_plus.f
2752   int UNUSED written = 0;
2753   IADDR UNUSED pc = abuf->addr;
2754   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2755
2756 {
2757   SI tmp_new_src2;
2758   tmp_new_src2 = * FLD (i_src2);
2759   {
2760     HI opval = * FLD (i_src1);
2761     SETMEMHI (current_cpu, pc, tmp_new_src2, opval);
2762     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2763   }
2764   {
2765     SI opval = ADDSI (tmp_new_src2, 2);
2766     * FLD (i_src2) = opval;
2767     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2768   }
2769 }
2770
2771 #undef FLD
2772 }
2773   NEXT (vpc);
2774
2775   CASE (sem, INSN_STB_PLUS) : /* stb $src1,@$src2+ */
2776 {
2777   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2778   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2779 #define FLD(f) abuf->fields.sfmt_st_plus.f
2780   int UNUSED written = 0;
2781   IADDR UNUSED pc = abuf->addr;
2782   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2783
2784 {
2785   SI tmp_new_src2;
2786   tmp_new_src2 = * FLD (i_src2);
2787   {
2788     QI opval = * FLD (i_src1);
2789     SETMEMQI (current_cpu, pc, tmp_new_src2, opval);
2790     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2791   }
2792   {
2793     SI opval = ADDSI (tmp_new_src2, 1);
2794     * FLD (i_src2) = opval;
2795     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2796   }
2797 }
2798
2799 #undef FLD
2800 }
2801   NEXT (vpc);
2802
2803   CASE (sem, INSN_ST_MINUS) : /* st $src1,@-$src2 */
2804 {
2805   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2806   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2807 #define FLD(f) abuf->fields.sfmt_st_plus.f
2808   int UNUSED written = 0;
2809   IADDR UNUSED pc = abuf->addr;
2810   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2811
2812 {
2813   SI tmp_new_src2;
2814   tmp_new_src2 = SUBSI (* FLD (i_src2), 4);
2815   {
2816     SI opval = * FLD (i_src1);
2817     SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
2818     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2819   }
2820   {
2821     SI opval = tmp_new_src2;
2822     * FLD (i_src2) = opval;
2823     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2824   }
2825 }
2826
2827 #undef FLD
2828 }
2829   NEXT (vpc);
2830
2831   CASE (sem, INSN_SUB) : /* sub $dr,$sr */
2832 {
2833   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2834   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2835 #define FLD(f) abuf->fields.sfmt_add.f
2836   int UNUSED written = 0;
2837   IADDR UNUSED pc = abuf->addr;
2838   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2839
2840   {
2841     SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr));
2842     * FLD (i_dr) = opval;
2843     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2844   }
2845
2846 #undef FLD
2847 }
2848   NEXT (vpc);
2849
2850   CASE (sem, INSN_SUBV) : /* subv $dr,$sr */
2851 {
2852   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2853   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2854 #define FLD(f) abuf->fields.sfmt_add.f
2855   int UNUSED written = 0;
2856   IADDR UNUSED pc = abuf->addr;
2857   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2858
2859 {
2860   SI temp0;BI temp1;
2861   temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr));
2862   temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0);
2863   {
2864     SI opval = temp0;
2865     * FLD (i_dr) = opval;
2866     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2867   }
2868   {
2869     BI opval = temp1;
2870     CPU (h_cond) = opval;
2871     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
2872   }
2873 }
2874
2875 #undef FLD
2876 }
2877   NEXT (vpc);
2878
2879   CASE (sem, INSN_SUBX) : /* subx $dr,$sr */
2880 {
2881   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2882   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2883 #define FLD(f) abuf->fields.sfmt_add.f
2884   int UNUSED written = 0;
2885   IADDR UNUSED pc = abuf->addr;
2886   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2887
2888 {
2889   SI temp0;BI temp1;
2890   temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
2891   temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
2892   {
2893     SI opval = temp0;
2894     * FLD (i_dr) = opval;
2895     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2896   }
2897   {
2898     BI opval = temp1;
2899     CPU (h_cond) = opval;
2900     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
2901   }
2902 }
2903
2904 #undef FLD
2905 }
2906   NEXT (vpc);
2907
2908   CASE (sem, INSN_TRAP) : /* trap $uimm4 */
2909 {
2910   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2911   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2912 #define FLD(f) abuf->fields.sfmt_trap.f
2913   int UNUSED written = 0;
2914   IADDR UNUSED pc = abuf->addr;
2915   SEM_BRANCH_INIT
2916   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2917
2918 {
2919   {
2920     USI opval = GET_H_CR (((UINT) 6));
2921     SET_H_CR (((UINT) 14), opval);
2922     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
2923   }
2924   {
2925     USI opval = ADDSI (pc, 4);
2926     SET_H_CR (((UINT) 6), opval);
2927     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
2928   }
2929   {
2930     UQI opval = CPU (h_bpsw);
2931     CPU (h_bbpsw) = opval;
2932     TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval);
2933   }
2934   {
2935     UQI opval = GET_H_PSW ();
2936     CPU (h_bpsw) = opval;
2937     TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
2938   }
2939   {
2940     UQI opval = ANDQI (GET_H_PSW (), 128);
2941     SET_H_PSW (opval);
2942     TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
2943   }
2944   {
2945     SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4));
2946     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
2947     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
2948   }
2949 }
2950
2951   SEM_BRANCH_FINI (vpc);
2952 #undef FLD
2953 }
2954   NEXT (vpc);
2955
2956   CASE (sem, INSN_UNLOCK) : /* unlock $src1,@$src2 */
2957 {
2958   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2959   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2960 #define FLD(f) abuf->fields.sfmt_st_plus.f
2961   int UNUSED written = 0;
2962   IADDR UNUSED pc = abuf->addr;
2963   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2964
2965 {
2966 if (CPU (h_lock)) {
2967   {
2968     SI opval = * FLD (i_src1);
2969     SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
2970     written |= (1 << 4);
2971     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2972   }
2973 }
2974   {
2975     BI opval = 0;
2976     CPU (h_lock) = opval;
2977     TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
2978   }
2979 }
2980
2981   abuf->written = written;
2982 #undef FLD
2983 }
2984   NEXT (vpc);
2985
2986   CASE (sem, INSN_SATB) : /* satb $dr,$sr */
2987 {
2988   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2989   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2990 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2991   int UNUSED written = 0;
2992   IADDR UNUSED pc = abuf->addr;
2993   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2994
2995   {
2996     SI opval = (GESI (* FLD (i_sr), 127)) ? (127) : (LESI (* FLD (i_sr), -128)) ? (-128) : (* FLD (i_sr));
2997     * FLD (i_dr) = opval;
2998     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2999   }
3000
3001 #undef FLD
3002 }
3003   NEXT (vpc);
3004
3005   CASE (sem, INSN_SATH) : /* sath $dr,$sr */
3006 {
3007   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3008   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3009 #define FLD(f) abuf->fields.sfmt_ld_plus.f
3010   int UNUSED written = 0;
3011   IADDR UNUSED pc = abuf->addr;
3012   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3013
3014   {
3015     SI opval = (GESI (* FLD (i_sr), 32767)) ? (32767) : (LESI (* FLD (i_sr), -32768)) ? (-32768) : (* FLD (i_sr));
3016     * FLD (i_dr) = opval;
3017     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3018   }
3019
3020 #undef FLD
3021 }
3022   NEXT (vpc);
3023
3024   CASE (sem, INSN_SAT) : /* sat $dr,$sr */
3025 {
3026   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3027   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3028 #define FLD(f) abuf->fields.sfmt_ld_plus.f
3029   int UNUSED written = 0;
3030   IADDR UNUSED pc = abuf->addr;
3031   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3032
3033   {
3034     SI opval = ((CPU (h_cond)) ? (((LTSI (* FLD (i_sr), 0)) ? (2147483647) : (0x80000000))) : (* FLD (i_sr)));
3035     * FLD (i_dr) = opval;
3036     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3037   }
3038
3039 #undef FLD
3040 }
3041   NEXT (vpc);
3042
3043   CASE (sem, INSN_PCMPBZ) : /* pcmpbz $src2 */
3044 {
3045   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3046   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3047 #define FLD(f) abuf->fields.sfmt_st_plus.f
3048   int UNUSED written = 0;
3049   IADDR UNUSED pc = abuf->addr;
3050   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3051
3052   {
3053     BI opval = (EQSI (ANDSI (* FLD (i_src2), 255), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 65280), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 0xff000000), 0)) ? (1) : (0);
3054     CPU (h_cond) = opval;
3055     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3056   }
3057
3058 #undef FLD
3059 }
3060   NEXT (vpc);
3061
3062   CASE (sem, INSN_SADD) : /* sadd */
3063 {
3064   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3065   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3066 #define FLD(f) abuf->fields.fmt_empty.f
3067   int UNUSED written = 0;
3068   IADDR UNUSED pc = abuf->addr;
3069   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3070
3071   {
3072     DI opval = ADDDI (SRADI (GET_H_ACCUMS (((UINT) 1)), 16), GET_H_ACCUMS (((UINT) 0)));
3073     SET_H_ACCUMS (((UINT) 0), opval);
3074     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
3075   }
3076
3077 #undef FLD
3078 }
3079   NEXT (vpc);
3080
3081   CASE (sem, INSN_MACWU1) : /* macwu1 $src1,$src2 */
3082 {
3083   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3084   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3085 #define FLD(f) abuf->fields.sfmt_st_plus.f
3086   int UNUSED written = 0;
3087   IADDR UNUSED pc = abuf->addr;
3088   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3089
3090   {
3091     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535)))), 8), 8);
3092     SET_H_ACCUMS (((UINT) 1), opval);
3093     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
3094   }
3095
3096 #undef FLD
3097 }
3098   NEXT (vpc);
3099
3100   CASE (sem, INSN_MSBLO) : /* msblo $src1,$src2 */
3101 {
3102   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3103   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3104 #define FLD(f) abuf->fields.sfmt_st_plus.f
3105   int UNUSED written = 0;
3106   IADDR UNUSED pc = abuf->addr;
3107   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3108
3109   {
3110     DI opval = SRADI (SLLDI (SUBDI (GET_H_ACCUM (), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (* FLD (i_src1))), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 32), 16)), 8), 8);
3111     SET_H_ACCUM (opval);
3112     TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
3113   }
3114
3115 #undef FLD
3116 }
3117   NEXT (vpc);
3118
3119   CASE (sem, INSN_MULWU1) : /* mulwu1 $src1,$src2 */
3120 {
3121   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3122   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3123 #define FLD(f) abuf->fields.sfmt_st_plus.f
3124   int UNUSED written = 0;
3125   IADDR UNUSED pc = abuf->addr;
3126   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3127
3128   {
3129     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535))), 16), 16);
3130     SET_H_ACCUMS (((UINT) 1), opval);
3131     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
3132   }
3133
3134 #undef FLD
3135 }
3136   NEXT (vpc);
3137
3138   CASE (sem, INSN_MACLH1) : /* maclh1 $src1,$src2 */
3139 {
3140   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3141   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3142 #define FLD(f) abuf->fields.sfmt_st_plus.f
3143   int UNUSED written = 0;
3144   IADDR UNUSED pc = abuf->addr;
3145   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3146
3147   {
3148     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (* FLD (i_src1))), SRASI (* FLD (i_src2), 16))), 16)), 8), 8);
3149     SET_H_ACCUMS (((UINT) 1), opval);
3150     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
3151   }
3152
3153 #undef FLD
3154 }
3155   NEXT (vpc);
3156
3157   CASE (sem, INSN_SC) : /* sc */
3158 {
3159   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3160   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3161 #define FLD(f) abuf->fields.fmt_empty.f
3162   int UNUSED written = 0;
3163   IADDR UNUSED pc = abuf->addr;
3164   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3165
3166 if (ZEXTBISI (CPU (h_cond)))
3167   SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
3168
3169 #undef FLD
3170 }
3171   NEXT (vpc);
3172
3173   CASE (sem, INSN_SNC) : /* snc */
3174 {
3175   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3176   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3177 #define FLD(f) abuf->fields.fmt_empty.f
3178   int UNUSED written = 0;
3179   IADDR UNUSED pc = abuf->addr;
3180   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3181
3182 if (ZEXTBISI (NOTBI (CPU (h_cond))))
3183   SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
3184
3185 #undef FLD
3186 }
3187   NEXT (vpc);
3188
3189   CASE (sem, INSN_CLRPSW) : /* clrpsw $uimm8 */
3190 {
3191   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3192   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3193 #define FLD(f) abuf->fields.sfmt_clrpsw.f
3194   int UNUSED written = 0;
3195   IADDR UNUSED pc = abuf->addr;
3196   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3197
3198   {
3199     USI opval = ANDSI (GET_H_CR (((UINT) 0)), ORSI (ZEXTQISI (INVQI (FLD (f_uimm8))), 65280));
3200     SET_H_CR (((UINT) 0), opval);
3201     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
3202   }
3203
3204 #undef FLD
3205 }
3206   NEXT (vpc);
3207
3208   CASE (sem, INSN_SETPSW) : /* setpsw $uimm8 */
3209 {
3210   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3211   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3212 #define FLD(f) abuf->fields.sfmt_clrpsw.f
3213   int UNUSED written = 0;
3214   IADDR UNUSED pc = abuf->addr;
3215   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3216
3217   {
3218     USI opval = FLD (f_uimm8);
3219     SET_H_CR (((UINT) 0), opval);
3220     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
3221   }
3222
3223 #undef FLD
3224 }
3225   NEXT (vpc);
3226
3227   CASE (sem, INSN_BSET) : /* bset $uimm3,@($slo16,$sr) */
3228 {
3229   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3230   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3231 #define FLD(f) abuf->fields.sfmt_bset.f
3232   int UNUSED written = 0;
3233   IADDR UNUSED pc = abuf->addr;
3234   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3235
3236   {
3237     QI opval = ORQI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))), SLLQI (1, SUBSI (7, FLD (f_uimm3))));
3238     SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)), opval);
3239     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3240   }
3241
3242 #undef FLD
3243 }
3244   NEXT (vpc);
3245
3246   CASE (sem, INSN_BCLR) : /* bclr $uimm3,@($slo16,$sr) */
3247 {
3248   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3249   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3250 #define FLD(f) abuf->fields.sfmt_bset.f
3251   int UNUSED written = 0;
3252   IADDR UNUSED pc = abuf->addr;
3253   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3254
3255   {
3256     QI opval = ANDQI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))), INVQI (SLLQI (1, SUBSI (7, FLD (f_uimm3)))));
3257     SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)), opval);
3258     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3259   }
3260
3261 #undef FLD
3262 }
3263   NEXT (vpc);
3264
3265   CASE (sem, INSN_BTST) : /* btst $uimm3,$sr */
3266 {
3267   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3268   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3269 #define FLD(f) abuf->fields.sfmt_bset.f
3270   int UNUSED written = 0;
3271   IADDR UNUSED pc = abuf->addr;
3272   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3273
3274   {
3275     BI opval = ANDQI (SRLQI (* FLD (i_sr), SUBSI (7, FLD (f_uimm3))), 1);
3276     CPU (h_cond) = opval;
3277     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3278   }
3279
3280 #undef FLD
3281 }
3282   NEXT (vpc);
3283
3284   CASE (sem, INSN_PAR_ADD) : /* add $dr,$sr */
3285 {
3286   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3287   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3288 #define FLD(f) abuf->fields.sfmt_add.f
3289 #define OPRND(f) par_exec->operands.sfmt_add.f
3290   int UNUSED written = 0;
3291   IADDR UNUSED pc = abuf->addr;
3292   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3293
3294   {
3295     SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr));
3296     OPRND (dr) = opval;
3297     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3298   }
3299
3300 #undef OPRND
3301 #undef FLD
3302 }
3303   NEXT (vpc);
3304
3305 CASE (sem, INSN_WRITE_ADD) : /* add $dr,$sr */
3306   {
3307     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3308     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3309 #define FLD(f) abuf->fields.sfmt_add.f
3310 #define OPRND(f) par_exec->operands.sfmt_add.f
3311     int UNUSED written = abuf->written;
3312     IADDR UNUSED pc = abuf->addr;
3313     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3314
3315   * FLD (i_dr) = OPRND (dr);
3316
3317 #undef OPRND
3318 #undef FLD
3319   }
3320   NEXT (vpc);
3321
3322   CASE (sem, INSN_PAR_AND) : /* and $dr,$sr */
3323 {
3324   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3325   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3326 #define FLD(f) abuf->fields.sfmt_add.f
3327 #define OPRND(f) par_exec->operands.sfmt_add.f
3328   int UNUSED written = 0;
3329   IADDR UNUSED pc = abuf->addr;
3330   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3331
3332   {
3333     SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr));
3334     OPRND (dr) = opval;
3335     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3336   }
3337
3338 #undef OPRND
3339 #undef FLD
3340 }
3341   NEXT (vpc);
3342
3343 CASE (sem, INSN_WRITE_AND) : /* and $dr,$sr */
3344   {
3345     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3346     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3347 #define FLD(f) abuf->fields.sfmt_add.f
3348 #define OPRND(f) par_exec->operands.sfmt_add.f
3349     int UNUSED written = abuf->written;
3350     IADDR UNUSED pc = abuf->addr;
3351     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3352
3353   * FLD (i_dr) = OPRND (dr);
3354
3355 #undef OPRND
3356 #undef FLD
3357   }
3358   NEXT (vpc);
3359
3360   CASE (sem, INSN_PAR_OR) : /* or $dr,$sr */
3361 {
3362   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3363   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3364 #define FLD(f) abuf->fields.sfmt_add.f
3365 #define OPRND(f) par_exec->operands.sfmt_add.f
3366   int UNUSED written = 0;
3367   IADDR UNUSED pc = abuf->addr;
3368   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3369
3370   {
3371     SI opval = ORSI (* FLD (i_dr), * FLD (i_sr));
3372     OPRND (dr) = opval;
3373     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3374   }
3375
3376 #undef OPRND
3377 #undef FLD
3378 }
3379   NEXT (vpc);
3380
3381 CASE (sem, INSN_WRITE_OR) : /* or $dr,$sr */
3382   {
3383     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3384     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3385 #define FLD(f) abuf->fields.sfmt_add.f
3386 #define OPRND(f) par_exec->operands.sfmt_add.f
3387     int UNUSED written = abuf->written;
3388     IADDR UNUSED pc = abuf->addr;
3389     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3390
3391   * FLD (i_dr) = OPRND (dr);
3392
3393 #undef OPRND
3394 #undef FLD
3395   }
3396   NEXT (vpc);
3397
3398   CASE (sem, INSN_PAR_XOR) : /* xor $dr,$sr */
3399 {
3400   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3401   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3402 #define FLD(f) abuf->fields.sfmt_add.f
3403 #define OPRND(f) par_exec->operands.sfmt_add.f
3404   int UNUSED written = 0;
3405   IADDR UNUSED pc = abuf->addr;
3406   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3407
3408   {
3409     SI opval = XORSI (* FLD (i_dr), * FLD (i_sr));
3410     OPRND (dr) = opval;
3411     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3412   }
3413
3414 #undef OPRND
3415 #undef FLD
3416 }
3417   NEXT (vpc);
3418
3419 CASE (sem, INSN_WRITE_XOR) : /* xor $dr,$sr */
3420   {
3421     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3422     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3423 #define FLD(f) abuf->fields.sfmt_add.f
3424 #define OPRND(f) par_exec->operands.sfmt_add.f
3425     int UNUSED written = abuf->written;
3426     IADDR UNUSED pc = abuf->addr;
3427     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3428
3429   * FLD (i_dr) = OPRND (dr);
3430
3431 #undef OPRND
3432 #undef FLD
3433   }
3434   NEXT (vpc);
3435
3436   CASE (sem, INSN_PAR_ADDI) : /* addi $dr,$simm8 */
3437 {
3438   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3439   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3440 #define FLD(f) abuf->fields.sfmt_addi.f
3441 #define OPRND(f) par_exec->operands.sfmt_addi.f
3442   int UNUSED written = 0;
3443   IADDR UNUSED pc = abuf->addr;
3444   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3445
3446   {
3447     SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8));
3448     OPRND (dr) = opval;
3449     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3450   }
3451
3452 #undef OPRND
3453 #undef FLD
3454 }
3455   NEXT (vpc);
3456
3457 CASE (sem, INSN_WRITE_ADDI) : /* addi $dr,$simm8 */
3458   {
3459     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3460     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3461 #define FLD(f) abuf->fields.sfmt_addi.f
3462 #define OPRND(f) par_exec->operands.sfmt_addi.f
3463     int UNUSED written = abuf->written;
3464     IADDR UNUSED pc = abuf->addr;
3465     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3466
3467   * FLD (i_dr) = OPRND (dr);
3468
3469 #undef OPRND
3470 #undef FLD
3471   }
3472   NEXT (vpc);
3473
3474   CASE (sem, INSN_PAR_ADDV) : /* addv $dr,$sr */
3475 {
3476   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3477   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3478 #define FLD(f) abuf->fields.sfmt_add.f
3479 #define OPRND(f) par_exec->operands.sfmt_addv.f
3480   int UNUSED written = 0;
3481   IADDR UNUSED pc = abuf->addr;
3482   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3483
3484 {
3485   SI temp0;BI temp1;
3486   temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr));
3487   temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0);
3488   {
3489     SI opval = temp0;
3490     OPRND (dr) = opval;
3491     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3492   }
3493   {
3494     BI opval = temp1;
3495     OPRND (condbit) = opval;
3496     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3497   }
3498 }
3499
3500 #undef OPRND
3501 #undef FLD
3502 }
3503   NEXT (vpc);
3504
3505 CASE (sem, INSN_WRITE_ADDV) : /* addv $dr,$sr */
3506   {
3507     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3508     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3509 #define FLD(f) abuf->fields.sfmt_add.f
3510 #define OPRND(f) par_exec->operands.sfmt_addv.f
3511     int UNUSED written = abuf->written;
3512     IADDR UNUSED pc = abuf->addr;
3513     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3514
3515   CPU (h_cond) = OPRND (condbit);
3516   * FLD (i_dr) = OPRND (dr);
3517
3518 #undef OPRND
3519 #undef FLD
3520   }
3521   NEXT (vpc);
3522
3523   CASE (sem, INSN_PAR_ADDX) : /* addx $dr,$sr */
3524 {
3525   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3526   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3527 #define FLD(f) abuf->fields.sfmt_add.f
3528 #define OPRND(f) par_exec->operands.sfmt_addx.f
3529   int UNUSED written = 0;
3530   IADDR UNUSED pc = abuf->addr;
3531   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3532
3533 {
3534   SI temp0;BI temp1;
3535   temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
3536   temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
3537   {
3538     SI opval = temp0;
3539     OPRND (dr) = opval;
3540     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3541   }
3542   {
3543     BI opval = temp1;
3544     OPRND (condbit) = opval;
3545     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3546   }
3547 }
3548
3549 #undef OPRND
3550 #undef FLD
3551 }
3552   NEXT (vpc);
3553
3554 CASE (sem, INSN_WRITE_ADDX) : /* addx $dr,$sr */
3555   {
3556     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3557     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3558 #define FLD(f) abuf->fields.sfmt_add.f
3559 #define OPRND(f) par_exec->operands.sfmt_addx.f
3560     int UNUSED written = abuf->written;
3561     IADDR UNUSED pc = abuf->addr;
3562     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3563
3564   CPU (h_cond) = OPRND (condbit);
3565   * FLD (i_dr) = OPRND (dr);
3566
3567 #undef OPRND
3568 #undef FLD
3569   }
3570   NEXT (vpc);
3571
3572   CASE (sem, INSN_PAR_BC8) : /* bc.s $disp8 */
3573 {
3574   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3575   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3576 #define FLD(f) abuf->fields.sfmt_bl8.f
3577 #define OPRND(f) par_exec->operands.sfmt_bc8.f
3578   int UNUSED written = 0;
3579   IADDR UNUSED pc = abuf->addr;
3580   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3581
3582 if (CPU (h_cond)) {
3583   {
3584     USI opval = FLD (i_disp8);
3585     OPRND (pc) = opval;
3586     written |= (1 << 2);
3587     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3588   }
3589 }
3590
3591   abuf->written = written;
3592 #undef OPRND
3593 #undef FLD
3594 }
3595   NEXT (vpc);
3596
3597 CASE (sem, INSN_WRITE_BC8) : /* bc.s $disp8 */
3598   {
3599     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3600     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3601 #define FLD(f) abuf->fields.sfmt_bl8.f
3602 #define OPRND(f) par_exec->operands.sfmt_bc8.f
3603     int UNUSED written = abuf->written;
3604     IADDR UNUSED pc = abuf->addr;
3605     SEM_BRANCH_INIT
3606     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3607
3608   if (written & (1 << 2))
3609     {
3610       SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3611     }
3612
3613   SEM_BRANCH_FINI (vpc);
3614 #undef OPRND
3615 #undef FLD
3616   }
3617   NEXT (vpc);
3618
3619   CASE (sem, INSN_PAR_BL8) : /* bl.s $disp8 */
3620 {
3621   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3622   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3623 #define FLD(f) abuf->fields.sfmt_bl8.f
3624 #define OPRND(f) par_exec->operands.sfmt_bl8.f
3625   int UNUSED written = 0;
3626   IADDR UNUSED pc = abuf->addr;
3627   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3628
3629 {
3630   {
3631     SI opval = ADDSI (ANDSI (pc, -4), 4);
3632     OPRND (h_gr_SI_14) = opval;
3633     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3634   }
3635   {
3636     USI opval = FLD (i_disp8);
3637     OPRND (pc) = opval;
3638     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3639   }
3640 }
3641
3642 #undef OPRND
3643 #undef FLD
3644 }
3645   NEXT (vpc);
3646
3647 CASE (sem, INSN_WRITE_BL8) : /* bl.s $disp8 */
3648   {
3649     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3650     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3651 #define FLD(f) abuf->fields.sfmt_bl8.f
3652 #define OPRND(f) par_exec->operands.sfmt_bl8.f
3653     int UNUSED written = abuf->written;
3654     IADDR UNUSED pc = abuf->addr;
3655     SEM_BRANCH_INIT
3656     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3657
3658   CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
3659   SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3660
3661   SEM_BRANCH_FINI (vpc);
3662 #undef OPRND
3663 #undef FLD
3664   }
3665   NEXT (vpc);
3666
3667   CASE (sem, INSN_PAR_BCL8) : /* bcl.s $disp8 */
3668 {
3669   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3670   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3671 #define FLD(f) abuf->fields.sfmt_bl8.f
3672 #define OPRND(f) par_exec->operands.sfmt_bcl8.f
3673   int UNUSED written = 0;
3674   IADDR UNUSED pc = abuf->addr;
3675   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3676
3677 if (CPU (h_cond)) {
3678 {
3679   {
3680     SI opval = ADDSI (ANDSI (pc, -4), 4);
3681     OPRND (h_gr_SI_14) = opval;
3682     written |= (1 << 3);
3683     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3684   }
3685   {
3686     USI opval = FLD (i_disp8);
3687     OPRND (pc) = opval;
3688     written |= (1 << 4);
3689     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3690   }
3691 }
3692 }
3693
3694   abuf->written = written;
3695 #undef OPRND
3696 #undef FLD
3697 }
3698   NEXT (vpc);
3699
3700 CASE (sem, INSN_WRITE_BCL8) : /* bcl.s $disp8 */
3701   {
3702     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3703     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3704 #define FLD(f) abuf->fields.sfmt_bl8.f
3705 #define OPRND(f) par_exec->operands.sfmt_bcl8.f
3706     int UNUSED written = abuf->written;
3707     IADDR UNUSED pc = abuf->addr;
3708     SEM_BRANCH_INIT
3709     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3710
3711   if (written & (1 << 3))
3712     {
3713       CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
3714     }
3715   if (written & (1 << 4))
3716     {
3717       SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3718     }
3719
3720   SEM_BRANCH_FINI (vpc);
3721 #undef OPRND
3722 #undef FLD
3723   }
3724   NEXT (vpc);
3725
3726   CASE (sem, INSN_PAR_BNC8) : /* bnc.s $disp8 */
3727 {
3728   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3729   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3730 #define FLD(f) abuf->fields.sfmt_bl8.f
3731 #define OPRND(f) par_exec->operands.sfmt_bc8.f
3732   int UNUSED written = 0;
3733   IADDR UNUSED pc = abuf->addr;
3734   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3735
3736 if (NOTBI (CPU (h_cond))) {
3737   {
3738     USI opval = FLD (i_disp8);
3739     OPRND (pc) = opval;
3740     written |= (1 << 2);
3741     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3742   }
3743 }
3744
3745   abuf->written = written;
3746 #undef OPRND
3747 #undef FLD
3748 }
3749   NEXT (vpc);
3750
3751 CASE (sem, INSN_WRITE_BNC8) : /* bnc.s $disp8 */
3752   {
3753     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3754     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3755 #define FLD(f) abuf->fields.sfmt_bl8.f
3756 #define OPRND(f) par_exec->operands.sfmt_bc8.f
3757     int UNUSED written = abuf->written;
3758     IADDR UNUSED pc = abuf->addr;
3759     SEM_BRANCH_INIT
3760     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3761
3762   if (written & (1 << 2))
3763     {
3764       SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3765     }
3766
3767   SEM_BRANCH_FINI (vpc);
3768 #undef OPRND
3769 #undef FLD
3770   }
3771   NEXT (vpc);
3772
3773   CASE (sem, INSN_PAR_BRA8) : /* bra.s $disp8 */
3774 {
3775   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3776   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3777 #define FLD(f) abuf->fields.sfmt_bl8.f
3778 #define OPRND(f) par_exec->operands.sfmt_bra8.f
3779   int UNUSED written = 0;
3780   IADDR UNUSED pc = abuf->addr;
3781   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3782
3783   {
3784     USI opval = FLD (i_disp8);
3785     OPRND (pc) = opval;
3786     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3787   }
3788
3789 #undef OPRND
3790 #undef FLD
3791 }
3792   NEXT (vpc);
3793
3794 CASE (sem, INSN_WRITE_BRA8) : /* bra.s $disp8 */
3795   {
3796     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3797     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3798 #define FLD(f) abuf->fields.sfmt_bl8.f
3799 #define OPRND(f) par_exec->operands.sfmt_bra8.f
3800     int UNUSED written = abuf->written;
3801     IADDR UNUSED pc = abuf->addr;
3802     SEM_BRANCH_INIT
3803     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3804
3805   SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3806
3807   SEM_BRANCH_FINI (vpc);
3808 #undef OPRND
3809 #undef FLD
3810   }
3811   NEXT (vpc);
3812
3813   CASE (sem, INSN_PAR_BNCL8) : /* bncl.s $disp8 */
3814 {
3815   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3816   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3817 #define FLD(f) abuf->fields.sfmt_bl8.f
3818 #define OPRND(f) par_exec->operands.sfmt_bcl8.f
3819   int UNUSED written = 0;
3820   IADDR UNUSED pc = abuf->addr;
3821   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3822
3823 if (NOTBI (CPU (h_cond))) {
3824 {
3825   {
3826     SI opval = ADDSI (ANDSI (pc, -4), 4);
3827     OPRND (h_gr_SI_14) = opval;
3828     written |= (1 << 3);
3829     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3830   }
3831   {
3832     USI opval = FLD (i_disp8);
3833     OPRND (pc) = opval;
3834     written |= (1 << 4);
3835     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3836   }
3837 }
3838 }
3839
3840   abuf->written = written;
3841 #undef OPRND
3842 #undef FLD
3843 }
3844   NEXT (vpc);
3845
3846 CASE (sem, INSN_WRITE_BNCL8) : /* bncl.s $disp8 */
3847   {
3848     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3849     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3850 #define FLD(f) abuf->fields.sfmt_bl8.f
3851 #define OPRND(f) par_exec->operands.sfmt_bcl8.f
3852     int UNUSED written = abuf->written;
3853     IADDR UNUSED pc = abuf->addr;
3854     SEM_BRANCH_INIT
3855     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3856
3857   if (written & (1 << 3))
3858     {
3859       CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
3860     }
3861   if (written & (1 << 4))
3862     {
3863       SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3864     }
3865
3866   SEM_BRANCH_FINI (vpc);
3867 #undef OPRND
3868 #undef FLD
3869   }
3870   NEXT (vpc);
3871
3872   CASE (sem, INSN_PAR_CMP) : /* cmp $src1,$src2 */
3873 {
3874   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3875   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3876 #define FLD(f) abuf->fields.sfmt_st_plus.f
3877 #define OPRND(f) par_exec->operands.sfmt_cmp.f
3878   int UNUSED written = 0;
3879   IADDR UNUSED pc = abuf->addr;
3880   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3881
3882   {
3883     BI opval = LTSI (* FLD (i_src1), * FLD (i_src2));
3884     OPRND (condbit) = opval;
3885     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3886   }
3887
3888 #undef OPRND
3889 #undef FLD
3890 }
3891   NEXT (vpc);
3892
3893 CASE (sem, INSN_WRITE_CMP) : /* cmp $src1,$src2 */
3894   {
3895     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3896     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3897 #define FLD(f) abuf->fields.sfmt_st_plus.f
3898 #define OPRND(f) par_exec->operands.sfmt_cmp.f
3899     int UNUSED written = abuf->written;
3900     IADDR UNUSED pc = abuf->addr;
3901     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3902
3903   CPU (h_cond) = OPRND (condbit);
3904
3905 #undef OPRND
3906 #undef FLD
3907   }
3908   NEXT (vpc);
3909
3910   CASE (sem, INSN_PAR_CMPU) : /* cmpu $src1,$src2 */
3911 {
3912   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3913   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3914 #define FLD(f) abuf->fields.sfmt_st_plus.f
3915 #define OPRND(f) par_exec->operands.sfmt_cmp.f
3916   int UNUSED written = 0;
3917   IADDR UNUSED pc = abuf->addr;
3918   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3919
3920   {
3921     BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2));
3922     OPRND (condbit) = opval;
3923     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3924   }
3925
3926 #undef OPRND
3927 #undef FLD
3928 }
3929   NEXT (vpc);
3930
3931 CASE (sem, INSN_WRITE_CMPU) : /* cmpu $src1,$src2 */
3932   {
3933     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3934     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3935 #define FLD(f) abuf->fields.sfmt_st_plus.f
3936 #define OPRND(f) par_exec->operands.sfmt_cmp.f
3937     int UNUSED written = abuf->written;
3938     IADDR UNUSED pc = abuf->addr;
3939     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3940
3941   CPU (h_cond) = OPRND (condbit);
3942
3943 #undef OPRND
3944 #undef FLD
3945   }
3946   NEXT (vpc);
3947
3948   CASE (sem, INSN_PAR_CMPEQ) : /* cmpeq $src1,$src2 */
3949 {
3950   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3951   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3952 #define FLD(f) abuf->fields.sfmt_st_plus.f
3953 #define OPRND(f) par_exec->operands.sfmt_cmp.f
3954   int UNUSED written = 0;
3955   IADDR UNUSED pc = abuf->addr;
3956   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3957
3958   {
3959     BI opval = EQSI (* FLD (i_src1), * FLD (i_src2));
3960     OPRND (condbit) = opval;
3961     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3962   }
3963
3964 #undef OPRND
3965 #undef FLD
3966 }
3967   NEXT (vpc);
3968
3969 CASE (sem, INSN_WRITE_CMPEQ) : /* cmpeq $src1,$src2 */
3970   {
3971     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3972     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3973 #define FLD(f) abuf->fields.sfmt_st_plus.f
3974 #define OPRND(f) par_exec->operands.sfmt_cmp.f
3975     int UNUSED written = abuf->written;
3976     IADDR UNUSED pc = abuf->addr;
3977     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3978
3979   CPU (h_cond) = OPRND (condbit);
3980
3981 #undef OPRND
3982 #undef FLD
3983   }
3984   NEXT (vpc);
3985
3986   CASE (sem, INSN_PAR_CMPZ) : /* cmpz $src2 */
3987 {
3988   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3989   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3990 #define FLD(f) abuf->fields.sfmt_st_plus.f
3991 #define OPRND(f) par_exec->operands.sfmt_cmpz.f
3992   int UNUSED written = 0;
3993   IADDR UNUSED pc = abuf->addr;
3994   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3995
3996   {
3997     BI opval = EQSI (* FLD (i_src2), 0);
3998     OPRND (condbit) = opval;
3999     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
4000   }
4001
4002 #undef OPRND
4003 #undef FLD
4004 }
4005   NEXT (vpc);
4006
4007 CASE (sem, INSN_WRITE_CMPZ) : /* cmpz $src2 */
4008   {
4009     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4010     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4011 #define FLD(f) abuf->fields.sfmt_st_plus.f
4012 #define OPRND(f) par_exec->operands.sfmt_cmpz.f
4013     int UNUSED written = abuf->written;
4014     IADDR UNUSED pc = abuf->addr;
4015     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4016
4017   CPU (h_cond) = OPRND (condbit);
4018
4019 #undef OPRND
4020 #undef FLD
4021   }
4022   NEXT (vpc);
4023
4024   CASE (sem, INSN_PAR_JC) : /* jc $sr */
4025 {
4026   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4027   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4028 #define FLD(f) abuf->fields.sfmt_jl.f
4029 #define OPRND(f) par_exec->operands.sfmt_jc.f
4030   int UNUSED written = 0;
4031   IADDR UNUSED pc = abuf->addr;
4032   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4033
4034 if (CPU (h_cond)) {
4035   {
4036     USI opval = ANDSI (* FLD (i_sr), -4);
4037     OPRND (pc) = opval;
4038     written |= (1 << 2);
4039     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4040   }
4041 }
4042
4043   abuf->written = written;
4044 #undef OPRND
4045 #undef FLD
4046 }
4047   NEXT (vpc);
4048
4049 CASE (sem, INSN_WRITE_JC) : /* jc $sr */
4050   {
4051     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4052     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4053 #define FLD(f) abuf->fields.sfmt_jl.f
4054 #define OPRND(f) par_exec->operands.sfmt_jc.f
4055     int UNUSED written = abuf->written;
4056     IADDR UNUSED pc = abuf->addr;
4057     SEM_BRANCH_INIT
4058     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4059
4060   if (written & (1 << 2))
4061     {
4062       SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
4063     }
4064
4065   SEM_BRANCH_FINI (vpc);
4066 #undef OPRND
4067 #undef FLD
4068   }
4069   NEXT (vpc);
4070
4071   CASE (sem, INSN_PAR_JNC) : /* jnc $sr */
4072 {
4073   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4074   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4075 #define FLD(f) abuf->fields.sfmt_jl.f
4076 #define OPRND(f) par_exec->operands.sfmt_jc.f
4077   int UNUSED written = 0;
4078   IADDR UNUSED pc = abuf->addr;
4079   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4080
4081 if (NOTBI (CPU (h_cond))) {
4082   {
4083     USI opval = ANDSI (* FLD (i_sr), -4);
4084     OPRND (pc) = opval;
4085     written |= (1 << 2);
4086     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4087   }
4088 }
4089
4090   abuf->written = written;
4091 #undef OPRND
4092 #undef FLD
4093 }
4094   NEXT (vpc);
4095
4096 CASE (sem, INSN_WRITE_JNC) : /* jnc $sr */
4097   {
4098     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4099     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4100 #define FLD(f) abuf->fields.sfmt_jl.f
4101 #define OPRND(f) par_exec->operands.sfmt_jc.f
4102     int UNUSED written = abuf->written;
4103     IADDR UNUSED pc = abuf->addr;
4104     SEM_BRANCH_INIT
4105     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4106
4107   if (written & (1 << 2))
4108     {
4109       SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
4110     }
4111
4112   SEM_BRANCH_FINI (vpc);
4113 #undef OPRND
4114 #undef FLD
4115   }
4116   NEXT (vpc);
4117
4118   CASE (sem, INSN_PAR_JL) : /* jl $sr */
4119 {
4120   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4121   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4122 #define FLD(f) abuf->fields.sfmt_jl.f
4123 #define OPRND(f) par_exec->operands.sfmt_jl.f
4124   int UNUSED written = 0;
4125   IADDR UNUSED pc = abuf->addr;
4126   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4127
4128 {
4129   SI temp0;USI temp1;
4130   temp0 = ADDSI (ANDSI (pc, -4), 4);
4131   temp1 = ANDSI (* FLD (i_sr), -4);
4132   {
4133     SI opval = temp0;
4134     OPRND (h_gr_SI_14) = opval;
4135     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4136   }
4137   {
4138     USI opval = temp1;
4139     OPRND (pc) = opval;
4140     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4141   }
4142 }
4143
4144 #undef OPRND
4145 #undef FLD
4146 }
4147   NEXT (vpc);
4148
4149 CASE (sem, INSN_WRITE_JL) : /* jl $sr */
4150   {
4151     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4152     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4153 #define FLD(f) abuf->fields.sfmt_jl.f
4154 #define OPRND(f) par_exec->operands.sfmt_jl.f
4155     int UNUSED written = abuf->written;
4156     IADDR UNUSED pc = abuf->addr;
4157     SEM_BRANCH_INIT
4158     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4159
4160   CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
4161   SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
4162
4163   SEM_BRANCH_FINI (vpc);
4164 #undef OPRND
4165 #undef FLD
4166   }
4167   NEXT (vpc);
4168
4169   CASE (sem, INSN_PAR_JMP) : /* jmp $sr */
4170 {
4171   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4172   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4173 #define FLD(f) abuf->fields.sfmt_jl.f
4174 #define OPRND(f) par_exec->operands.sfmt_jmp.f
4175   int UNUSED written = 0;
4176   IADDR UNUSED pc = abuf->addr;
4177   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4178
4179   {
4180     USI opval = ANDSI (* FLD (i_sr), -4);
4181     OPRND (pc) = opval;
4182     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4183   }
4184
4185 #undef OPRND
4186 #undef FLD
4187 }
4188   NEXT (vpc);
4189
4190 CASE (sem, INSN_WRITE_JMP) : /* jmp $sr */
4191   {
4192     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4193     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4194 #define FLD(f) abuf->fields.sfmt_jl.f
4195 #define OPRND(f) par_exec->operands.sfmt_jmp.f
4196     int UNUSED written = abuf->written;
4197     IADDR UNUSED pc = abuf->addr;
4198     SEM_BRANCH_INIT
4199     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4200
4201   SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
4202
4203   SEM_BRANCH_FINI (vpc);
4204 #undef OPRND
4205 #undef FLD
4206   }
4207   NEXT (vpc);
4208
4209   CASE (sem, INSN_PAR_LD) : /* ld $dr,@$sr */
4210 {
4211   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4212   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4213 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4214 #define OPRND(f) par_exec->operands.sfmt_ld.f
4215   int UNUSED written = 0;
4216   IADDR UNUSED pc = abuf->addr;
4217   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4218
4219   {
4220     SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
4221     OPRND (dr) = opval;
4222     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4223   }
4224
4225 #undef OPRND
4226 #undef FLD
4227 }
4228   NEXT (vpc);
4229
4230 CASE (sem, INSN_WRITE_LD) : /* ld $dr,@$sr */
4231   {
4232     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4233     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4234 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4235 #define OPRND(f) par_exec->operands.sfmt_ld.f
4236     int UNUSED written = abuf->written;
4237     IADDR UNUSED pc = abuf->addr;
4238     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4239
4240   * FLD (i_dr) = OPRND (dr);
4241
4242 #undef OPRND
4243 #undef FLD
4244   }
4245   NEXT (vpc);
4246
4247   CASE (sem, INSN_PAR_LDB) : /* ldb $dr,@$sr */
4248 {
4249   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4250   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4251 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4252 #define OPRND(f) par_exec->operands.sfmt_ldb.f
4253   int UNUSED written = 0;
4254   IADDR UNUSED pc = abuf->addr;
4255   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4256
4257   {
4258     SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
4259     OPRND (dr) = opval;
4260     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4261   }
4262
4263 #undef OPRND
4264 #undef FLD
4265 }
4266   NEXT (vpc);
4267
4268 CASE (sem, INSN_WRITE_LDB) : /* ldb $dr,@$sr */
4269   {
4270     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4271     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4272 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4273 #define OPRND(f) par_exec->operands.sfmt_ldb.f
4274     int UNUSED written = abuf->written;
4275     IADDR UNUSED pc = abuf->addr;
4276     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4277
4278   * FLD (i_dr) = OPRND (dr);
4279
4280 #undef OPRND
4281 #undef FLD
4282   }
4283   NEXT (vpc);
4284
4285   CASE (sem, INSN_PAR_LDH) : /* ldh $dr,@$sr */
4286 {
4287   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4288   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4289 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4290 #define OPRND(f) par_exec->operands.sfmt_ldh.f
4291   int UNUSED written = 0;
4292   IADDR UNUSED pc = abuf->addr;
4293   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4294
4295   {
4296     SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
4297     OPRND (dr) = opval;
4298     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4299   }
4300
4301 #undef OPRND
4302 #undef FLD
4303 }
4304   NEXT (vpc);
4305
4306 CASE (sem, INSN_WRITE_LDH) : /* ldh $dr,@$sr */
4307   {
4308     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4309     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4310 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4311 #define OPRND(f) par_exec->operands.sfmt_ldh.f
4312     int UNUSED written = abuf->written;
4313     IADDR UNUSED pc = abuf->addr;
4314     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4315
4316   * FLD (i_dr) = OPRND (dr);
4317
4318 #undef OPRND
4319 #undef FLD
4320   }
4321   NEXT (vpc);
4322
4323   CASE (sem, INSN_PAR_LDUB) : /* ldub $dr,@$sr */
4324 {
4325   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4326   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4327 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4328 #define OPRND(f) par_exec->operands.sfmt_ldb.f
4329   int UNUSED written = 0;
4330   IADDR UNUSED pc = abuf->addr;
4331   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4332
4333   {
4334     SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
4335     OPRND (dr) = opval;
4336     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4337   }
4338
4339 #undef OPRND
4340 #undef FLD
4341 }
4342   NEXT (vpc);
4343
4344 CASE (sem, INSN_WRITE_LDUB) : /* ldub $dr,@$sr */
4345   {
4346     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4347     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4348 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4349 #define OPRND(f) par_exec->operands.sfmt_ldb.f
4350     int UNUSED written = abuf->written;
4351     IADDR UNUSED pc = abuf->addr;
4352     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4353
4354   * FLD (i_dr) = OPRND (dr);
4355
4356 #undef OPRND
4357 #undef FLD
4358   }
4359   NEXT (vpc);
4360
4361   CASE (sem, INSN_PAR_LDUH) : /* lduh $dr,@$sr */
4362 {
4363   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4364   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4365 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4366 #define OPRND(f) par_exec->operands.sfmt_ldh.f
4367   int UNUSED written = 0;
4368   IADDR UNUSED pc = abuf->addr;
4369   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4370
4371   {
4372     SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
4373     OPRND (dr) = opval;
4374     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4375   }
4376
4377 #undef OPRND
4378 #undef FLD
4379 }
4380   NEXT (vpc);
4381
4382 CASE (sem, INSN_WRITE_LDUH) : /* lduh $dr,@$sr */
4383   {
4384     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4385     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4386 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4387 #define OPRND(f) par_exec->operands.sfmt_ldh.f
4388     int UNUSED written = abuf->written;
4389     IADDR UNUSED pc = abuf->addr;
4390     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4391
4392   * FLD (i_dr) = OPRND (dr);
4393
4394 #undef OPRND
4395 #undef FLD
4396   }
4397   NEXT (vpc);
4398
4399   CASE (sem, INSN_PAR_LD_PLUS) : /* ld $dr,@$sr+ */
4400 {
4401   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4402   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4403 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4404 #define OPRND(f) par_exec->operands.sfmt_ld_plus.f
4405   int UNUSED written = 0;
4406   IADDR UNUSED pc = abuf->addr;
4407   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4408
4409 {
4410   SI temp0;SI temp1;
4411   temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr));
4412   temp1 = ADDSI (* FLD (i_sr), 4);
4413   {
4414     SI opval = temp0;
4415     OPRND (dr) = opval;
4416     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4417   }
4418   {
4419     SI opval = temp1;
4420     OPRND (sr) = opval;
4421     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4422   }
4423 }
4424
4425 #undef OPRND
4426 #undef FLD
4427 }
4428   NEXT (vpc);
4429
4430 CASE (sem, INSN_WRITE_LD_PLUS) : /* ld $dr,@$sr+ */
4431   {
4432     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4433     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4434 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4435 #define OPRND(f) par_exec->operands.sfmt_ld_plus.f
4436     int UNUSED written = abuf->written;
4437     IADDR UNUSED pc = abuf->addr;
4438     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4439
4440   * FLD (i_dr) = OPRND (dr);
4441   * FLD (i_sr) = OPRND (sr);
4442
4443 #undef OPRND
4444 #undef FLD
4445   }
4446   NEXT (vpc);
4447
4448   CASE (sem, INSN_PAR_LDI8) : /* ldi8 $dr,$simm8 */
4449 {
4450   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4451   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4452 #define FLD(f) abuf->fields.sfmt_addi.f
4453 #define OPRND(f) par_exec->operands.sfmt_ldi8.f
4454   int UNUSED written = 0;
4455   IADDR UNUSED pc = abuf->addr;
4456   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4457
4458   {
4459     SI opval = FLD (f_simm8);
4460     OPRND (dr) = opval;
4461     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4462   }
4463
4464 #undef OPRND
4465 #undef FLD
4466 }
4467   NEXT (vpc);
4468
4469 CASE (sem, INSN_WRITE_LDI8) : /* ldi8 $dr,$simm8 */
4470   {
4471     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4472     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4473 #define FLD(f) abuf->fields.sfmt_addi.f
4474 #define OPRND(f) par_exec->operands.sfmt_ldi8.f
4475     int UNUSED written = abuf->written;
4476     IADDR UNUSED pc = abuf->addr;
4477     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4478
4479   * FLD (i_dr) = OPRND (dr);
4480
4481 #undef OPRND
4482 #undef FLD
4483   }
4484   NEXT (vpc);
4485
4486   CASE (sem, INSN_PAR_LOCK) : /* lock $dr,@$sr */
4487 {
4488   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4489   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4490 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4491 #define OPRND(f) par_exec->operands.sfmt_lock.f
4492   int UNUSED written = 0;
4493   IADDR UNUSED pc = abuf->addr;
4494   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4495
4496 {
4497   {
4498     BI opval = 1;
4499     OPRND (h_lock_BI) = opval;
4500     TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
4501   }
4502   {
4503     SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
4504     OPRND (dr) = opval;
4505     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4506   }
4507 }
4508
4509 #undef OPRND
4510 #undef FLD
4511 }
4512   NEXT (vpc);
4513
4514 CASE (sem, INSN_WRITE_LOCK) : /* lock $dr,@$sr */
4515   {
4516     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4517     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4518 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4519 #define OPRND(f) par_exec->operands.sfmt_lock.f
4520     int UNUSED written = abuf->written;
4521     IADDR UNUSED pc = abuf->addr;
4522     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4523
4524   * FLD (i_dr) = OPRND (dr);
4525   CPU (h_lock) = OPRND (h_lock_BI);
4526
4527 #undef OPRND
4528 #undef FLD
4529   }
4530   NEXT (vpc);
4531
4532   CASE (sem, INSN_PAR_MACHI_A) : /* machi $src1,$src2,$acc */
4533 {
4534   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4535   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4536 #define FLD(f) abuf->fields.sfmt_machi_a.f
4537 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4538   int UNUSED written = 0;
4539   IADDR UNUSED pc = abuf->addr;
4540   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4541
4542   {
4543     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
4544     OPRND (acc) = opval;
4545     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4546   }
4547
4548 #undef OPRND
4549 #undef FLD
4550 }
4551   NEXT (vpc);
4552
4553 CASE (sem, INSN_WRITE_MACHI_A) : /* machi $src1,$src2,$acc */
4554   {
4555     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4556     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4557 #define FLD(f) abuf->fields.sfmt_machi_a.f
4558 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4559     int UNUSED written = abuf->written;
4560     IADDR UNUSED pc = abuf->addr;
4561     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4562
4563   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4564
4565 #undef OPRND
4566 #undef FLD
4567   }
4568   NEXT (vpc);
4569
4570   CASE (sem, INSN_PAR_MACLO_A) : /* maclo $src1,$src2,$acc */
4571 {
4572   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4573   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4574 #define FLD(f) abuf->fields.sfmt_machi_a.f
4575 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4576   int UNUSED written = 0;
4577   IADDR UNUSED pc = abuf->addr;
4578   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4579
4580   {
4581     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
4582     OPRND (acc) = opval;
4583     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4584   }
4585
4586 #undef OPRND
4587 #undef FLD
4588 }
4589   NEXT (vpc);
4590
4591 CASE (sem, INSN_WRITE_MACLO_A) : /* maclo $src1,$src2,$acc */
4592   {
4593     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4594     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4595 #define FLD(f) abuf->fields.sfmt_machi_a.f
4596 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4597     int UNUSED written = abuf->written;
4598     IADDR UNUSED pc = abuf->addr;
4599     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4600
4601   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4602
4603 #undef OPRND
4604 #undef FLD
4605   }
4606   NEXT (vpc);
4607
4608   CASE (sem, INSN_PAR_MACWHI_A) : /* macwhi $src1,$src2,$acc */
4609 {
4610   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4611   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4612 #define FLD(f) abuf->fields.sfmt_machi_a.f
4613 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4614   int UNUSED written = 0;
4615   IADDR UNUSED pc = abuf->addr;
4616   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4617
4618   {
4619     DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))));
4620     OPRND (acc) = opval;
4621     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4622   }
4623
4624 #undef OPRND
4625 #undef FLD
4626 }
4627   NEXT (vpc);
4628
4629 CASE (sem, INSN_WRITE_MACWHI_A) : /* macwhi $src1,$src2,$acc */
4630   {
4631     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4632     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4633 #define FLD(f) abuf->fields.sfmt_machi_a.f
4634 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4635     int UNUSED written = abuf->written;
4636     IADDR UNUSED pc = abuf->addr;
4637     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4638
4639   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4640
4641 #undef OPRND
4642 #undef FLD
4643   }
4644   NEXT (vpc);
4645
4646   CASE (sem, INSN_PAR_MACWLO_A) : /* macwlo $src1,$src2,$acc */
4647 {
4648   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4649   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4650 #define FLD(f) abuf->fields.sfmt_machi_a.f
4651 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4652   int UNUSED written = 0;
4653   IADDR UNUSED pc = abuf->addr;
4654   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4655
4656   {
4657     DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))));
4658     OPRND (acc) = opval;
4659     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4660   }
4661
4662 #undef OPRND
4663 #undef FLD
4664 }
4665   NEXT (vpc);
4666
4667 CASE (sem, INSN_WRITE_MACWLO_A) : /* macwlo $src1,$src2,$acc */
4668   {
4669     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4670     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4671 #define FLD(f) abuf->fields.sfmt_machi_a.f
4672 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4673     int UNUSED written = abuf->written;
4674     IADDR UNUSED pc = abuf->addr;
4675     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4676
4677   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4678
4679 #undef OPRND
4680 #undef FLD
4681   }
4682   NEXT (vpc);
4683
4684   CASE (sem, INSN_PAR_MUL) : /* mul $dr,$sr */
4685 {
4686   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4687   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4688 #define FLD(f) abuf->fields.sfmt_add.f
4689 #define OPRND(f) par_exec->operands.sfmt_add.f
4690   int UNUSED written = 0;
4691   IADDR UNUSED pc = abuf->addr;
4692   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4693
4694   {
4695     SI opval = MULSI (* FLD (i_dr), * FLD (i_sr));
4696     OPRND (dr) = opval;
4697     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4698   }
4699
4700 #undef OPRND
4701 #undef FLD
4702 }
4703   NEXT (vpc);
4704
4705 CASE (sem, INSN_WRITE_MUL) : /* mul $dr,$sr */
4706   {
4707     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4708     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4709 #define FLD(f) abuf->fields.sfmt_add.f
4710 #define OPRND(f) par_exec->operands.sfmt_add.f
4711     int UNUSED written = abuf->written;
4712     IADDR UNUSED pc = abuf->addr;
4713     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4714
4715   * FLD (i_dr) = OPRND (dr);
4716
4717 #undef OPRND
4718 #undef FLD
4719   }
4720   NEXT (vpc);
4721
4722   CASE (sem, INSN_PAR_MULHI_A) : /* mulhi $src1,$src2,$acc */
4723 {
4724   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4725   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4726 #define FLD(f) abuf->fields.sfmt_machi_a.f
4727 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4728   int UNUSED written = 0;
4729   IADDR UNUSED pc = abuf->addr;
4730   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4731
4732   {
4733     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16);
4734     OPRND (acc) = opval;
4735     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4736   }
4737
4738 #undef OPRND
4739 #undef FLD
4740 }
4741   NEXT (vpc);
4742
4743 CASE (sem, INSN_WRITE_MULHI_A) : /* mulhi $src1,$src2,$acc */
4744   {
4745     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4746     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4747 #define FLD(f) abuf->fields.sfmt_machi_a.f
4748 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4749     int UNUSED written = abuf->written;
4750     IADDR UNUSED pc = abuf->addr;
4751     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4752
4753   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4754
4755 #undef OPRND
4756 #undef FLD
4757   }
4758   NEXT (vpc);
4759
4760   CASE (sem, INSN_PAR_MULLO_A) : /* mullo $src1,$src2,$acc */
4761 {
4762   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4763   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4764 #define FLD(f) abuf->fields.sfmt_machi_a.f
4765 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4766   int UNUSED written = 0;
4767   IADDR UNUSED pc = abuf->addr;
4768   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4769
4770   {
4771     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16);
4772     OPRND (acc) = opval;
4773     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4774   }
4775
4776 #undef OPRND
4777 #undef FLD
4778 }
4779   NEXT (vpc);
4780
4781 CASE (sem, INSN_WRITE_MULLO_A) : /* mullo $src1,$src2,$acc */
4782   {
4783     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4784     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4785 #define FLD(f) abuf->fields.sfmt_machi_a.f
4786 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4787     int UNUSED written = abuf->written;
4788     IADDR UNUSED pc = abuf->addr;
4789     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4790
4791   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4792
4793 #undef OPRND
4794 #undef FLD
4795   }
4796   NEXT (vpc);
4797
4798   CASE (sem, INSN_PAR_MULWHI_A) : /* mulwhi $src1,$src2,$acc */
4799 {
4800   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4801   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4802 #define FLD(f) abuf->fields.sfmt_machi_a.f
4803 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4804   int UNUSED written = 0;
4805   IADDR UNUSED pc = abuf->addr;
4806   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4807
4808   {
4809     DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))));
4810     OPRND (acc) = opval;
4811     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4812   }
4813
4814 #undef OPRND
4815 #undef FLD
4816 }
4817   NEXT (vpc);
4818
4819 CASE (sem, INSN_WRITE_MULWHI_A) : /* mulwhi $src1,$src2,$acc */
4820   {
4821     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4822     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4823 #define FLD(f) abuf->fields.sfmt_machi_a.f
4824 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4825     int UNUSED written = abuf->written;
4826     IADDR UNUSED pc = abuf->addr;
4827     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4828
4829   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4830
4831 #undef OPRND
4832 #undef FLD
4833   }
4834   NEXT (vpc);
4835
4836   CASE (sem, INSN_PAR_MULWLO_A) : /* mulwlo $src1,$src2,$acc */
4837 {
4838   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4839   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4840 #define FLD(f) abuf->fields.sfmt_machi_a.f
4841 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4842   int UNUSED written = 0;
4843   IADDR UNUSED pc = abuf->addr;
4844   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4845
4846   {
4847     DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))));
4848     OPRND (acc) = opval;
4849     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4850   }
4851
4852 #undef OPRND
4853 #undef FLD
4854 }
4855   NEXT (vpc);
4856
4857 CASE (sem, INSN_WRITE_MULWLO_A) : /* mulwlo $src1,$src2,$acc */
4858   {
4859     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4860     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4861 #define FLD(f) abuf->fields.sfmt_machi_a.f
4862 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4863     int UNUSED written = abuf->written;
4864     IADDR UNUSED pc = abuf->addr;
4865     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4866
4867   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4868
4869 #undef OPRND
4870 #undef FLD
4871   }
4872   NEXT (vpc);
4873
4874   CASE (sem, INSN_PAR_MV) : /* mv $dr,$sr */
4875 {
4876   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4877   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4878 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4879 #define OPRND(f) par_exec->operands.sfmt_mv.f
4880   int UNUSED written = 0;
4881   IADDR UNUSED pc = abuf->addr;
4882   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4883
4884   {
4885     SI opval = * FLD (i_sr);
4886     OPRND (dr) = opval;
4887     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4888   }
4889
4890 #undef OPRND
4891 #undef FLD
4892 }
4893   NEXT (vpc);
4894
4895 CASE (sem, INSN_WRITE_MV) : /* mv $dr,$sr */
4896   {
4897     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4898     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4899 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4900 #define OPRND(f) par_exec->operands.sfmt_mv.f
4901     int UNUSED written = abuf->written;
4902     IADDR UNUSED pc = abuf->addr;
4903     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4904
4905   * FLD (i_dr) = OPRND (dr);
4906
4907 #undef OPRND
4908 #undef FLD
4909   }
4910   NEXT (vpc);
4911
4912   CASE (sem, INSN_PAR_MVFACHI_A) : /* mvfachi $dr,$accs */
4913 {
4914   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4915   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4916 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4917 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4918   int UNUSED written = 0;
4919   IADDR UNUSED pc = abuf->addr;
4920   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4921
4922   {
4923     SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 32));
4924     OPRND (dr) = opval;
4925     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4926   }
4927
4928 #undef OPRND
4929 #undef FLD
4930 }
4931   NEXT (vpc);
4932
4933 CASE (sem, INSN_WRITE_MVFACHI_A) : /* mvfachi $dr,$accs */
4934   {
4935     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4936     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4937 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4938 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4939     int UNUSED written = abuf->written;
4940     IADDR UNUSED pc = abuf->addr;
4941     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4942
4943   * FLD (i_dr) = OPRND (dr);
4944
4945 #undef OPRND
4946 #undef FLD
4947   }
4948   NEXT (vpc);
4949
4950   CASE (sem, INSN_PAR_MVFACLO_A) : /* mvfaclo $dr,$accs */
4951 {
4952   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4953   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4954 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4955 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4956   int UNUSED written = 0;
4957   IADDR UNUSED pc = abuf->addr;
4958   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4959
4960   {
4961     SI opval = TRUNCDISI (GET_H_ACCUMS (FLD (f_accs)));
4962     OPRND (dr) = opval;
4963     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4964   }
4965
4966 #undef OPRND
4967 #undef FLD
4968 }
4969   NEXT (vpc);
4970
4971 CASE (sem, INSN_WRITE_MVFACLO_A) : /* mvfaclo $dr,$accs */
4972   {
4973     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4974     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4975 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4976 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4977     int UNUSED written = abuf->written;
4978     IADDR UNUSED pc = abuf->addr;
4979     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4980
4981   * FLD (i_dr) = OPRND (dr);
4982
4983 #undef OPRND
4984 #undef FLD
4985   }
4986   NEXT (vpc);
4987
4988   CASE (sem, INSN_PAR_MVFACMI_A) : /* mvfacmi $dr,$accs */
4989 {
4990   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4991   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4992 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4993 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4994   int UNUSED written = 0;
4995   IADDR UNUSED pc = abuf->addr;
4996   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4997
4998   {
4999     SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 16));
5000     OPRND (dr) = opval;
5001     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5002   }
5003
5004 #undef OPRND
5005 #undef FLD
5006 }
5007   NEXT (vpc);
5008
5009 CASE (sem, INSN_WRITE_MVFACMI_A) : /* mvfacmi $dr,$accs */
5010   {
5011     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5012     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5013 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
5014 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
5015     int UNUSED written = abuf->written;
5016     IADDR UNUSED pc = abuf->addr;
5017     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5018
5019   * FLD (i_dr) = OPRND (dr);
5020
5021 #undef OPRND
5022 #undef FLD
5023   }
5024   NEXT (vpc);
5025
5026   CASE (sem, INSN_PAR_MVFC) : /* mvfc $dr,$scr */
5027 {
5028   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5029   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5030 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5031 #define OPRND(f) par_exec->operands.sfmt_mvfc.f
5032   int UNUSED written = 0;
5033   IADDR UNUSED pc = abuf->addr;
5034   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5035
5036   {
5037     SI opval = GET_H_CR (FLD (f_r2));
5038     OPRND (dr) = opval;
5039     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5040   }
5041
5042 #undef OPRND
5043 #undef FLD
5044 }
5045   NEXT (vpc);
5046
5047 CASE (sem, INSN_WRITE_MVFC) : /* mvfc $dr,$scr */
5048   {
5049     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5050     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5051 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5052 #define OPRND(f) par_exec->operands.sfmt_mvfc.f
5053     int UNUSED written = abuf->written;
5054     IADDR UNUSED pc = abuf->addr;
5055     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5056
5057   * FLD (i_dr) = OPRND (dr);
5058
5059 #undef OPRND
5060 #undef FLD
5061   }
5062   NEXT (vpc);
5063
5064   CASE (sem, INSN_PAR_MVTACHI_A) : /* mvtachi $src1,$accs */
5065 {
5066   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5067   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5068 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
5069 #define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
5070   int UNUSED written = 0;
5071   IADDR UNUSED pc = abuf->addr;
5072   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5073
5074   {
5075     DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32));
5076     OPRND (accs) = opval;
5077     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
5078   }
5079
5080 #undef OPRND
5081 #undef FLD
5082 }
5083   NEXT (vpc);
5084
5085 CASE (sem, INSN_WRITE_MVTACHI_A) : /* mvtachi $src1,$accs */
5086   {
5087     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5088     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5089 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
5090 #define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
5091     int UNUSED written = abuf->written;
5092     IADDR UNUSED pc = abuf->addr;
5093     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5094
5095   SET_H_ACCUMS (FLD (f_accs), OPRND (accs));
5096
5097 #undef OPRND
5098 #undef FLD
5099   }
5100   NEXT (vpc);
5101
5102   CASE (sem, INSN_PAR_MVTACLO_A) : /* mvtaclo $src1,$accs */
5103 {
5104   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5105   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5106 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
5107 #define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
5108   int UNUSED written = 0;
5109   IADDR UNUSED pc = abuf->addr;
5110   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5111
5112   {
5113     DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1)));
5114     OPRND (accs) = opval;
5115     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
5116   }
5117
5118 #undef OPRND
5119 #undef FLD
5120 }
5121   NEXT (vpc);
5122
5123 CASE (sem, INSN_WRITE_MVTACLO_A) : /* mvtaclo $src1,$accs */
5124   {
5125     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5126     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5127 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
5128 #define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
5129     int UNUSED written = abuf->written;
5130     IADDR UNUSED pc = abuf->addr;
5131     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5132
5133   SET_H_ACCUMS (FLD (f_accs), OPRND (accs));
5134
5135 #undef OPRND
5136 #undef FLD
5137   }
5138   NEXT (vpc);
5139
5140   CASE (sem, INSN_PAR_MVTC) : /* mvtc $sr,$dcr */
5141 {
5142   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5143   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5144 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5145 #define OPRND(f) par_exec->operands.sfmt_mvtc.f
5146   int UNUSED written = 0;
5147   IADDR UNUSED pc = abuf->addr;
5148   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5149
5150   {
5151     USI opval = * FLD (i_sr);
5152     OPRND (dcr) = opval;
5153     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
5154   }
5155
5156 #undef OPRND
5157 #undef FLD
5158 }
5159   NEXT (vpc);
5160
5161 CASE (sem, INSN_WRITE_MVTC) : /* mvtc $sr,$dcr */
5162   {
5163     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5164     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5165 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5166 #define OPRND(f) par_exec->operands.sfmt_mvtc.f
5167     int UNUSED written = abuf->written;
5168     IADDR UNUSED pc = abuf->addr;
5169     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5170
5171   SET_H_CR (FLD (f_r1), OPRND (dcr));
5172
5173 #undef OPRND
5174 #undef FLD
5175   }
5176   NEXT (vpc);
5177
5178   CASE (sem, INSN_PAR_NEG) : /* neg $dr,$sr */
5179 {
5180   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5181   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5182 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5183 #define OPRND(f) par_exec->operands.sfmt_mv.f
5184   int UNUSED written = 0;
5185   IADDR UNUSED pc = abuf->addr;
5186   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5187
5188   {
5189     SI opval = NEGSI (* FLD (i_sr));
5190     OPRND (dr) = opval;
5191     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5192   }
5193
5194 #undef OPRND
5195 #undef FLD
5196 }
5197   NEXT (vpc);
5198
5199 CASE (sem, INSN_WRITE_NEG) : /* neg $dr,$sr */
5200   {
5201     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5202     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5203 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5204 #define OPRND(f) par_exec->operands.sfmt_mv.f
5205     int UNUSED written = abuf->written;
5206     IADDR UNUSED pc = abuf->addr;
5207     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5208
5209   * FLD (i_dr) = OPRND (dr);
5210
5211 #undef OPRND
5212 #undef FLD
5213   }
5214   NEXT (vpc);
5215
5216   CASE (sem, INSN_PAR_NOP) : /* nop */
5217 {
5218   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5219   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5220 #define FLD(f) abuf->fields.fmt_empty.f
5221 #define OPRND(f) par_exec->operands.sfmt_nop.f
5222   int UNUSED written = 0;
5223   IADDR UNUSED pc = abuf->addr;
5224   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5225
5226 PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
5227
5228 #undef OPRND
5229 #undef FLD
5230 }
5231   NEXT (vpc);
5232
5233 CASE (sem, INSN_WRITE_NOP) : /* nop */
5234   {
5235     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5236     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5237 #define FLD(f) abuf->fields.fmt_empty.f
5238 #define OPRND(f) par_exec->operands.sfmt_nop.f
5239     int UNUSED written = abuf->written;
5240     IADDR UNUSED pc = abuf->addr;
5241     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5242
5243
5244 #undef OPRND
5245 #undef FLD
5246   }
5247   NEXT (vpc);
5248
5249   CASE (sem, INSN_PAR_NOT) : /* not $dr,$sr */
5250 {
5251   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5252   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5253 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5254 #define OPRND(f) par_exec->operands.sfmt_mv.f
5255   int UNUSED written = 0;
5256   IADDR UNUSED pc = abuf->addr;
5257   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5258
5259   {
5260     SI opval = INVSI (* FLD (i_sr));
5261     OPRND (dr) = opval;
5262     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5263   }
5264
5265 #undef OPRND
5266 #undef FLD
5267 }
5268   NEXT (vpc);
5269
5270 CASE (sem, INSN_WRITE_NOT) : /* not $dr,$sr */
5271   {
5272     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5273     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5274 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5275 #define OPRND(f) par_exec->operands.sfmt_mv.f
5276     int UNUSED written = abuf->written;
5277     IADDR UNUSED pc = abuf->addr;
5278     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5279
5280   * FLD (i_dr) = OPRND (dr);
5281
5282 #undef OPRND
5283 #undef FLD
5284   }
5285   NEXT (vpc);
5286
5287   CASE (sem, INSN_PAR_RAC_DSI) : /* rac $accd,$accs,$imm1 */
5288 {
5289   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5290   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5291 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
5292 #define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5293   int UNUSED written = 0;
5294   IADDR UNUSED pc = abuf->addr;
5295   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5296
5297 {
5298   DI tmp_tmp1;
5299   tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
5300   tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
5301   {
5302     DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000)));
5303     OPRND (accd) = opval;
5304     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
5305   }
5306 }
5307
5308 #undef OPRND
5309 #undef FLD
5310 }
5311   NEXT (vpc);
5312
5313 CASE (sem, INSN_WRITE_RAC_DSI) : /* rac $accd,$accs,$imm1 */
5314   {
5315     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5316     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5317 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
5318 #define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5319     int UNUSED written = abuf->written;
5320     IADDR UNUSED pc = abuf->addr;
5321     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5322
5323   SET_H_ACCUMS (FLD (f_accd), OPRND (accd));
5324
5325 #undef OPRND
5326 #undef FLD
5327   }
5328   NEXT (vpc);
5329
5330   CASE (sem, INSN_PAR_RACH_DSI) : /* rach $accd,$accs,$imm1 */
5331 {
5332   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5333   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5334 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
5335 #define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5336   int UNUSED written = 0;
5337   IADDR UNUSED pc = abuf->addr;
5338   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5339
5340 {
5341   DI tmp_tmp1;
5342   tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
5343   tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000));
5344   {
5345     DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0)));
5346     OPRND (accd) = opval;
5347     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
5348   }
5349 }
5350
5351 #undef OPRND
5352 #undef FLD
5353 }
5354   NEXT (vpc);
5355
5356 CASE (sem, INSN_WRITE_RACH_DSI) : /* rach $accd,$accs,$imm1 */
5357   {
5358     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5359     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5360 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
5361 #define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5362     int UNUSED written = abuf->written;
5363     IADDR UNUSED pc = abuf->addr;
5364     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5365
5366   SET_H_ACCUMS (FLD (f_accd), OPRND (accd));
5367
5368 #undef OPRND
5369 #undef FLD
5370   }
5371   NEXT (vpc);
5372
5373   CASE (sem, INSN_PAR_RTE) : /* rte */
5374 {
5375   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5376   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5377 #define FLD(f) abuf->fields.fmt_empty.f
5378 #define OPRND(f) par_exec->operands.sfmt_rte.f
5379   int UNUSED written = 0;
5380   IADDR UNUSED pc = abuf->addr;
5381   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5382
5383 {
5384   {
5385     USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4);
5386     OPRND (pc) = opval;
5387     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5388   }
5389   {
5390     USI opval = GET_H_CR (((UINT) 14));
5391     OPRND (h_cr_USI_6) = opval;
5392     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
5393   }
5394   {
5395     UQI opval = CPU (h_bpsw);
5396     OPRND (h_psw_UQI) = opval;
5397     TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
5398   }
5399   {
5400     UQI opval = CPU (h_bbpsw);
5401     OPRND (h_bpsw_UQI) = opval;
5402     TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
5403   }
5404 }
5405
5406 #undef OPRND
5407 #undef FLD
5408 }
5409   NEXT (vpc);
5410
5411 CASE (sem, INSN_WRITE_RTE) : /* rte */
5412   {
5413     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5414     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5415 #define FLD(f) abuf->fields.fmt_empty.f
5416 #define OPRND(f) par_exec->operands.sfmt_rte.f
5417     int UNUSED written = abuf->written;
5418     IADDR UNUSED pc = abuf->addr;
5419     SEM_BRANCH_INIT
5420     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5421
5422   CPU (h_bpsw) = OPRND (h_bpsw_UQI);
5423   SET_H_CR (((UINT) 6), OPRND (h_cr_USI_6));
5424   SET_H_PSW (OPRND (h_psw_UQI));
5425   SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
5426
5427   SEM_BRANCH_FINI (vpc);
5428 #undef OPRND
5429 #undef FLD
5430   }
5431   NEXT (vpc);
5432
5433   CASE (sem, INSN_PAR_SLL) : /* sll $dr,$sr */
5434 {
5435   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5436   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5437 #define FLD(f) abuf->fields.sfmt_add.f
5438 #define OPRND(f) par_exec->operands.sfmt_add.f
5439   int UNUSED written = 0;
5440   IADDR UNUSED pc = abuf->addr;
5441   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5442
5443   {
5444     SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
5445     OPRND (dr) = opval;
5446     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5447   }
5448
5449 #undef OPRND
5450 #undef FLD
5451 }
5452   NEXT (vpc);
5453
5454 CASE (sem, INSN_WRITE_SLL) : /* sll $dr,$sr */
5455   {
5456     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5457     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5458 #define FLD(f) abuf->fields.sfmt_add.f
5459 #define OPRND(f) par_exec->operands.sfmt_add.f
5460     int UNUSED written = abuf->written;
5461     IADDR UNUSED pc = abuf->addr;
5462     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5463
5464   * FLD (i_dr) = OPRND (dr);
5465
5466 #undef OPRND
5467 #undef FLD
5468   }
5469   NEXT (vpc);
5470
5471   CASE (sem, INSN_PAR_SLLI) : /* slli $dr,$uimm5 */
5472 {
5473   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5474   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5475 #define FLD(f) abuf->fields.sfmt_slli.f
5476 #define OPRND(f) par_exec->operands.sfmt_slli.f
5477   int UNUSED written = 0;
5478   IADDR UNUSED pc = abuf->addr;
5479   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5480
5481   {
5482     SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5));
5483     OPRND (dr) = opval;
5484     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5485   }
5486
5487 #undef OPRND
5488 #undef FLD
5489 }
5490   NEXT (vpc);
5491
5492 CASE (sem, INSN_WRITE_SLLI) : /* slli $dr,$uimm5 */
5493   {
5494     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5495     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5496 #define FLD(f) abuf->fields.sfmt_slli.f
5497 #define OPRND(f) par_exec->operands.sfmt_slli.f
5498     int UNUSED written = abuf->written;
5499     IADDR UNUSED pc = abuf->addr;
5500     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5501
5502   * FLD (i_dr) = OPRND (dr);
5503
5504 #undef OPRND
5505 #undef FLD
5506   }
5507   NEXT (vpc);
5508
5509   CASE (sem, INSN_PAR_SRA) : /* sra $dr,$sr */
5510 {
5511   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5512   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5513 #define FLD(f) abuf->fields.sfmt_add.f
5514 #define OPRND(f) par_exec->operands.sfmt_add.f
5515   int UNUSED written = 0;
5516   IADDR UNUSED pc = abuf->addr;
5517   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5518
5519   {
5520     SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
5521     OPRND (dr) = opval;
5522     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5523   }
5524
5525 #undef OPRND
5526 #undef FLD
5527 }
5528   NEXT (vpc);
5529
5530 CASE (sem, INSN_WRITE_SRA) : /* sra $dr,$sr */
5531   {
5532     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5533     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5534 #define FLD(f) abuf->fields.sfmt_add.f
5535 #define OPRND(f) par_exec->operands.sfmt_add.f
5536     int UNUSED written = abuf->written;
5537     IADDR UNUSED pc = abuf->addr;
5538     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5539
5540   * FLD (i_dr) = OPRND (dr);
5541
5542 #undef OPRND
5543 #undef FLD
5544   }
5545   NEXT (vpc);
5546
5547   CASE (sem, INSN_PAR_SRAI) : /* srai $dr,$uimm5 */
5548 {
5549   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5550   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5551 #define FLD(f) abuf->fields.sfmt_slli.f
5552 #define OPRND(f) par_exec->operands.sfmt_slli.f
5553   int UNUSED written = 0;
5554   IADDR UNUSED pc = abuf->addr;
5555   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5556
5557   {
5558     SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5));
5559     OPRND (dr) = opval;
5560     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5561   }
5562
5563 #undef OPRND
5564 #undef FLD
5565 }
5566   NEXT (vpc);
5567
5568 CASE (sem, INSN_WRITE_SRAI) : /* srai $dr,$uimm5 */
5569   {
5570     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5571     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5572 #define FLD(f) abuf->fields.sfmt_slli.f
5573 #define OPRND(f) par_exec->operands.sfmt_slli.f
5574     int UNUSED written = abuf->written;
5575     IADDR UNUSED pc = abuf->addr;
5576     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5577
5578   * FLD (i_dr) = OPRND (dr);
5579
5580 #undef OPRND
5581 #undef FLD
5582   }
5583   NEXT (vpc);
5584
5585   CASE (sem, INSN_PAR_SRL) : /* srl $dr,$sr */
5586 {
5587   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5588   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5589 #define FLD(f) abuf->fields.sfmt_add.f
5590 #define OPRND(f) par_exec->operands.sfmt_add.f
5591   int UNUSED written = 0;
5592   IADDR UNUSED pc = abuf->addr;
5593   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5594
5595   {
5596     SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
5597     OPRND (dr) = opval;
5598     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5599   }
5600
5601 #undef OPRND
5602 #undef FLD
5603 }
5604   NEXT (vpc);
5605
5606 CASE (sem, INSN_WRITE_SRL) : /* srl $dr,$sr */
5607   {
5608     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5609     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5610 #define FLD(f) abuf->fields.sfmt_add.f
5611 #define OPRND(f) par_exec->operands.sfmt_add.f
5612     int UNUSED written = abuf->written;
5613     IADDR UNUSED pc = abuf->addr;
5614     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5615
5616   * FLD (i_dr) = OPRND (dr);
5617
5618 #undef OPRND
5619 #undef FLD
5620   }
5621   NEXT (vpc);
5622
5623   CASE (sem, INSN_PAR_SRLI) : /* srli $dr,$uimm5 */
5624 {
5625   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5626   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5627 #define FLD(f) abuf->fields.sfmt_slli.f
5628 #define OPRND(f) par_exec->operands.sfmt_slli.f
5629   int UNUSED written = 0;
5630   IADDR UNUSED pc = abuf->addr;
5631   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5632
5633   {
5634     SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5));
5635     OPRND (dr) = opval;
5636     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5637   }
5638
5639 #undef OPRND
5640 #undef FLD
5641 }
5642   NEXT (vpc);
5643
5644 CASE (sem, INSN_WRITE_SRLI) : /* srli $dr,$uimm5 */
5645   {
5646     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5647     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5648 #define FLD(f) abuf->fields.sfmt_slli.f
5649 #define OPRND(f) par_exec->operands.sfmt_slli.f
5650     int UNUSED written = abuf->written;
5651     IADDR UNUSED pc = abuf->addr;
5652     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5653
5654   * FLD (i_dr) = OPRND (dr);
5655
5656 #undef OPRND
5657 #undef FLD
5658   }
5659   NEXT (vpc);
5660
5661   CASE (sem, INSN_PAR_ST) : /* st $src1,@$src2 */
5662 {
5663   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5664   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5665 #define FLD(f) abuf->fields.sfmt_st_plus.f
5666 #define OPRND(f) par_exec->operands.sfmt_st.f
5667   int UNUSED written = 0;
5668   IADDR UNUSED pc = abuf->addr;
5669   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5670
5671   {
5672     SI opval = * FLD (i_src1);
5673     OPRND (h_memory_SI_src2_idx) = * FLD (i_src2);
5674     OPRND (h_memory_SI_src2) = opval;
5675     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5676   }
5677
5678 #undef OPRND
5679 #undef FLD
5680 }
5681   NEXT (vpc);
5682
5683 CASE (sem, INSN_WRITE_ST) : /* st $src1,@$src2 */
5684   {
5685     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5686     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5687 #define FLD(f) abuf->fields.sfmt_st_plus.f
5688 #define OPRND(f) par_exec->operands.sfmt_st.f
5689     int UNUSED written = abuf->written;
5690     IADDR UNUSED pc = abuf->addr;
5691     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5692
5693   SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_src2_idx), OPRND (h_memory_SI_src2));
5694
5695 #undef OPRND
5696 #undef FLD
5697   }
5698   NEXT (vpc);
5699
5700   CASE (sem, INSN_PAR_STB) : /* stb $src1,@$src2 */
5701 {
5702   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5703   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5704 #define FLD(f) abuf->fields.sfmt_st_plus.f
5705 #define OPRND(f) par_exec->operands.sfmt_stb.f
5706   int UNUSED written = 0;
5707   IADDR UNUSED pc = abuf->addr;
5708   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5709
5710   {
5711     QI opval = * FLD (i_src1);
5712     OPRND (h_memory_QI_src2_idx) = * FLD (i_src2);
5713     OPRND (h_memory_QI_src2) = opval;
5714     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5715   }
5716
5717 #undef OPRND
5718 #undef FLD
5719 }
5720   NEXT (vpc);
5721
5722 CASE (sem, INSN_WRITE_STB) : /* stb $src1,@$src2 */
5723   {
5724     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5725     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5726 #define FLD(f) abuf->fields.sfmt_st_plus.f
5727 #define OPRND(f) par_exec->operands.sfmt_stb.f
5728     int UNUSED written = abuf->written;
5729     IADDR UNUSED pc = abuf->addr;
5730     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5731
5732   SETMEMQI (current_cpu, pc, OPRND (h_memory_QI_src2_idx), OPRND (h_memory_QI_src2));
5733
5734 #undef OPRND
5735 #undef FLD
5736   }
5737   NEXT (vpc);
5738
5739   CASE (sem, INSN_PAR_STH) : /* sth $src1,@$src2 */
5740 {
5741   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5742   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5743 #define FLD(f) abuf->fields.sfmt_st_plus.f
5744 #define OPRND(f) par_exec->operands.sfmt_sth.f
5745   int UNUSED written = 0;
5746   IADDR UNUSED pc = abuf->addr;
5747   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5748
5749   {
5750     HI opval = * FLD (i_src1);
5751     OPRND (h_memory_HI_src2_idx) = * FLD (i_src2);
5752     OPRND (h_memory_HI_src2) = opval;
5753     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5754   }
5755
5756 #undef OPRND
5757 #undef FLD
5758 }
5759   NEXT (vpc);
5760
5761 CASE (sem, INSN_WRITE_STH) : /* sth $src1,@$src2 */
5762   {
5763     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5764     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5765 #define FLD(f) abuf->fields.sfmt_st_plus.f
5766 #define OPRND(f) par_exec->operands.sfmt_sth.f
5767     int UNUSED written = abuf->written;
5768     IADDR UNUSED pc = abuf->addr;
5769     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5770
5771   SETMEMHI (current_cpu, pc, OPRND (h_memory_HI_src2_idx), OPRND (h_memory_HI_src2));
5772
5773 #undef OPRND
5774 #undef FLD
5775   }
5776   NEXT (vpc);
5777
5778   CASE (sem, INSN_PAR_ST_PLUS) : /* st $src1,@+$src2 */
5779 {
5780   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5781   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5782 #define FLD(f) abuf->fields.sfmt_st_plus.f
5783 #define OPRND(f) par_exec->operands.sfmt_st_plus.f
5784   int UNUSED written = 0;
5785   IADDR UNUSED pc = abuf->addr;
5786   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5787
5788 {
5789   SI tmp_new_src2;
5790   tmp_new_src2 = ADDSI (* FLD (i_src2), 4);
5791   {
5792     SI opval = * FLD (i_src1);
5793     OPRND (h_memory_SI_new_src2_idx) = tmp_new_src2;
5794     OPRND (h_memory_SI_new_src2) = opval;
5795     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5796   }
5797   {
5798     SI opval = tmp_new_src2;
5799     OPRND (src2) = opval;
5800     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5801   }
5802 }
5803
5804 #undef OPRND
5805 #undef FLD
5806 }
5807   NEXT (vpc);
5808
5809 CASE (sem, INSN_WRITE_ST_PLUS) : /* st $src1,@+$src2 */
5810   {
5811     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5812     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5813 #define FLD(f) abuf->fields.sfmt_st_plus.f
5814 #define OPRND(f) par_exec->operands.sfmt_st_plus.f
5815     int UNUSED written = abuf->written;
5816     IADDR UNUSED pc = abuf->addr;
5817     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5818
5819   SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_new_src2_idx), OPRND (h_memory_SI_new_src2));
5820   * FLD (i_src2) = OPRND (src2);
5821
5822 #undef OPRND
5823 #undef FLD
5824   }
5825   NEXT (vpc);
5826
5827   CASE (sem, INSN_PAR_STH_PLUS) : /* sth $src1,@$src2+ */
5828 {
5829   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5830   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5831 #define FLD(f) abuf->fields.sfmt_st_plus.f
5832 #define OPRND(f) par_exec->operands.sfmt_sth_plus.f
5833   int UNUSED written = 0;
5834   IADDR UNUSED pc = abuf->addr;
5835   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5836
5837 {
5838   SI tmp_new_src2;
5839   tmp_new_src2 = * FLD (i_src2);
5840   {
5841     HI opval = * FLD (i_src1);
5842     OPRND (h_memory_HI_new_src2_idx) = tmp_new_src2;
5843     OPRND (h_memory_HI_new_src2) = opval;
5844     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5845   }
5846   {
5847     SI opval = ADDSI (tmp_new_src2, 2);
5848     OPRND (src2) = opval;
5849     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5850   }
5851 }
5852
5853 #undef OPRND
5854 #undef FLD
5855 }
5856   NEXT (vpc);
5857
5858 CASE (sem, INSN_WRITE_STH_PLUS) : /* sth $src1,@$src2+ */
5859   {
5860     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5861     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5862 #define FLD(f) abuf->fields.sfmt_st_plus.f
5863 #define OPRND(f) par_exec->operands.sfmt_sth_plus.f
5864     int UNUSED written = abuf->written;
5865     IADDR UNUSED pc = abuf->addr;
5866     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5867
5868   SETMEMHI (current_cpu, pc, OPRND (h_memory_HI_new_src2_idx), OPRND (h_memory_HI_new_src2));
5869   * FLD (i_src2) = OPRND (src2);
5870
5871 #undef OPRND
5872 #undef FLD
5873   }
5874   NEXT (vpc);
5875
5876   CASE (sem, INSN_PAR_STB_PLUS) : /* stb $src1,@$src2+ */
5877 {
5878   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5879   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5880 #define FLD(f) abuf->fields.sfmt_st_plus.f
5881 #define OPRND(f) par_exec->operands.sfmt_stb_plus.f
5882   int UNUSED written = 0;
5883   IADDR UNUSED pc = abuf->addr;
5884   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5885
5886 {
5887   SI tmp_new_src2;
5888   tmp_new_src2 = * FLD (i_src2);
5889   {
5890     QI opval = * FLD (i_src1);
5891     OPRND (h_memory_QI_new_src2_idx) = tmp_new_src2;
5892     OPRND (h_memory_QI_new_src2) = opval;
5893     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5894   }
5895   {
5896     SI opval = ADDSI (tmp_new_src2, 1);
5897     OPRND (src2) = opval;
5898     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5899   }
5900 }
5901
5902 #undef OPRND
5903 #undef FLD
5904 }
5905   NEXT (vpc);
5906
5907 CASE (sem, INSN_WRITE_STB_PLUS) : /* stb $src1,@$src2+ */
5908   {
5909     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5910     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5911 #define FLD(f) abuf->fields.sfmt_st_plus.f
5912 #define OPRND(f) par_exec->operands.sfmt_stb_plus.f
5913     int UNUSED written = abuf->written;
5914     IADDR UNUSED pc = abuf->addr;
5915     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5916
5917   SETMEMQI (current_cpu, pc, OPRND (h_memory_QI_new_src2_idx), OPRND (h_memory_QI_new_src2));
5918   * FLD (i_src2) = OPRND (src2);
5919
5920 #undef OPRND
5921 #undef FLD
5922   }
5923   NEXT (vpc);
5924
5925   CASE (sem, INSN_PAR_ST_MINUS) : /* st $src1,@-$src2 */
5926 {
5927   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5928   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5929 #define FLD(f) abuf->fields.sfmt_st_plus.f
5930 #define OPRND(f) par_exec->operands.sfmt_st_plus.f
5931   int UNUSED written = 0;
5932   IADDR UNUSED pc = abuf->addr;
5933   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5934
5935 {
5936   SI tmp_new_src2;
5937   tmp_new_src2 = SUBSI (* FLD (i_src2), 4);
5938   {
5939     SI opval = * FLD (i_src1);
5940     OPRND (h_memory_SI_new_src2_idx) = tmp_new_src2;
5941     OPRND (h_memory_SI_new_src2) = opval;
5942     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5943   }
5944   {
5945     SI opval = tmp_new_src2;
5946     OPRND (src2) = opval;
5947     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5948   }
5949 }
5950
5951 #undef OPRND
5952 #undef FLD
5953 }
5954   NEXT (vpc);
5955
5956 CASE (sem, INSN_WRITE_ST_MINUS) : /* st $src1,@-$src2 */
5957   {
5958     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5959     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5960 #define FLD(f) abuf->fields.sfmt_st_plus.f
5961 #define OPRND(f) par_exec->operands.sfmt_st_plus.f
5962     int UNUSED written = abuf->written;
5963     IADDR UNUSED pc = abuf->addr;
5964     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5965
5966   SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_new_src2_idx), OPRND (h_memory_SI_new_src2));
5967   * FLD (i_src2) = OPRND (src2);
5968
5969 #undef OPRND
5970 #undef FLD
5971   }
5972   NEXT (vpc);
5973
5974   CASE (sem, INSN_PAR_SUB) : /* sub $dr,$sr */
5975 {
5976   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5977   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5978 #define FLD(f) abuf->fields.sfmt_add.f
5979 #define OPRND(f) par_exec->operands.sfmt_add.f
5980   int UNUSED written = 0;
5981   IADDR UNUSED pc = abuf->addr;
5982   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5983
5984   {
5985     SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr));
5986     OPRND (dr) = opval;
5987     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5988   }
5989
5990 #undef OPRND
5991 #undef FLD
5992 }
5993   NEXT (vpc);
5994
5995 CASE (sem, INSN_WRITE_SUB) : /* sub $dr,$sr */
5996   {
5997     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5998     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5999 #define FLD(f) abuf->fields.sfmt_add.f
6000 #define OPRND(f) par_exec->operands.sfmt_add.f
6001     int UNUSED written = abuf->written;
6002     IADDR UNUSED pc = abuf->addr;
6003     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6004
6005   * FLD (i_dr) = OPRND (dr);
6006
6007 #undef OPRND
6008 #undef FLD
6009   }
6010   NEXT (vpc);
6011
6012   CASE (sem, INSN_PAR_SUBV) : /* subv $dr,$sr */
6013 {
6014   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6015   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6016 #define FLD(f) abuf->fields.sfmt_add.f
6017 #define OPRND(f) par_exec->operands.sfmt_addv.f
6018   int UNUSED written = 0;
6019   IADDR UNUSED pc = abuf->addr;
6020   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6021
6022 {
6023   SI temp0;BI temp1;
6024   temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr));
6025   temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0);
6026   {
6027     SI opval = temp0;
6028     OPRND (dr) = opval;
6029     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6030   }
6031   {
6032     BI opval = temp1;
6033     OPRND (condbit) = opval;
6034     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
6035   }
6036 }
6037
6038 #undef OPRND
6039 #undef FLD
6040 }
6041   NEXT (vpc);
6042
6043 CASE (sem, INSN_WRITE_SUBV) : /* subv $dr,$sr */
6044   {
6045     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6046     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6047 #define FLD(f) abuf->fields.sfmt_add.f
6048 #define OPRND(f) par_exec->operands.sfmt_addv.f
6049     int UNUSED written = abuf->written;
6050     IADDR UNUSED pc = abuf->addr;
6051     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6052
6053   CPU (h_cond) = OPRND (condbit);
6054   * FLD (i_dr) = OPRND (dr);
6055
6056 #undef OPRND
6057 #undef FLD
6058   }
6059   NEXT (vpc);
6060
6061   CASE (sem, INSN_PAR_SUBX) : /* subx $dr,$sr */
6062 {
6063   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6064   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6065 #define FLD(f) abuf->fields.sfmt_add.f
6066 #define OPRND(f) par_exec->operands.sfmt_addx.f
6067   int UNUSED written = 0;
6068   IADDR UNUSED pc = abuf->addr;
6069   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6070
6071 {
6072   SI temp0;BI temp1;
6073   temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
6074   temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
6075   {
6076     SI opval = temp0;
6077     OPRND (dr) = opval;
6078     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6079   }
6080   {
6081     BI opval = temp1;
6082     OPRND (condbit) = opval;
6083     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
6084   }
6085 }
6086
6087 #undef OPRND
6088 #undef FLD
6089 }
6090   NEXT (vpc);
6091
6092 CASE (sem, INSN_WRITE_SUBX) : /* subx $dr,$sr */
6093   {
6094     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6095     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6096 #define FLD(f) abuf->fields.sfmt_add.f
6097 #define OPRND(f) par_exec->operands.sfmt_addx.f
6098     int UNUSED written = abuf->written;
6099     IADDR UNUSED pc = abuf->addr;
6100     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6101
6102   CPU (h_cond) = OPRND (condbit);
6103   * FLD (i_dr) = OPRND (dr);
6104
6105 #undef OPRND
6106 #undef FLD
6107   }
6108   NEXT (vpc);
6109
6110   CASE (sem, INSN_PAR_TRAP) : /* trap $uimm4 */
6111 {
6112   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6113   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6114 #define FLD(f) abuf->fields.sfmt_trap.f
6115 #define OPRND(f) par_exec->operands.sfmt_trap.f
6116   int UNUSED written = 0;
6117   IADDR UNUSED pc = abuf->addr;
6118   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6119
6120 {
6121   {
6122     USI opval = GET_H_CR (((UINT) 6));
6123     OPRND (h_cr_USI_14) = opval;
6124     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
6125   }
6126   {
6127     USI opval = ADDSI (pc, 4);
6128     OPRND (h_cr_USI_6) = opval;
6129     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
6130   }
6131   {
6132     UQI opval = CPU (h_bpsw);
6133     OPRND (h_bbpsw_UQI) = opval;
6134     TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval);
6135   }
6136   {
6137     UQI opval = GET_H_PSW ();
6138     OPRND (h_bpsw_UQI) = opval;
6139     TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
6140   }
6141   {
6142     UQI opval = ANDQI (GET_H_PSW (), 128);
6143     OPRND (h_psw_UQI) = opval;
6144     TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
6145   }
6146   {
6147     SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4));
6148     OPRND (pc) = opval;
6149     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6150   }
6151 }
6152
6153 #undef OPRND
6154 #undef FLD
6155 }
6156   NEXT (vpc);
6157
6158 CASE (sem, INSN_WRITE_TRAP) : /* trap $uimm4 */
6159   {
6160     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6161     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6162 #define FLD(f) abuf->fields.sfmt_trap.f
6163 #define OPRND(f) par_exec->operands.sfmt_trap.f
6164     int UNUSED written = abuf->written;
6165     IADDR UNUSED pc = abuf->addr;
6166     SEM_BRANCH_INIT
6167     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6168
6169   CPU (h_bbpsw) = OPRND (h_bbpsw_UQI);
6170   CPU (h_bpsw) = OPRND (h_bpsw_UQI);
6171   SET_H_CR (((UINT) 14), OPRND (h_cr_USI_14));
6172   SET_H_CR (((UINT) 6), OPRND (h_cr_USI_6));
6173   SET_H_PSW (OPRND (h_psw_UQI));
6174   SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
6175
6176   SEM_BRANCH_FINI (vpc);
6177 #undef OPRND
6178 #undef FLD
6179   }
6180   NEXT (vpc);
6181
6182   CASE (sem, INSN_PAR_UNLOCK) : /* unlock $src1,@$src2 */
6183 {
6184   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6185   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6186 #define FLD(f) abuf->fields.sfmt_st_plus.f
6187 #define OPRND(f) par_exec->operands.sfmt_unlock.f
6188   int UNUSED written = 0;
6189   IADDR UNUSED pc = abuf->addr;
6190   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6191
6192 {
6193 if (CPU (h_lock)) {
6194   {
6195     SI opval = * FLD (i_src1);
6196     OPRND (h_memory_SI_src2_idx) = * FLD (i_src2);
6197     OPRND (h_memory_SI_src2) = opval;
6198     written |= (1 << 4);
6199     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
6200   }
6201 }
6202   {
6203     BI opval = 0;
6204     OPRND (h_lock_BI) = opval;
6205     TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
6206   }
6207 }
6208
6209   abuf->written = written;
6210 #undef OPRND
6211 #undef FLD
6212 }
6213   NEXT (vpc);
6214
6215 CASE (sem, INSN_WRITE_UNLOCK) : /* unlock $src1,@$src2 */
6216   {
6217     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6218     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6219 #define FLD(f) abuf->fields.sfmt_st_plus.f
6220 #define OPRND(f) par_exec->operands.sfmt_unlock.f
6221     int UNUSED written = abuf->written;
6222     IADDR UNUSED pc = abuf->addr;
6223     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6224
6225   CPU (h_lock) = OPRND (h_lock_BI);
6226   if (written & (1 << 4))
6227     {
6228       SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_src2_idx), OPRND (h_memory_SI_src2));
6229     }
6230
6231 #undef OPRND
6232 #undef FLD
6233   }
6234   NEXT (vpc);
6235
6236   CASE (sem, INSN_PAR_PCMPBZ) : /* pcmpbz $src2 */
6237 {
6238   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6239   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6240 #define FLD(f) abuf->fields.sfmt_st_plus.f
6241 #define OPRND(f) par_exec->operands.sfmt_cmpz.f
6242   int UNUSED written = 0;
6243   IADDR UNUSED pc = abuf->addr;
6244   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6245
6246   {
6247     BI opval = (EQSI (ANDSI (* FLD (i_src2), 255), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 65280), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 0xff000000), 0)) ? (1) : (0);
6248     OPRND (condbit) = opval;
6249     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
6250   }
6251
6252 #undef OPRND
6253 #undef FLD
6254 }
6255   NEXT (vpc);
6256
6257 CASE (sem, INSN_WRITE_PCMPBZ) : /* pcmpbz $src2 */
6258   {
6259     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6260     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6261 #define FLD(f) abuf->fields.sfmt_st_plus.f
6262 #define OPRND(f) par_exec->operands.sfmt_cmpz.f
6263     int UNUSED written = abuf->written;
6264     IADDR UNUSED pc = abuf->addr;
6265     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6266
6267   CPU (h_cond) = OPRND (condbit);
6268
6269 #undef OPRND
6270 #undef FLD
6271   }
6272   NEXT (vpc);
6273
6274   CASE (sem, INSN_PAR_SADD) : /* sadd */
6275 {
6276   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6277   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6278 #define FLD(f) abuf->fields.fmt_empty.f
6279 #define OPRND(f) par_exec->operands.sfmt_sadd.f
6280   int UNUSED written = 0;
6281   IADDR UNUSED pc = abuf->addr;
6282   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6283
6284   {
6285     DI opval = ADDDI (SRADI (GET_H_ACCUMS (((UINT) 1)), 16), GET_H_ACCUMS (((UINT) 0)));
6286     OPRND (h_accums_DI_0) = opval;
6287     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
6288   }
6289
6290 #undef OPRND
6291 #undef FLD
6292 }
6293   NEXT (vpc);
6294
6295 CASE (sem, INSN_WRITE_SADD) : /* sadd */
6296   {
6297     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6298     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6299 #define FLD(f) abuf->fields.fmt_empty.f
6300 #define OPRND(f) par_exec->operands.sfmt_sadd.f
6301     int UNUSED written = abuf->written;
6302     IADDR UNUSED pc = abuf->addr;
6303     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6304
6305   SET_H_ACCUMS (((UINT) 0), OPRND (h_accums_DI_0));
6306
6307 #undef OPRND
6308 #undef FLD
6309   }
6310   NEXT (vpc);
6311
6312   CASE (sem, INSN_PAR_MACWU1) : /* macwu1 $src1,$src2 */
6313 {
6314   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6315   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6316 #define FLD(f) abuf->fields.sfmt_st_plus.f
6317 #define OPRND(f) par_exec->operands.sfmt_macwu1.f
6318   int UNUSED written = 0;
6319   IADDR UNUSED pc = abuf->addr;
6320   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6321
6322   {
6323     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535)))), 8), 8);
6324     OPRND (h_accums_DI_1) = opval;
6325     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
6326   }
6327
6328 #undef OPRND
6329 #undef FLD
6330 }
6331   NEXT (vpc);
6332
6333 CASE (sem, INSN_WRITE_MACWU1) : /* macwu1 $src1,$src2 */
6334   {
6335     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6336     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6337 #define FLD(f) abuf->fields.sfmt_st_plus.f
6338 #define OPRND(f) par_exec->operands.sfmt_macwu1.f
6339     int UNUSED written = abuf->written;
6340     IADDR UNUSED pc = abuf->addr;
6341     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6342
6343   SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_DI_1));
6344
6345 #undef OPRND
6346 #undef FLD
6347   }
6348   NEXT (vpc);
6349
6350   CASE (sem, INSN_PAR_MSBLO) : /* msblo $src1,$src2 */
6351 {
6352   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6353   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6354 #define FLD(f) abuf->fields.sfmt_st_plus.f
6355 #define OPRND(f) par_exec->operands.sfmt_msblo.f
6356   int UNUSED written = 0;
6357   IADDR UNUSED pc = abuf->addr;
6358   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6359
6360   {
6361     DI opval = SRADI (SLLDI (SUBDI (GET_H_ACCUM (), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (* FLD (i_src1))), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 32), 16)), 8), 8);
6362     OPRND (accum) = opval;
6363     TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
6364   }
6365
6366 #undef OPRND
6367 #undef FLD
6368 }
6369   NEXT (vpc);
6370
6371 CASE (sem, INSN_WRITE_MSBLO) : /* msblo $src1,$src2 */
6372   {
6373     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6374     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6375 #define FLD(f) abuf->fields.sfmt_st_plus.f
6376 #define OPRND(f) par_exec->operands.sfmt_msblo.f
6377     int UNUSED written = abuf->written;
6378     IADDR UNUSED pc = abuf->addr;
6379     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6380
6381   SET_H_ACCUM (OPRND (accum));
6382
6383 #undef OPRND
6384 #undef FLD
6385   }
6386   NEXT (vpc);
6387
6388   CASE (sem, INSN_PAR_MULWU1) : /* mulwu1 $src1,$src2 */
6389 {
6390   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6391   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6392 #define FLD(f) abuf->fields.sfmt_st_plus.f
6393 #define OPRND(f) par_exec->operands.sfmt_mulwu1.f
6394   int UNUSED written = 0;
6395   IADDR UNUSED pc = abuf->addr;
6396   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6397
6398   {
6399     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535))), 16), 16);
6400     OPRND (h_accums_DI_1) = opval;
6401     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
6402   }
6403
6404 #undef OPRND
6405 #undef FLD
6406 }
6407   NEXT (vpc);
6408
6409 CASE (sem, INSN_WRITE_MULWU1) : /* mulwu1 $src1,$src2 */
6410   {
6411     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6412     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6413 #define FLD(f) abuf->fields.sfmt_st_plus.f
6414 #define OPRND(f) par_exec->operands.sfmt_mulwu1.f
6415     int UNUSED written = abuf->written;
6416     IADDR UNUSED pc = abuf->addr;
6417     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6418
6419   SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_DI_1));
6420
6421 #undef OPRND
6422 #undef FLD
6423   }
6424   NEXT (vpc);
6425
6426   CASE (sem, INSN_PAR_MACLH1) : /* maclh1 $src1,$src2 */
6427 {
6428   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6429   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6430 #define FLD(f) abuf->fields.sfmt_st_plus.f
6431 #define OPRND(f) par_exec->operands.sfmt_macwu1.f
6432   int UNUSED written = 0;
6433   IADDR UNUSED pc = abuf->addr;
6434   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6435
6436   {
6437     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (* FLD (i_src1))), SRASI (* FLD (i_src2), 16))), 16)), 8), 8);
6438     OPRND (h_accums_DI_1) = opval;
6439     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
6440   }
6441
6442 #undef OPRND
6443 #undef FLD
6444 }
6445   NEXT (vpc);
6446
6447 CASE (sem, INSN_WRITE_MACLH1) : /* maclh1 $src1,$src2 */
6448   {
6449     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6450     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6451 #define FLD(f) abuf->fields.sfmt_st_plus.f
6452 #define OPRND(f) par_exec->operands.sfmt_macwu1.f
6453     int UNUSED written = abuf->written;
6454     IADDR UNUSED pc = abuf->addr;
6455     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6456
6457   SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_DI_1));
6458
6459 #undef OPRND
6460 #undef FLD
6461   }
6462   NEXT (vpc);
6463
6464   CASE (sem, INSN_PAR_SC) : /* sc */
6465 {
6466   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6467   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6468 #define FLD(f) abuf->fields.fmt_empty.f
6469 #define OPRND(f) par_exec->operands.sfmt_sc.f
6470   int UNUSED written = 0;
6471   IADDR UNUSED pc = abuf->addr;
6472   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6473
6474 if (ZEXTBISI (CPU (h_cond)))
6475   SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
6476
6477 #undef OPRND
6478 #undef FLD
6479 }
6480   NEXT (vpc);
6481
6482 CASE (sem, INSN_WRITE_SC) : /* sc */
6483   {
6484     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6485     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6486 #define FLD(f) abuf->fields.fmt_empty.f
6487 #define OPRND(f) par_exec->operands.sfmt_sc.f
6488     int UNUSED written = abuf->written;
6489     IADDR UNUSED pc = abuf->addr;
6490     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6491
6492
6493 #undef OPRND
6494 #undef FLD
6495   }
6496   NEXT (vpc);
6497
6498   CASE (sem, INSN_PAR_SNC) : /* snc */
6499 {
6500   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6501   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6502 #define FLD(f) abuf->fields.fmt_empty.f
6503 #define OPRND(f) par_exec->operands.sfmt_sc.f
6504   int UNUSED written = 0;
6505   IADDR UNUSED pc = abuf->addr;
6506   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6507
6508 if (ZEXTBISI (NOTBI (CPU (h_cond))))
6509   SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
6510
6511 #undef OPRND
6512 #undef FLD
6513 }
6514   NEXT (vpc);
6515
6516 CASE (sem, INSN_WRITE_SNC) : /* snc */
6517   {
6518     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6519     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6520 #define FLD(f) abuf->fields.fmt_empty.f
6521 #define OPRND(f) par_exec->operands.sfmt_sc.f
6522     int UNUSED written = abuf->written;
6523     IADDR UNUSED pc = abuf->addr;
6524     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6525
6526
6527 #undef OPRND
6528 #undef FLD
6529   }
6530   NEXT (vpc);
6531
6532   CASE (sem, INSN_PAR_CLRPSW) : /* clrpsw $uimm8 */
6533 {
6534   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6535   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6536 #define FLD(f) abuf->fields.sfmt_clrpsw.f
6537 #define OPRND(f) par_exec->operands.sfmt_clrpsw.f
6538   int UNUSED written = 0;
6539   IADDR UNUSED pc = abuf->addr;
6540   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6541
6542   {
6543     USI opval = ANDSI (GET_H_CR (((UINT) 0)), ORSI (ZEXTQISI (INVQI (FLD (f_uimm8))), 65280));
6544     OPRND (h_cr_USI_0) = opval;
6545     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
6546   }
6547
6548 #undef OPRND
6549 #undef FLD
6550 }
6551   NEXT (vpc);
6552
6553 CASE (sem, INSN_WRITE_CLRPSW) : /* clrpsw $uimm8 */
6554   {
6555     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6556     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6557 #define FLD(f) abuf->fields.sfmt_clrpsw.f
6558 #define OPRND(f) par_exec->operands.sfmt_clrpsw.f
6559     int UNUSED written = abuf->written;
6560     IADDR UNUSED pc = abuf->addr;
6561     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6562
6563   SET_H_CR (((UINT) 0), OPRND (h_cr_USI_0));
6564
6565 #undef OPRND
6566 #undef FLD
6567   }
6568   NEXT (vpc);
6569
6570   CASE (sem, INSN_PAR_SETPSW) : /* setpsw $uimm8 */
6571 {
6572   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6573   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6574 #define FLD(f) abuf->fields.sfmt_clrpsw.f
6575 #define OPRND(f) par_exec->operands.sfmt_setpsw.f
6576   int UNUSED written = 0;
6577   IADDR UNUSED pc = abuf->addr;
6578   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6579
6580   {
6581     USI opval = FLD (f_uimm8);
6582     OPRND (h_cr_USI_0) = opval;
6583     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
6584   }
6585
6586 #undef OPRND
6587 #undef FLD
6588 }
6589   NEXT (vpc);
6590
6591 CASE (sem, INSN_WRITE_SETPSW) : /* setpsw $uimm8 */
6592   {
6593     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6594     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6595 #define FLD(f) abuf->fields.sfmt_clrpsw.f
6596 #define OPRND(f) par_exec->operands.sfmt_setpsw.f
6597     int UNUSED written = abuf->written;
6598     IADDR UNUSED pc = abuf->addr;
6599     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6600
6601   SET_H_CR (((UINT) 0), OPRND (h_cr_USI_0));
6602
6603 #undef OPRND
6604 #undef FLD
6605   }
6606   NEXT (vpc);
6607
6608   CASE (sem, INSN_PAR_BTST) : /* btst $uimm3,$sr */
6609 {
6610   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6611   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6612 #define FLD(f) abuf->fields.sfmt_bset.f
6613 #define OPRND(f) par_exec->operands.sfmt_btst.f
6614   int UNUSED written = 0;
6615   IADDR UNUSED pc = abuf->addr;
6616   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6617
6618   {
6619     BI opval = ANDQI (SRLQI (* FLD (i_sr), SUBSI (7, FLD (f_uimm3))), 1);
6620     OPRND (condbit) = opval;
6621     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
6622   }
6623
6624 #undef OPRND
6625 #undef FLD
6626 }
6627   NEXT (vpc);
6628
6629 CASE (sem, INSN_WRITE_BTST) : /* btst $uimm3,$sr */
6630   {
6631     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6632     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6633 #define FLD(f) abuf->fields.sfmt_bset.f
6634 #define OPRND(f) par_exec->operands.sfmt_btst.f
6635     int UNUSED written = abuf->written;
6636     IADDR UNUSED pc = abuf->addr;
6637     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6638
6639   CPU (h_cond) = OPRND (condbit);
6640
6641 #undef OPRND
6642 #undef FLD
6643   }
6644   NEXT (vpc);
6645
6646
6647     }
6648   ENDSWITCH (sem) /* End of semantic switch.  */
6649
6650   /* At this point `vpc' contains the next insn to execute.  */
6651 }
6652
6653 #undef DEFINE_SWITCH
6654 #endif /* DEFINE_SWITCH */