sim/m32r/sim-if.c

   1 /* Main simulator entry points specific to the M32R.
   2    Copyright (C) 1996-2022 Free Software Foundation, Inc.
   3    Contributed by Cygnus Support.
   4
   5    This file is part of GDB, the GNU debugger.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  19
  20 /* This must come before any other includes.  */
  21 #include "defs.h"
  22
  23 #include <string.h>
  24 #include <stdlib.h>
  25
  26 #include "sim/callback.h"
  27 #include "sim-main.h"
  28 #include "sim-options.h"
  29 #include "libiberty.h"
  30 #include "bfd.h"
  31
  32 #include "dv-m32r_uart.h"
  33
  34 #define M32R_DEFAULT_MEM_SIZE 0x2000000 /* 32M */
  35
  36 static void free_state (SIM_DESC);
  37 static void print_m32r_misc_cpu (SIM_CPU *cpu, int verbose);
  38 \f
  39 /* Cover function of sim_state_free to free the cpu buffers as well.  */
  40
  41 static void
  42 free_state (SIM_DESC sd)
  43 {
  44   if (STATE_MODULES (sd) != NULL)
  45     sim_module_uninstall (sd);
  46   sim_cpu_free_all (sd);
  47   sim_state_free (sd);
  48 }
  49
  50 extern const SIM_MACH * const m32r_sim_machs[];
  51
  52 /* Create an instance of the simulator.  */
  53
  54 SIM_DESC
  55 sim_open (SIM_OPEN_KIND kind, host_callback *callback, struct bfd *abfd,
  56           char * const *argv)
  57 {
  58   SIM_DESC sd = sim_state_alloc (kind, callback);
  59   char c;
  60   int i;
  61
  62   /* Set default options before parsing user options.  */
  63   STATE_MACHS (sd) = m32r_sim_machs;
  64   STATE_MODEL_NAME (sd) = "m32r/d";
  65   current_alignment = STRICT_ALIGNMENT;
  66   current_target_byte_order = BFD_ENDIAN_BIG;
  67
  68   /* The cpu data is kept in a separately allocated chunk of memory.  */
  69   if (sim_cpu_alloc_all (sd, 1) != SIM_RC_OK)
  70     {
  71       free_state (sd);
  72       return 0;
  73     }
  74
  75   if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
  76     {
  77       free_state (sd);
  78       return 0;
  79     }
  80
  81   /* The parser will print an error message for us, so we silently return.  */
  82   if (sim_parse_args (sd, argv) != SIM_RC_OK)
  83     {
  84       free_state (sd);
  85       return 0;
  86     }
  87
  88   /* Allocate a handler for the control registers and other devices
  89      if no memory for that range has been allocated by the user.
  90      All are allocated in one chunk to keep things from being
  91      unnecessarily complicated.
  92      TODO: Move these to the sim-model framework.  */
  93   sim_hw_parse (sd, "/core/%s/reg %#x %i", "m32r_uart", UART_BASE_ADDR, 0x100);
  94   sim_hw_parse (sd, "/core/%s/reg %#x %i", "m32r_cache", 0xfffffff0, 0x10);
  95
  96   /* Allocate core managed memory if none specified by user.
  97      Use address 4 here in case the user wanted address 0 unmapped.  */
  98   if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0)
  99     sim_do_commandf (sd, "memory region 0,0x%x", M32R_DEFAULT_MEM_SIZE);
 100
 101   /* check for/establish the reference program image */
 102   if (sim_analyze_program (sd, STATE_PROG_FILE (sd), abfd) != SIM_RC_OK)
 103     {
 104       free_state (sd);
 105       return 0;
 106     }
 107
 108   /* Establish any remaining configuration options.  */
 109   if (sim_config (sd) != SIM_RC_OK)
 110     {
 111       free_state (sd);
 112       return 0;
 113     }
 114
 115   if (sim_post_argv_init (sd) != SIM_RC_OK)
 116     {
 117       free_state (sd);
 118       return 0;
 119     }
 120
 121   /* Open a copy of the cpu descriptor table.  */
 122   {
 123     CGEN_CPU_DESC cd = m32r_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name,
 124                                              CGEN_ENDIAN_BIG);
 125     for (i = 0; i < MAX_NR_PROCESSORS; ++i)
 126       {
 127         SIM_CPU *cpu = STATE_CPU (sd, i);
 128         CPU_CPU_DESC (cpu) = cd;
 129         CPU_DISASSEMBLER (cpu) = sim_cgen_disassemble_insn;
 130       }
 131     m32r_cgen_init_dis (cd);
 132   }
 133
 134   for (c = 0; c < MAX_NR_PROCESSORS; ++c)
 135     {
 136       /* Only needed for profiling, but the structure member is small.  */
 137       memset (CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i)), 0,
 138               sizeof (* CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i))));
 139       /* Hook in callback for reporting these stats */
 140       PROFILE_INFO_CPU_CALLBACK (CPU_PROFILE_DATA (STATE_CPU (sd, i)))
 141         = print_m32r_misc_cpu;
 142     }
 143
 144   return sd;
 145 }
 146 \f
 147 SIM_RC
 148 sim_create_inferior (SIM_DESC sd, struct bfd *abfd, char * const *argv,
 149                      char * const *env)
 150 {
 151   SIM_CPU *current_cpu = STATE_CPU (sd, 0);
 152   host_callback *cb = STATE_CALLBACK (sd);
 153   SIM_ADDR addr;
 154
 155   if (abfd != NULL)
 156     addr = bfd_get_start_address (abfd);
 157   else
 158     addr = 0;
 159   sim_pc_set (current_cpu, addr);
 160
 161   if (STATE_ENVIRONMENT (sd) == USER_ENVIRONMENT)
 162     {
 163       m32rbf_h_cr_set (current_cpu,
 164                        m32r_decode_gdb_ctrl_regnum(SPI_REGNUM), 0x1f00000);
 165       m32rbf_h_cr_set (current_cpu,
 166                        m32r_decode_gdb_ctrl_regnum(SPU_REGNUM), 0x1f00000);
 167     }
 168
 169   /* Standalone mode (i.e. `run`) will take care of the argv for us in
 170      sim_open() -> sim_parse_args().  But in debug mode (i.e. 'target sim'
 171      with `gdb`), we need to handle it because the user can change the
 172      argv on the fly via gdb's 'run'.  */
 173   if (STATE_PROG_ARGV (sd) != argv)
 174     {
 175       freeargv (STATE_PROG_ARGV (sd));
 176       STATE_PROG_ARGV (sd) = dupargv (argv);
 177     }
 178
 179   if (STATE_PROG_ENVP (sd) != env)
 180     {
 181       freeargv (STATE_PROG_ENVP (sd));
 182       STATE_PROG_ENVP (sd) = dupargv (env);
 183     }
 184
 185   cb->argv = STATE_PROG_ARGV (sd);
 186   cb->envp = STATE_PROG_ENVP (sd);
 187
 188   return SIM_RC_OK;
 189 }
 190
 191 /* PROFILE_CPU_CALLBACK */
 192
 193 static void
 194 print_m32r_misc_cpu (SIM_CPU *cpu, int verbose)
 195 {
 196   SIM_DESC sd = CPU_STATE (cpu);
 197   char buf[20];
 198
 199   if (CPU_PROFILE_FLAGS (cpu) [PROFILE_INSN_IDX])
 200     {
 201       sim_io_printf (sd, "Miscellaneous Statistics\n\n");
 202       sim_io_printf (sd, "  %-*s %s\n\n",
 203                      PROFILE_LABEL_WIDTH, "Fill nops:",
 204                      sim_add_commas (buf, sizeof (buf),
 205                                      CPU_M32R_MISC_PROFILE (cpu)->fillnop_count));
 206       if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32rx)
 207         sim_io_printf (sd, "  %-*s %s\n\n",
 208                        PROFILE_LABEL_WIDTH, "Parallel insns:",
 209                        sim_add_commas (buf, sizeof (buf),
 210                                        CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
 211       if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32r2)
 212         sim_io_printf (sd, "  %-*s %s\n\n",
 213                        PROFILE_LABEL_WIDTH, "Parallel insns:",
 214                        sim_add_commas (buf, sizeof (buf),
 215                                        CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
 216     }
 217 }