sim: iq2000/m32r/lm32/sh64: delete dead option code
[binutils-gdb.git] / sim / m32r / sim-if.c
1 /* Main simulator entry points specific to the M32R.
2 Copyright (C) 1996-2016 Free Software Foundation, Inc.
3 Contributed by Cygnus Support.
4
5 This file is part of GDB, the GNU debugger.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20 #include "sim-main.h"
21 #include "sim-options.h"
22 #include "libiberty.h"
23 #include "bfd.h"
24
25 #ifdef HAVE_STRING_H
26 #include <string.h>
27 #else
28 #ifdef HAVE_STRINGS_H
29 #include <strings.h>
30 #endif
31 #endif
32 #ifdef HAVE_STDLIB_H
33 #include <stdlib.h>
34 #endif
35
36 #include "dv-m32r_uart.h"
37
38 static void free_state (SIM_DESC);
39 static void print_m32r_misc_cpu (SIM_CPU *cpu, int verbose);
40 \f
41 /* Cover function of sim_state_free to free the cpu buffers as well. */
42
43 static void
44 free_state (SIM_DESC sd)
45 {
46 if (STATE_MODULES (sd) != NULL)
47 sim_module_uninstall (sd);
48 sim_cpu_free_all (sd);
49 sim_state_free (sd);
50 }
51
52 /* Create an instance of the simulator. */
53
54 SIM_DESC
55 sim_open (kind, callback, abfd, argv)
56 SIM_OPEN_KIND kind;
57 host_callback *callback;
58 struct bfd *abfd;
59 char **argv;
60 {
61 SIM_DESC sd = sim_state_alloc (kind, callback);
62 char c;
63 int i;
64
65 /* The cpu data is kept in a separately allocated chunk of memory. */
66 if (sim_cpu_alloc_all (sd, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK)
67 {
68 free_state (sd);
69 return 0;
70 }
71
72 #if 0 /* FIXME: pc is in mach-specific struct */
73 /* FIXME: watchpoints code shouldn't need this */
74 {
75 SIM_CPU *current_cpu = STATE_CPU (sd, 0);
76 STATE_WATCHPOINTS (sd)->pc = &(PC);
77 STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
78 }
79 #endif
80
81 if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
82 {
83 free_state (sd);
84 return 0;
85 }
86
87 /* getopt will print the error message so we just have to exit if this fails.
88 FIXME: Hmmm... in the case of gdb we need getopt to call
89 print_filtered. */
90 if (sim_parse_args (sd, argv) != SIM_RC_OK)
91 {
92 free_state (sd);
93 return 0;
94 }
95
96 /* Allocate a handler for the control registers and other devices
97 if no memory for that range has been allocated by the user.
98 All are allocated in one chunk to keep things from being
99 unnecessarily complicated.
100 TODO: Move these to the sim-model framework. */
101 sim_hw_parse (sd, "/core/%s/reg %#x %i", "m32r_uart", UART_BASE_ADDR, 0x100);
102 sim_hw_parse (sd, "/core/%s/reg %#x %i", "m32r_cache", 0xfffffff0, 0x10);
103
104 /* Allocate core managed memory if none specified by user.
105 Use address 4 here in case the user wanted address 0 unmapped. */
106 if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0)
107 sim_do_commandf (sd, "memory region 0,0x%x", M32R_DEFAULT_MEM_SIZE);
108
109 /* check for/establish the reference program image */
110 if (sim_analyze_program (sd,
111 (STATE_PROG_ARGV (sd) != NULL
112 ? *STATE_PROG_ARGV (sd)
113 : NULL),
114 abfd) != SIM_RC_OK)
115 {
116 free_state (sd);
117 return 0;
118 }
119
120 /* Establish any remaining configuration options. */
121 if (sim_config (sd) != SIM_RC_OK)
122 {
123 free_state (sd);
124 return 0;
125 }
126
127 if (sim_post_argv_init (sd) != SIM_RC_OK)
128 {
129 free_state (sd);
130 return 0;
131 }
132
133 /* Open a copy of the cpu descriptor table. */
134 {
135 CGEN_CPU_DESC cd = m32r_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name,
136 CGEN_ENDIAN_BIG);
137 for (i = 0; i < MAX_NR_PROCESSORS; ++i)
138 {
139 SIM_CPU *cpu = STATE_CPU (sd, i);
140 CPU_CPU_DESC (cpu) = cd;
141 CPU_DISASSEMBLER (cpu) = sim_cgen_disassemble_insn;
142 }
143 m32r_cgen_init_dis (cd);
144 }
145
146 /* Initialize various cgen things not done by common framework.
147 Must be done after m32r_cgen_cpu_open. */
148 cgen_init (sd);
149
150 for (c = 0; c < MAX_NR_PROCESSORS; ++c)
151 {
152 /* Only needed for profiling, but the structure member is small. */
153 memset (CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i)), 0,
154 sizeof (* CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i))));
155 /* Hook in callback for reporting these stats */
156 PROFILE_INFO_CPU_CALLBACK (CPU_PROFILE_DATA (STATE_CPU (sd, i)))
157 = print_m32r_misc_cpu;
158 }
159
160 return sd;
161 }
162 \f
163 SIM_RC
164 sim_create_inferior (sd, abfd, argv, envp)
165 SIM_DESC sd;
166 struct bfd *abfd;
167 char **argv;
168 char **envp;
169 {
170 SIM_CPU *current_cpu = STATE_CPU (sd, 0);
171 SIM_ADDR addr;
172
173 if (abfd != NULL)
174 addr = bfd_get_start_address (abfd);
175 else
176 addr = 0;
177 sim_pc_set (current_cpu, addr);
178
179 #ifdef M32R_LINUX
180 m32rbf_h_cr_set (current_cpu,
181 m32r_decode_gdb_ctrl_regnum(SPI_REGNUM), 0x1f00000);
182 m32rbf_h_cr_set (current_cpu,
183 m32r_decode_gdb_ctrl_regnum(SPU_REGNUM), 0x1f00000);
184 #endif
185
186 /* Standalone mode (i.e. `run`) will take care of the argv for us in
187 sim_open() -> sim_parse_args(). But in debug mode (i.e. 'target sim'
188 with `gdb`), we need to handle it because the user can change the
189 argv on the fly via gdb's 'run'. */
190 if (STATE_PROG_ARGV (sd) != argv)
191 {
192 freeargv (STATE_PROG_ARGV (sd));
193 STATE_PROG_ARGV (sd) = dupargv (argv);
194 }
195
196 return SIM_RC_OK;
197 }
198
199 /* PROFILE_CPU_CALLBACK */
200
201 static void
202 print_m32r_misc_cpu (SIM_CPU *cpu, int verbose)
203 {
204 SIM_DESC sd = CPU_STATE (cpu);
205 char buf[20];
206
207 if (CPU_PROFILE_FLAGS (cpu) [PROFILE_INSN_IDX])
208 {
209 sim_io_printf (sd, "Miscellaneous Statistics\n\n");
210 sim_io_printf (sd, " %-*s %s\n\n",
211 PROFILE_LABEL_WIDTH, "Fill nops:",
212 sim_add_commas (buf, sizeof (buf),
213 CPU_M32R_MISC_PROFILE (cpu)->fillnop_count));
214 if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32rx)
215 sim_io_printf (sd, " %-*s %s\n\n",
216 PROFILE_LABEL_WIDTH, "Parallel insns:",
217 sim_add_commas (buf, sizeof (buf),
218 CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
219 if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32r2)
220 sim_io_printf (sd, " %-*s %s\n\n",
221 PROFILE_LABEL_WIDTH, "Parallel insns:",
222 sim_add_commas (buf, sizeof (buf),
223 CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
224 }
225 }