sim/m32r/sim-if.c

   1 /* Main simulator entry points for the M32R.
   2    Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
   3    Contributed by Cygnus Support.
   4
   5 This program is free software; you can redistribute it and/or modify
   6 it under the terms of the GNU General Public License as published by
   7 the Free Software Foundation; either version 2, or (at your option)
   8 any later version.
   9
  10 This program is distributed in the hope that it will be useful,
  11 but WITHOUT ANY WARRANTY; without even the implied warranty of
  12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13 GNU General Public License for more details.
  14
  15 You should have received a copy of the GNU General Public License along
  16 with this program; if not, write to the Free Software Foundation, Inc.,
  17 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  18
  19 #include "sim-main.h"
  20 #ifdef HAVE_STDLIB_H
  21 #include <stdlib.h>
  22 #endif
  23 #include "sim-options.h"
  24 #include "libiberty.h"
  25 #include "bfd.h"
  26
  27 static void free_state (SIM_DESC);
  28 static void print_m32r_misc_cpu (SIM_CPU *cpu, int verbose);
  29
  30 /* Records simulator descriptor so utilities like m32r_dump_regs can be
  31    called from gdb.  */
  32 SIM_DESC current_state;
  33 \f
  34 /* Cover function of sim_state_free to free the cpu buffers as well.  */
  35
  36 static void
  37 free_state (SIM_DESC sd)
  38 {
  39   if (STATE_MODULES (sd) != NULL)
  40     sim_module_uninstall (sd);
  41   sim_cpu_free_all (sd);
  42   sim_state_free (sd);
  43 }
  44
  45 /* Create an instance of the simulator.  */
  46
  47 SIM_DESC
  48 sim_open (kind, callback, abfd, argv)
  49      SIM_OPEN_KIND kind;
  50      host_callback *callback;
  51      struct _bfd *abfd;
  52      char **argv;
  53 {
  54   SIM_DESC sd = sim_state_alloc (kind, callback);
  55
  56   /* The cpu data is kept in a separately allocated chunk of memory.  */
  57   if (sim_cpu_alloc_all (sd, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK)
  58     {
  59       free_state (sd);
  60       return 0;
  61     }
  62
  63 #if 0 /* FIXME: pc is in mach-specific struct */
  64   /* FIXME: watchpoints code shouldn't need this */
  65   {
  66     SIM_CPU *current_cpu = STATE_CPU (sd, 0);
  67     STATE_WATCHPOINTS (sd)->pc = &(PC);
  68     STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
  69   }
  70 #endif
  71
  72   if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
  73     {
  74       free_state (sd);
  75       return 0;
  76     }
  77
  78 #if 0 /* FIXME: 'twould be nice if we could do this */
  79   /* These options override any module options.
  80      Obviously ambiguity should be avoided, however the caller may wish to
  81      augment the meaning of an option.  */
  82   if (extra_options != NULL)
  83     sim_add_option_table (sd, extra_options);
  84 #endif
  85
  86   /* Allocate core managed memory */
  87   sim_do_commandf (sd, "memory region 0,0x%lx", M32R_DEFAULT_MEM_SIZE);
  88
  89   /* Allocate a handler for the control registers and other devices.
  90      All are allocated in one chunk to keep things from being
  91      unnecessarily complicated.  */
  92   sim_core_attach (sd, NULL,
  93                    0 /*level*/,
  94                    access_read_write,
  95                    0 /*space ???*/,
  96                    M32R_DEVICE_ADDR, M32R_DEVICE_LEN /*nr_bytes*/,
  97                    0 /*modulo*/,
  98                    &m32r_devices,
  99                    NULL /*buffer*/);
 100
 101   /* getopt will print the error message so we just have to exit if this fails.
 102      FIXME: Hmmm...  in the case of gdb we need getopt to call
 103      print_filtered.  */
 104   if (sim_parse_args (sd, argv) != SIM_RC_OK)
 105     {
 106       free_state (sd);
 107       return 0;
 108     }
 109
 110   /* check for/establish the reference program image */
 111   if (sim_analyze_program (sd,
 112                            (STATE_PROG_ARGV (sd) != NULL
 113                             ? *STATE_PROG_ARGV (sd)
 114                             : NULL),
 115                            abfd) != SIM_RC_OK)
 116     {
 117       free_state (sd);
 118       return 0;
 119     }
 120
 121   /* If both cpu model and state architecture are set, ensure they're
 122      compatible.  If only one is set, set the other.  If neither are set,
 123      use the default model.  STATE_ARCHITECTURE is the bfd_arch_info data
 124      for the selected "mach" (bfd terminology).  */
 125   {
 126     SIM_CPU *cpu = STATE_CPU (sd, 0);
 127
 128     if (! STATE_ARCHITECTURE (sd)
 129         /* Only check cpu 0.  STATE_ARCHITECTURE is for that one only.  */
 130         && ! CPU_MACH (cpu))
 131       {
 132         /* Set the default model.  */
 133         const MODEL *model = sim_model_lookup (WITH_DEFAULT_MODEL);
 134         sim_model_set (sd, NULL, model);
 135       }
 136     if (STATE_ARCHITECTURE (sd)
 137         && CPU_MACH (cpu))
 138       {
 139         if (strcmp (STATE_ARCHITECTURE (sd)->printable_name,
 140                     MACH_NAME (CPU_MACH (cpu))) != 0)
 141           {
 142             sim_io_eprintf (sd, "invalid model `%s' for `%s'\n",
 143                             MODEL_NAME (CPU_MODEL (cpu)),
 144                             STATE_ARCHITECTURE (sd)->printable_name);
 145             free_state (sd);
 146             return 0;
 147           }
 148       }
 149     else if (STATE_ARCHITECTURE (sd))
 150       {
 151         /* Use the default model for the selected machine.
 152            The default model is the first one in the list.  */
 153         const MACH *mach = sim_mach_lookup (STATE_ARCHITECTURE (sd)->printable_name);
 154         sim_model_set (sd, NULL, MACH_MODELS (mach));
 155       }
 156     else
 157       {
 158         STATE_ARCHITECTURE (sd) = bfd_scan_arch (MACH_NAME (CPU_MACH (cpu)));
 159       }
 160   }
 161
 162   /* Establish any remaining configuration options.  */
 163   if (sim_config (sd) != SIM_RC_OK)
 164     {
 165       free_state (sd);
 166       return 0;
 167     }
 168
 169   if (sim_post_argv_init (sd) != SIM_RC_OK)
 170     {
 171       free_state (sd);
 172       return 0;
 173     }
 174
 175   /* Initialize various cgen things not done by common framework.  */
 176   cgen_init (sd);
 177
 178   /* Open a copy of the opcode table.  */
 179   STATE_OPCODE_TABLE (sd) = m32r_cgen_opcode_open (STATE_ARCHITECTURE (sd)->mach,
 180                                                    CGEN_ENDIAN_BIG);
 181   m32r_cgen_init_dis (STATE_OPCODE_TABLE (sd));
 182
 183   {
 184     int c;
 185
 186     for (c = 0; c < MAX_NR_PROCESSORS; ++c)
 187       {
 188         /* Only needed for profiling, but the structure member is small.  */
 189         memset (& CPU_M32R_MISC_PROFILE (STATE_CPU (sd, c)), 0,
 190                 sizeof (CPU_M32R_MISC_PROFILE (STATE_CPU (sd, c))));
 191         /* Hook in callback for reporting these stats */
 192         PROFILE_INFO_CPU_CALLBACK (CPU_PROFILE_DATA (STATE_CPU (sd, c)))
 193           = print_m32r_misc_cpu;
 194       }
 195   }
 196
 197   /* Store in a global so things like sparc32_dump_regs can be invoked
 198      from the gdb command line.  */
 199   current_state = sd;
 200
 201   return sd;
 202 }
 203
 204 void
 205 sim_close (sd, quitting)
 206      SIM_DESC sd;
 207      int quitting;
 208 {
 209   m32r_cgen_opcode_close (STATE_OPCODE_TABLE (sd));
 210   sim_module_uninstall (sd);
 211 }
 212 \f
 213 SIM_RC
 214 sim_create_inferior (sd, abfd, argv, envp)
 215      SIM_DESC sd;
 216      struct _bfd *abfd;
 217      char **argv;
 218      char **envp;
 219 {
 220   SIM_CPU *current_cpu = STATE_CPU (sd, 0);
 221   SIM_ADDR addr;
 222
 223   if (abfd != NULL)
 224     addr = bfd_get_start_address (abfd);
 225   else
 226     addr = 0;
 227   sim_pc_set (current_cpu, addr);
 228
 229 #if 0
 230   STATE_ARGV (sd) = sim_copy_argv (argv);
 231   STATE_ENVP (sd) = sim_copy_argv (envp);
 232 #endif
 233
 234   return SIM_RC_OK;
 235 }
 236
 237 int
 238 sim_stop (SIM_DESC sd)
 239 {
 240   switch (STATE_ARCHITECTURE (sd)->mach)
 241     {
 242     case bfd_mach_m32r :
 243       return m32r_engine_stop (sd, NULL, NULL_CIA, sim_stopped, SIM_SIGINT);
 244 /* start-sanitize-m32rx */
 245 #ifdef HAVE_CPU_M32RX
 246     case bfd_mach_m32rx :
 247       return m32rx_engine_stop (sd, NULL, NULL_CIA, sim_stopped, SIM_SIGINT);
 248 #endif
 249 /* end-sanitize-m32rx */
 250     default :
 251       abort ();
 252     }
 253 }
 254
 255 /* This isn't part of the official interface.
 256    This is just a good place to put this for now.  */
 257
 258 void
 259 sim_sync_stop (SIM_DESC sd, SIM_CPU *cpu, PCADDR pc, enum sim_stop reason, int sigrc)
 260 {
 261   switch (STATE_ARCHITECTURE (sd)->mach)
 262     {
 263     case bfd_mach_m32r :
 264       (void) m32r_engine_stop (sd, cpu, pc, reason, sigrc);
 265       break;
 266 /* start-sanitize-m32rx */
 267 #ifdef HAVE_CPU_M32RX
 268     case bfd_mach_m32rx :
 269       (void) m32rx_engine_stop (sd, cpu, pc, reason, sigrc);
 270       break;
 271 #endif
 272 /* end-sanitize-m32rx */
 273     default :
 274       abort ();
 275     }
 276 }
 277
 278 void
 279 sim_resume (sd, step, siggnal)
 280      SIM_DESC sd;
 281      int step, siggnal;
 282 {
 283   sim_module_resume (sd);
 284
 285   switch (STATE_ARCHITECTURE (sd)->mach)
 286     {
 287     case bfd_mach_m32r :
 288       m32r_engine_run (sd, step, siggnal);
 289       break;
 290 /* start-sanitize-m32rx */
 291 #ifdef HAVE_CPU_M32RX
 292     case bfd_mach_m32rx :
 293       m32rx_engine_run (sd, step, siggnal);
 294       break;
 295 #endif
 296 /* end-sanitize-m32rx */
 297     default :
 298       abort ();
 299     }
 300
 301   sim_module_suspend (sd);
 302 }
 303
 304 /* PROFILE_CPU_CALLBACK */
 305
 306 static void
 307 print_m32r_misc_cpu (SIM_CPU *cpu, int verbose)
 308 {
 309   SIM_DESC sd = CPU_STATE (cpu);
 310   char buf[20];
 311
 312   if (CPU_PROFILE_FLAGS (cpu) [PROFILE_INSN_IDX])
 313     {
 314       sim_io_printf (sd, "Miscellaneous Statistics\n\n");
 315       sim_io_printf (sd, "  %-*s %s\n\n",
 316                      PROFILE_LABEL_WIDTH, "Fill nops:",
 317                      sim_add_commas (buf, sizeof (buf),
 318                                      CPU_M32R_MISC_PROFILE (cpu).fillnop_count));
 319       if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32rx)
 320         sim_io_printf (sd, "  %-*s %s\n\n",
 321                        PROFILE_LABEL_WIDTH, "Parallel insns:",
 322                        sim_add_commas (buf, sizeof (buf),
 323                                        CPU_M32R_MISC_PROFILE (cpu).parallel_count));
 324     }
 325 }
 326
 327 /* The contents of BUF are in target byte order.  */
 328
 329 int
 330 sim_fetch_register (sd, rn, buf, length)
 331      SIM_DESC sd;
 332      int rn;
 333      unsigned char *buf;
 334      int length;
 335 {
 336   SIM_CPU *cpu = STATE_CPU (sd, 0);
 337
 338   return (* CPU_REG_FETCH (cpu)) (cpu, rn, buf, length);
 339 }
 340
 341 /* The contents of BUF are in target byte order.  */
 342
 343 int
 344 sim_store_register (sd, rn, buf, length)
 345      SIM_DESC sd;
 346      int rn;
 347      unsigned char *buf;
 348      int length;
 349 {
 350   SIM_CPU *cpu = STATE_CPU (sd, 0);
 351
 352   return (* CPU_REG_STORE (cpu)) (cpu, rn, buf, length);
 353 }
 354
 355 void
 356 sim_do_command (sd, cmd)
 357      SIM_DESC sd;
 358      char *cmd;
 359 {
 360   if (sim_args_command (sd, cmd) != SIM_RC_OK)
 361     sim_io_eprintf (sd, "Unknown command `%s'\n", cmd);
 362 }
 363 \f
 364 /* Utility fns to access registers, without knowing the current mach.  */
 365
 366 SI
 367 h_gr_get (SIM_CPU *current_cpu, UINT regno)
 368 {
 369   switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
 370     {
 371     case bfd_mach_m32r :
 372       return m32r_h_gr_get (current_cpu, regno);
 373 /* start-sanitize-m32rx */
 374 #ifdef HAVE_CPU_M32RX
 375     case bfd_mach_m32rx :
 376       return m32rx_h_gr_get (current_cpu, regno);
 377 #endif
 378 /* end-sanitize-m32rx */
 379     default :
 380       abort ();
 381     }
 382 }
 383
 384 void
 385 h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
 386 {
 387   switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
 388     {
 389     case bfd_mach_m32r :
 390       m32r_h_gr_set (current_cpu, regno, newval);
 391       break;
 392 /* start-sanitize-m32rx */
 393 #ifdef HAVE_CPU_M32RX
 394     case bfd_mach_m32rx :
 395       m32rx_h_gr_set (current_cpu, regno, newval);
 396       break;
 397 #endif
 398 /* end-sanitize-m32rx */
 399     default :
 400       abort ();
 401     }
 402 }