sim: m32r: migrate from WITH_DEVICES to WITH_HW
[binutils-gdb.git] / sim / m32r / sim-if.c
1 /* Main simulator entry points specific to the M32R.
2 Copyright (C) 1996-2015 Free Software Foundation, Inc.
3 Contributed by Cygnus Support.
4
5 This file is part of GDB, the GNU debugger.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20 #include "sim-main.h"
21 #include "sim-options.h"
22 #include "libiberty.h"
23 #include "bfd.h"
24
25 #ifdef HAVE_STRING_H
26 #include <string.h>
27 #else
28 #ifdef HAVE_STRINGS_H
29 #include <strings.h>
30 #endif
31 #endif
32 #ifdef HAVE_STDLIB_H
33 #include <stdlib.h>
34 #endif
35
36 #include "dv-m32r_uart.h"
37
38 static void free_state (SIM_DESC);
39 static void print_m32r_misc_cpu (SIM_CPU *cpu, int verbose);
40
41 /* Records simulator descriptor so utilities like m32r_dump_regs can be
42 called from gdb. */
43 SIM_DESC current_state;
44 \f
45 /* Cover function of sim_state_free to free the cpu buffers as well. */
46
47 static void
48 free_state (SIM_DESC sd)
49 {
50 if (STATE_MODULES (sd) != NULL)
51 sim_module_uninstall (sd);
52 sim_cpu_free_all (sd);
53 sim_state_free (sd);
54 }
55
56 /* Create an instance of the simulator. */
57
58 SIM_DESC
59 sim_open (kind, callback, abfd, argv)
60 SIM_OPEN_KIND kind;
61 host_callback *callback;
62 struct bfd *abfd;
63 char **argv;
64 {
65 SIM_DESC sd = sim_state_alloc (kind, callback);
66 char c;
67 int i;
68
69 /* The cpu data is kept in a separately allocated chunk of memory. */
70 if (sim_cpu_alloc_all (sd, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK)
71 {
72 free_state (sd);
73 return 0;
74 }
75
76 #if 0 /* FIXME: pc is in mach-specific struct */
77 /* FIXME: watchpoints code shouldn't need this */
78 {
79 SIM_CPU *current_cpu = STATE_CPU (sd, 0);
80 STATE_WATCHPOINTS (sd)->pc = &(PC);
81 STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
82 }
83 #endif
84
85 if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
86 {
87 free_state (sd);
88 return 0;
89 }
90
91 #if 0 /* FIXME: 'twould be nice if we could do this */
92 /* These options override any module options.
93 Obviously ambiguity should be avoided, however the caller may wish to
94 augment the meaning of an option. */
95 if (extra_options != NULL)
96 sim_add_option_table (sd, extra_options);
97 #endif
98
99 /* getopt will print the error message so we just have to exit if this fails.
100 FIXME: Hmmm... in the case of gdb we need getopt to call
101 print_filtered. */
102 if (sim_parse_args (sd, argv) != SIM_RC_OK)
103 {
104 free_state (sd);
105 return 0;
106 }
107
108 /* Allocate a handler for the control registers and other devices
109 if no memory for that range has been allocated by the user.
110 All are allocated in one chunk to keep things from being
111 unnecessarily complicated.
112 TODO: Move these to the sim-model framework. */
113 sim_hw_parse (sd, "/core/%s/reg %#x %i", "m32r_uart", UART_BASE_ADDR, 0x100);
114 sim_hw_parse (sd, "/core/%s/reg %#x %i", "m32r_cache", 0xfffffff0, 0x10);
115
116 /* Allocate core managed memory if none specified by user.
117 Use address 4 here in case the user wanted address 0 unmapped. */
118 if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0)
119 sim_do_commandf (sd, "memory region 0,0x%x", M32R_DEFAULT_MEM_SIZE);
120
121 /* check for/establish the reference program image */
122 if (sim_analyze_program (sd,
123 (STATE_PROG_ARGV (sd) != NULL
124 ? *STATE_PROG_ARGV (sd)
125 : NULL),
126 abfd) != SIM_RC_OK)
127 {
128 free_state (sd);
129 return 0;
130 }
131
132 /* Establish any remaining configuration options. */
133 if (sim_config (sd) != SIM_RC_OK)
134 {
135 free_state (sd);
136 return 0;
137 }
138
139 if (sim_post_argv_init (sd) != SIM_RC_OK)
140 {
141 free_state (sd);
142 return 0;
143 }
144
145 /* Open a copy of the cpu descriptor table. */
146 {
147 CGEN_CPU_DESC cd = m32r_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name,
148 CGEN_ENDIAN_BIG);
149 for (i = 0; i < MAX_NR_PROCESSORS; ++i)
150 {
151 SIM_CPU *cpu = STATE_CPU (sd, i);
152 CPU_CPU_DESC (cpu) = cd;
153 CPU_DISASSEMBLER (cpu) = sim_cgen_disassemble_insn;
154 }
155 m32r_cgen_init_dis (cd);
156 }
157
158 /* Initialize various cgen things not done by common framework.
159 Must be done after m32r_cgen_cpu_open. */
160 cgen_init (sd);
161
162 for (c = 0; c < MAX_NR_PROCESSORS; ++c)
163 {
164 /* Only needed for profiling, but the structure member is small. */
165 memset (CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i)), 0,
166 sizeof (* CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i))));
167 /* Hook in callback for reporting these stats */
168 PROFILE_INFO_CPU_CALLBACK (CPU_PROFILE_DATA (STATE_CPU (sd, i)))
169 = print_m32r_misc_cpu;
170 }
171
172 /* Store in a global so things like sparc32_dump_regs can be invoked
173 from the gdb command line. */
174 current_state = sd;
175
176 return sd;
177 }
178 \f
179 SIM_RC
180 sim_create_inferior (sd, abfd, argv, envp)
181 SIM_DESC sd;
182 struct bfd *abfd;
183 char **argv;
184 char **envp;
185 {
186 SIM_CPU *current_cpu = STATE_CPU (sd, 0);
187 SIM_ADDR addr;
188
189 if (abfd != NULL)
190 addr = bfd_get_start_address (abfd);
191 else
192 addr = 0;
193 sim_pc_set (current_cpu, addr);
194
195 #ifdef M32R_LINUX
196 m32rbf_h_cr_set (current_cpu,
197 m32r_decode_gdb_ctrl_regnum(SPI_REGNUM), 0x1f00000);
198 m32rbf_h_cr_set (current_cpu,
199 m32r_decode_gdb_ctrl_regnum(SPU_REGNUM), 0x1f00000);
200 #endif
201
202 #if 0
203 STATE_ARGV (sd) = sim_copy_argv (argv);
204 STATE_ENVP (sd) = sim_copy_argv (envp);
205 #endif
206
207 return SIM_RC_OK;
208 }
209
210 /* PROFILE_CPU_CALLBACK */
211
212 static void
213 print_m32r_misc_cpu (SIM_CPU *cpu, int verbose)
214 {
215 SIM_DESC sd = CPU_STATE (cpu);
216 char buf[20];
217
218 if (CPU_PROFILE_FLAGS (cpu) [PROFILE_INSN_IDX])
219 {
220 sim_io_printf (sd, "Miscellaneous Statistics\n\n");
221 sim_io_printf (sd, " %-*s %s\n\n",
222 PROFILE_LABEL_WIDTH, "Fill nops:",
223 sim_add_commas (buf, sizeof (buf),
224 CPU_M32R_MISC_PROFILE (cpu)->fillnop_count));
225 if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32rx)
226 sim_io_printf (sd, " %-*s %s\n\n",
227 PROFILE_LABEL_WIDTH, "Parallel insns:",
228 sim_add_commas (buf, sizeof (buf),
229 CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
230 if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32r2)
231 sim_io_printf (sd, " %-*s %s\n\n",
232 PROFILE_LABEL_WIDTH, "Parallel insns:",
233 sim_add_commas (buf, sizeof (buf),
234 CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
235 }
236 }