sim/m32r/sim-if.c

   1 /* Main simulator entry points specific to the M32R.
   2    Copyright (C) 1996-2021 Free Software Foundation, Inc.
   3    Contributed by Cygnus Support.
   4
   5    This file is part of GDB, the GNU debugger.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  19
  20 #include "sim-main.h"
  21 #include "sim-options.h"
  22 #include "libiberty.h"
  23 #include "bfd.h"
  24
  25 #include <string.h>
  26 #include <stdlib.h>
  27
  28 #include "dv-m32r_uart.h"
  29
  30 static void free_state (SIM_DESC);
  31 static void print_m32r_misc_cpu (SIM_CPU *cpu, int verbose);
  32 \f
  33 /* Cover function of sim_state_free to free the cpu buffers as well.  */
  34
  35 static void
  36 free_state (SIM_DESC sd)
  37 {
  38   if (STATE_MODULES (sd) != NULL)
  39     sim_module_uninstall (sd);
  40   sim_cpu_free_all (sd);
  41   sim_state_free (sd);
  42 }
  43
  44 /* Create an instance of the simulator.  */
  45
  46 SIM_DESC
  47 sim_open (kind, callback, abfd, argv)
  48      SIM_OPEN_KIND kind;
  49      host_callback *callback;
  50      struct bfd *abfd;
  51      char * const *argv;
  52 {
  53   SIM_DESC sd = sim_state_alloc (kind, callback);
  54   char c;
  55   int i;
  56
  57   /* The cpu data is kept in a separately allocated chunk of memory.  */
  58   if (sim_cpu_alloc_all (sd, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK)
  59     {
  60       free_state (sd);
  61       return 0;
  62     }
  63
  64 #if 0 /* FIXME: pc is in mach-specific struct */
  65   /* FIXME: watchpoints code shouldn't need this */
  66   {
  67     SIM_CPU *current_cpu = STATE_CPU (sd, 0);
  68     STATE_WATCHPOINTS (sd)->pc = &(PC);
  69   }
  70 #endif
  71
  72   if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
  73     {
  74       free_state (sd);
  75       return 0;
  76     }
  77
  78   /* The parser will print an error message for us, so we silently return.  */
  79   if (sim_parse_args (sd, argv) != SIM_RC_OK)
  80     {
  81       free_state (sd);
  82       return 0;
  83     }
  84
  85   /* Allocate a handler for the control registers and other devices
  86      if no memory for that range has been allocated by the user.
  87      All are allocated in one chunk to keep things from being
  88      unnecessarily complicated.
  89      TODO: Move these to the sim-model framework.  */
  90   sim_hw_parse (sd, "/core/%s/reg %#x %i", "m32r_uart", UART_BASE_ADDR, 0x100);
  91   sim_hw_parse (sd, "/core/%s/reg %#x %i", "m32r_cache", 0xfffffff0, 0x10);
  92
  93   /* Allocate core managed memory if none specified by user.
  94      Use address 4 here in case the user wanted address 0 unmapped.  */
  95   if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0)
  96     sim_do_commandf (sd, "memory region 0,0x%x", M32R_DEFAULT_MEM_SIZE);
  97
  98   /* check for/establish the reference program image */
  99   if (sim_analyze_program (sd,
 100                            (STATE_PROG_ARGV (sd) != NULL
 101                             ? *STATE_PROG_ARGV (sd)
 102                             : NULL),
 103                            abfd) != SIM_RC_OK)
 104     {
 105       free_state (sd);
 106       return 0;
 107     }
 108
 109   /* Establish any remaining configuration options.  */
 110   if (sim_config (sd) != SIM_RC_OK)
 111     {
 112       free_state (sd);
 113       return 0;
 114     }
 115
 116   if (sim_post_argv_init (sd) != SIM_RC_OK)
 117     {
 118       free_state (sd);
 119       return 0;
 120     }
 121
 122   /* Open a copy of the cpu descriptor table.  */
 123   {
 124     CGEN_CPU_DESC cd = m32r_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name,
 125                                              CGEN_ENDIAN_BIG);
 126     for (i = 0; i < MAX_NR_PROCESSORS; ++i)
 127       {
 128         SIM_CPU *cpu = STATE_CPU (sd, i);
 129         CPU_CPU_DESC (cpu) = cd;
 130         CPU_DISASSEMBLER (cpu) = sim_cgen_disassemble_insn;
 131       }
 132     m32r_cgen_init_dis (cd);
 133   }
 134
 135   /* Initialize various cgen things not done by common framework.
 136      Must be done after m32r_cgen_cpu_open.  */
 137   cgen_init (sd);
 138
 139   for (c = 0; c < MAX_NR_PROCESSORS; ++c)
 140     {
 141       /* Only needed for profiling, but the structure member is small.  */
 142       memset (CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i)), 0,
 143               sizeof (* CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i))));
 144       /* Hook in callback for reporting these stats */
 145       PROFILE_INFO_CPU_CALLBACK (CPU_PROFILE_DATA (STATE_CPU (sd, i)))
 146         = print_m32r_misc_cpu;
 147     }
 148
 149   return sd;
 150 }
 151 \f
 152 SIM_RC
 153 sim_create_inferior (sd, abfd, argv, envp)
 154      SIM_DESC sd;
 155      struct bfd *abfd;
 156      char * const *argv;
 157      char * const *envp;
 158 {
 159   SIM_CPU *current_cpu = STATE_CPU (sd, 0);
 160   SIM_ADDR addr;
 161
 162   if (abfd != NULL)
 163     addr = bfd_get_start_address (abfd);
 164   else
 165     addr = 0;
 166   sim_pc_set (current_cpu, addr);
 167
 168 #ifdef M32R_LINUX
 169   m32rbf_h_cr_set (current_cpu,
 170                     m32r_decode_gdb_ctrl_regnum(SPI_REGNUM), 0x1f00000);
 171   m32rbf_h_cr_set (current_cpu,
 172                     m32r_decode_gdb_ctrl_regnum(SPU_REGNUM), 0x1f00000);
 173 #endif
 174
 175   /* Standalone mode (i.e. `run`) will take care of the argv for us in
 176      sim_open() -> sim_parse_args().  But in debug mode (i.e. 'target sim'
 177      with `gdb`), we need to handle it because the user can change the
 178      argv on the fly via gdb's 'run'.  */
 179   if (STATE_PROG_ARGV (sd) != argv)
 180     {
 181       freeargv (STATE_PROG_ARGV (sd));
 182       STATE_PROG_ARGV (sd) = dupargv (argv);
 183     }
 184
 185   return SIM_RC_OK;
 186 }
 187
 188 /* PROFILE_CPU_CALLBACK */
 189
 190 static void
 191 print_m32r_misc_cpu (SIM_CPU *cpu, int verbose)
 192 {
 193   SIM_DESC sd = CPU_STATE (cpu);
 194   char buf[20];
 195
 196   if (CPU_PROFILE_FLAGS (cpu) [PROFILE_INSN_IDX])
 197     {
 198       sim_io_printf (sd, "Miscellaneous Statistics\n\n");
 199       sim_io_printf (sd, "  %-*s %s\n\n",
 200                      PROFILE_LABEL_WIDTH, "Fill nops:",
 201                      sim_add_commas (buf, sizeof (buf),
 202                                      CPU_M32R_MISC_PROFILE (cpu)->fillnop_count));
 203       if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32rx)
 204         sim_io_printf (sd, "  %-*s %s\n\n",
 205                        PROFILE_LABEL_WIDTH, "Parallel insns:",
 206                        sim_add_commas (buf, sizeof (buf),
 207                                        CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
 208       if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32r2)
 209         sim_io_printf (sd, "  %-*s %s\n\n",
 210                        PROFILE_LABEL_WIDTH, "Parallel insns:",
 211                        sim_add_commas (buf, sizeof (buf),
 212                                        CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
 213     }
 214 }