1 /* Main simulator entry points specific to the M32R.
2 Copyright (C) 1996-2021 Free Software Foundation, Inc.
3 Contributed by Cygnus Support.
5 This file is part of GDB, the GNU debugger.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20 /* This must come before any other includes. */
24 #include "sim-options.h"
25 #include "libiberty.h"
31 #include "dv-m32r_uart.h"
33 #define M32R_DEFAULT_MEM_SIZE 0x2000000 /* 32M */
35 static void free_state (SIM_DESC
);
36 static void print_m32r_misc_cpu (SIM_CPU
*cpu
, int verbose
);
38 /* Cover function of sim_state_free to free the cpu buffers as well. */
41 free_state (SIM_DESC sd
)
43 if (STATE_MODULES (sd
) != NULL
)
44 sim_module_uninstall (sd
);
45 sim_cpu_free_all (sd
);
49 extern const SIM_MACH
* const m32r_sim_machs
[];
51 /* Create an instance of the simulator. */
54 sim_open (SIM_OPEN_KIND kind
, host_callback
*callback
, struct bfd
*abfd
,
57 SIM_DESC sd
= sim_state_alloc (kind
, callback
);
61 /* Set default options before parsing user options. */
62 STATE_MACHS (sd
) = m32r_sim_machs
;
63 STATE_MODEL_NAME (sd
) = "m32r/d";
64 current_alignment
= STRICT_ALIGNMENT
;
65 current_target_byte_order
= BFD_ENDIAN_BIG
;
67 /* The cpu data is kept in a separately allocated chunk of memory. */
68 if (sim_cpu_alloc_all (sd
, 1) != SIM_RC_OK
)
74 if (sim_pre_argv_init (sd
, argv
[0]) != SIM_RC_OK
)
80 /* The parser will print an error message for us, so we silently return. */
81 if (sim_parse_args (sd
, argv
) != SIM_RC_OK
)
87 /* Allocate a handler for the control registers and other devices
88 if no memory for that range has been allocated by the user.
89 All are allocated in one chunk to keep things from being
90 unnecessarily complicated.
91 TODO: Move these to the sim-model framework. */
92 sim_hw_parse (sd
, "/core/%s/reg %#x %i", "m32r_uart", UART_BASE_ADDR
, 0x100);
93 sim_hw_parse (sd
, "/core/%s/reg %#x %i", "m32r_cache", 0xfffffff0, 0x10);
95 /* Allocate core managed memory if none specified by user.
96 Use address 4 here in case the user wanted address 0 unmapped. */
97 if (sim_core_read_buffer (sd
, NULL
, read_map
, &c
, 4, 1) == 0)
98 sim_do_commandf (sd
, "memory region 0,0x%x", M32R_DEFAULT_MEM_SIZE
);
100 /* check for/establish the reference program image */
101 if (sim_analyze_program (sd
, STATE_PROG_FILE (sd
), abfd
) != SIM_RC_OK
)
107 /* Establish any remaining configuration options. */
108 if (sim_config (sd
) != SIM_RC_OK
)
114 if (sim_post_argv_init (sd
) != SIM_RC_OK
)
120 /* Open a copy of the cpu descriptor table. */
122 CGEN_CPU_DESC cd
= m32r_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd
)->printable_name
,
124 for (i
= 0; i
< MAX_NR_PROCESSORS
; ++i
)
126 SIM_CPU
*cpu
= STATE_CPU (sd
, i
);
127 CPU_CPU_DESC (cpu
) = cd
;
128 CPU_DISASSEMBLER (cpu
) = sim_cgen_disassemble_insn
;
130 m32r_cgen_init_dis (cd
);
133 for (c
= 0; c
< MAX_NR_PROCESSORS
; ++c
)
135 /* Only needed for profiling, but the structure member is small. */
136 memset (CPU_M32R_MISC_PROFILE (STATE_CPU (sd
, i
)), 0,
137 sizeof (* CPU_M32R_MISC_PROFILE (STATE_CPU (sd
, i
))));
138 /* Hook in callback for reporting these stats */
139 PROFILE_INFO_CPU_CALLBACK (CPU_PROFILE_DATA (STATE_CPU (sd
, i
)))
140 = print_m32r_misc_cpu
;
147 sim_create_inferior (SIM_DESC sd
, struct bfd
*abfd
, char * const *argv
,
150 SIM_CPU
*current_cpu
= STATE_CPU (sd
, 0);
154 addr
= bfd_get_start_address (abfd
);
157 sim_pc_set (current_cpu
, addr
);
159 if (STATE_ENVIRONMENT (sd
) == USER_ENVIRONMENT
)
161 m32rbf_h_cr_set (current_cpu
,
162 m32r_decode_gdb_ctrl_regnum(SPI_REGNUM
), 0x1f00000);
163 m32rbf_h_cr_set (current_cpu
,
164 m32r_decode_gdb_ctrl_regnum(SPU_REGNUM
), 0x1f00000);
167 /* Standalone mode (i.e. `run`) will take care of the argv for us in
168 sim_open() -> sim_parse_args(). But in debug mode (i.e. 'target sim'
169 with `gdb`), we need to handle it because the user can change the
170 argv on the fly via gdb's 'run'. */
171 if (STATE_PROG_ARGV (sd
) != argv
)
173 freeargv (STATE_PROG_ARGV (sd
));
174 STATE_PROG_ARGV (sd
) = dupargv (argv
);
180 /* PROFILE_CPU_CALLBACK */
183 print_m32r_misc_cpu (SIM_CPU
*cpu
, int verbose
)
185 SIM_DESC sd
= CPU_STATE (cpu
);
188 if (CPU_PROFILE_FLAGS (cpu
) [PROFILE_INSN_IDX
])
190 sim_io_printf (sd
, "Miscellaneous Statistics\n\n");
191 sim_io_printf (sd
, " %-*s %s\n\n",
192 PROFILE_LABEL_WIDTH
, "Fill nops:",
193 sim_add_commas (buf
, sizeof (buf
),
194 CPU_M32R_MISC_PROFILE (cpu
)->fillnop_count
));
195 if (STATE_ARCHITECTURE (sd
)->mach
== bfd_mach_m32rx
)
196 sim_io_printf (sd
, " %-*s %s\n\n",
197 PROFILE_LABEL_WIDTH
, "Parallel insns:",
198 sim_add_commas (buf
, sizeof (buf
),
199 CPU_M32R_MISC_PROFILE (cpu
)->parallel_count
));
200 if (STATE_ARCHITECTURE (sd
)->mach
== bfd_mach_m32r2
)
201 sim_io_printf (sd
, " %-*s %s\n\n",
202 PROFILE_LABEL_WIDTH
, "Parallel insns:",
203 sim_add_commas (buf
, sizeof (buf
),
204 CPU_M32R_MISC_PROFILE (cpu
)->parallel_count
));