sim/m32r/sim-if.c

   1 /* Main simulator entry points specific to the M32R.
   2    Copyright (C) 1996-2021 Free Software Foundation, Inc.
   3    Contributed by Cygnus Support.
   4
   5    This file is part of GDB, the GNU debugger.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  19
  20 /* This must come before any other includes.  */
  21 #include "defs.h"
  22
  23 #include "sim-main.h"
  24 #include "sim-options.h"
  25 #include "libiberty.h"
  26 #include "bfd.h"
  27
  28 #include <string.h>
  29 #include <stdlib.h>
  30
  31 #include "dv-m32r_uart.h"
  32
  33 static void free_state (SIM_DESC);
  34 static void print_m32r_misc_cpu (SIM_CPU *cpu, int verbose);
  35 \f
  36 /* Cover function of sim_state_free to free the cpu buffers as well.  */
  37
  38 static void
  39 free_state (SIM_DESC sd)
  40 {
  41   if (STATE_MODULES (sd) != NULL)
  42     sim_module_uninstall (sd);
  43   sim_cpu_free_all (sd);
  44   sim_state_free (sd);
  45 }
  46
  47 /* Create an instance of the simulator.  */
  48
  49 SIM_DESC
  50 sim_open (SIM_OPEN_KIND kind, host_callback *callback, struct bfd *abfd,
  51           char * const *argv)
  52 {
  53   SIM_DESC sd = sim_state_alloc (kind, callback);
  54   char c;
  55   int i;
  56
  57   /* Set default options before parsing user options.  */
  58   current_alignment = STRICT_ALIGNMENT;
  59   current_target_byte_order = BFD_ENDIAN_BIG;
  60
  61   /* The cpu data is kept in a separately allocated chunk of memory.  */
  62   if (sim_cpu_alloc_all (sd, 1) != SIM_RC_OK)
  63     {
  64       free_state (sd);
  65       return 0;
  66     }
  67
  68   if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
  69     {
  70       free_state (sd);
  71       return 0;
  72     }
  73
  74   /* The parser will print an error message for us, so we silently return.  */
  75   if (sim_parse_args (sd, argv) != SIM_RC_OK)
  76     {
  77       free_state (sd);
  78       return 0;
  79     }
  80
  81   /* Allocate a handler for the control registers and other devices
  82      if no memory for that range has been allocated by the user.
  83      All are allocated in one chunk to keep things from being
  84      unnecessarily complicated.
  85      TODO: Move these to the sim-model framework.  */
  86   sim_hw_parse (sd, "/core/%s/reg %#x %i", "m32r_uart", UART_BASE_ADDR, 0x100);
  87   sim_hw_parse (sd, "/core/%s/reg %#x %i", "m32r_cache", 0xfffffff0, 0x10);
  88
  89   /* Allocate core managed memory if none specified by user.
  90      Use address 4 here in case the user wanted address 0 unmapped.  */
  91   if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0)
  92     sim_do_commandf (sd, "memory region 0,0x%x", M32R_DEFAULT_MEM_SIZE);
  93
  94   /* check for/establish the reference program image */
  95   if (sim_analyze_program (sd,
  96                            (STATE_PROG_ARGV (sd) != NULL
  97                             ? *STATE_PROG_ARGV (sd)
  98                             : NULL),
  99                            abfd) != SIM_RC_OK)
 100     {
 101       free_state (sd);
 102       return 0;
 103     }
 104
 105   /* Establish any remaining configuration options.  */
 106   if (sim_config (sd) != SIM_RC_OK)
 107     {
 108       free_state (sd);
 109       return 0;
 110     }
 111
 112   if (sim_post_argv_init (sd) != SIM_RC_OK)
 113     {
 114       free_state (sd);
 115       return 0;
 116     }
 117
 118   /* Open a copy of the cpu descriptor table.  */
 119   {
 120     CGEN_CPU_DESC cd = m32r_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name,
 121                                              CGEN_ENDIAN_BIG);
 122     for (i = 0; i < MAX_NR_PROCESSORS; ++i)
 123       {
 124         SIM_CPU *cpu = STATE_CPU (sd, i);
 125         CPU_CPU_DESC (cpu) = cd;
 126         CPU_DISASSEMBLER (cpu) = sim_cgen_disassemble_insn;
 127       }
 128     m32r_cgen_init_dis (cd);
 129   }
 130
 131   for (c = 0; c < MAX_NR_PROCESSORS; ++c)
 132     {
 133       /* Only needed for profiling, but the structure member is small.  */
 134       memset (CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i)), 0,
 135               sizeof (* CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i))));
 136       /* Hook in callback for reporting these stats */
 137       PROFILE_INFO_CPU_CALLBACK (CPU_PROFILE_DATA (STATE_CPU (sd, i)))
 138         = print_m32r_misc_cpu;
 139     }
 140
 141   return sd;
 142 }
 143 \f
 144 SIM_RC
 145 sim_create_inferior (SIM_DESC sd, struct bfd *abfd, char * const *argv,
 146                      char * const *envp)
 147 {
 148   SIM_CPU *current_cpu = STATE_CPU (sd, 0);
 149   SIM_ADDR addr;
 150
 151   if (abfd != NULL)
 152     addr = bfd_get_start_address (abfd);
 153   else
 154     addr = 0;
 155   sim_pc_set (current_cpu, addr);
 156
 157 #ifdef M32R_LINUX
 158   m32rbf_h_cr_set (current_cpu,
 159                     m32r_decode_gdb_ctrl_regnum(SPI_REGNUM), 0x1f00000);
 160   m32rbf_h_cr_set (current_cpu,
 161                     m32r_decode_gdb_ctrl_regnum(SPU_REGNUM), 0x1f00000);
 162 #endif
 163
 164   /* Standalone mode (i.e. `run`) will take care of the argv for us in
 165      sim_open() -> sim_parse_args().  But in debug mode (i.e. 'target sim'
 166      with `gdb`), we need to handle it because the user can change the
 167      argv on the fly via gdb's 'run'.  */
 168   if (STATE_PROG_ARGV (sd) != argv)
 169     {
 170       freeargv (STATE_PROG_ARGV (sd));
 171       STATE_PROG_ARGV (sd) = dupargv (argv);
 172     }
 173
 174   return SIM_RC_OK;
 175 }
 176
 177 /* PROFILE_CPU_CALLBACK */
 178
 179 static void
 180 print_m32r_misc_cpu (SIM_CPU *cpu, int verbose)
 181 {
 182   SIM_DESC sd = CPU_STATE (cpu);
 183   char buf[20];
 184
 185   if (CPU_PROFILE_FLAGS (cpu) [PROFILE_INSN_IDX])
 186     {
 187       sim_io_printf (sd, "Miscellaneous Statistics\n\n");
 188       sim_io_printf (sd, "  %-*s %s\n\n",
 189                      PROFILE_LABEL_WIDTH, "Fill nops:",
 190                      sim_add_commas (buf, sizeof (buf),
 191                                      CPU_M32R_MISC_PROFILE (cpu)->fillnop_count));
 192       if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32rx)
 193         sim_io_printf (sd, "  %-*s %s\n\n",
 194                        PROFILE_LABEL_WIDTH, "Parallel insns:",
 195                        sim_add_commas (buf, sizeof (buf),
 196                                        CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
 197       if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32r2)
 198         sim_io_printf (sd, "  %-*s %s\n\n",
 199                        PROFILE_LABEL_WIDTH, "Parallel insns:",
 200                        sim_add_commas (buf, sizeof (buf),
 201                                        CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
 202     }
 203 }