1 2015-04-18 Mike Frysinger <vapier@gentoo.org>
3 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
6 2015-04-18 Mike Frysinger <vapier@gentoo.org>
8 * sim-main.h (SIM_CPU): Delete.
10 2015-04-18 Mike Frysinger <vapier@gentoo.org>
12 * sim-main.h (sim_cia): Delete.
14 2015-04-17 Mike Frysinger <vapier@gentoo.org>
16 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
18 * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
19 (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
20 * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
21 CIA_SET to CPU_PC_SET.
22 * sim-main.h (CIA_GET, CIA_SET): Delete.
24 2015-04-15 Mike Frysinger <vapier@gentoo.org>
26 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
27 * sim-main.h (STATE_CPU): Delete.
29 2015-04-13 Mike Frysinger <vapier@gentoo.org>
31 * configure: Regenerate.
33 2015-04-13 Mike Frysinger <vapier@gentoo.org>
35 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
36 * interp.c (mips_pc_get, mips_pc_set): New functions.
37 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
38 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
40 * sim-main.h (SIM_CPU): Define.
41 (struct sim_state): Change cpu to an array of pointers.
44 2015-04-13 Mike Frysinger <vapier@gentoo.org>
46 * interp.c (mips_option_handler, open_trace, sim_close,
47 sim_write, sim_read, sim_store_register, sim_fetch_register,
48 sim_create_inferior, pr_addr, pr_uword64): Convert old style
50 (sim_open): Convert old style prototype. Change casts with
51 sim_write to unsigned char *.
52 (fetch_str): Change null to unsigned char, and change cast to
54 (sim_monitor): Change c & ch to unsigned char. Change cast to
57 2015-04-12 Mike Frysinger <vapier@gentoo.org>
59 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
61 2015-04-06 Mike Frysinger <vapier@gentoo.org>
63 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
65 2015-04-01 Mike Frysinger <vapier@gentoo.org>
67 * tconfig.h (SIM_HAVE_PROFILE): Delete.
69 2015-03-31 Mike Frysinger <vapier@gentoo.org>
71 * config.in, configure: Regenerate.
73 2015-03-24 Mike Frysinger <vapier@gentoo.org>
75 * interp.c (sim_pc_get): New function.
77 2015-03-24 Mike Frysinger <vapier@gentoo.org>
79 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
80 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
82 2015-03-24 Mike Frysinger <vapier@gentoo.org>
84 * configure: Regenerate.
86 2015-03-23 Mike Frysinger <vapier@gentoo.org>
88 * configure: Regenerate.
90 2015-03-23 Mike Frysinger <vapier@gentoo.org>
92 * configure: Regenerate.
93 * configure.ac (mips_extra_objs): Delete.
94 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
95 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
97 2015-03-23 Mike Frysinger <vapier@gentoo.org>
99 * configure: Regenerate.
100 * configure.ac: Delete sim_hw checks for dv-sockser.
102 2015-03-16 Mike Frysinger <vapier@gentoo.org>
104 * config.in, configure: Regenerate.
105 * tconfig.in: Rename file ...
106 * tconfig.h: ... here.
108 2015-03-15 Mike Frysinger <vapier@gentoo.org>
110 * tconfig.in: Delete includes.
111 [HAVE_DV_SOCKSER]: Delete.
113 2015-03-14 Mike Frysinger <vapier@gentoo.org>
115 * Makefile.in (SIM_RUN_OBJS): Delete.
117 2015-03-14 Mike Frysinger <vapier@gentoo.org>
119 * configure.ac (AC_CHECK_HEADERS): Delete.
120 * aclocal.m4, configure: Regenerate.
122 2014-08-19 Alan Modra <amodra@gmail.com>
124 * configure: Regenerate.
126 2014-08-15 Roland McGrath <mcgrathr@google.com>
128 * configure: Regenerate.
129 * config.in: Regenerate.
131 2014-03-04 Mike Frysinger <vapier@gentoo.org>
133 * configure: Regenerate.
135 2013-09-23 Alan Modra <amodra@gmail.com>
137 * configure: Regenerate.
139 2013-06-03 Mike Frysinger <vapier@gentoo.org>
141 * aclocal.m4, configure: Regenerate.
143 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
145 * configure: Rebuild.
147 2013-03-26 Mike Frysinger <vapier@gentoo.org>
149 * configure: Regenerate.
151 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
153 * configure.ac: Address use of dv-sockser.o.
154 * tconfig.in: Conditionalize use of dv_sockser_install.
155 * configure: Regenerated.
156 * config.in: Regenerated.
158 2012-10-04 Chao-ying Fu <fu@mips.com>
159 Steve Ellcey <sellcey@mips.com>
161 * mips/mips3264r2.igen (rdhwr): New.
163 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
165 * configure.ac: Always link against dv-sockser.o.
166 * configure: Regenerate.
168 2012-06-15 Joel Brobecker <brobecker@adacore.com>
170 * config.in, configure: Regenerate.
172 2012-05-18 Nick Clifton <nickc@redhat.com>
175 * interp.c: Include config.h before system header files.
177 2012-03-24 Mike Frysinger <vapier@gentoo.org>
179 * aclocal.m4, config.in, configure: Regenerate.
181 2011-12-03 Mike Frysinger <vapier@gentoo.org>
183 * aclocal.m4: New file.
184 * configure: Regenerate.
186 2011-10-19 Mike Frysinger <vapier@gentoo.org>
188 * configure: Regenerate after common/acinclude.m4 update.
190 2011-10-17 Mike Frysinger <vapier@gentoo.org>
192 * configure.ac: Change include to common/acinclude.m4.
194 2011-10-17 Mike Frysinger <vapier@gentoo.org>
196 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
197 call. Replace common.m4 include with SIM_AC_COMMON.
198 * configure: Regenerate.
200 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
202 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
204 (tmp-mach-multi): Exit early when igen fails.
206 2011-07-05 Mike Frysinger <vapier@gentoo.org>
208 * interp.c (sim_do_command): Delete.
210 2011-02-14 Mike Frysinger <vapier@gentoo.org>
212 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
213 (tx3904sio_fifo_reset): Likewise.
214 * interp.c (sim_monitor): Likewise.
216 2010-04-14 Mike Frysinger <vapier@gentoo.org>
218 * interp.c (sim_write): Add const to buffer arg.
220 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
222 * interp.c: Don't include sysdep.h
224 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
226 * configure: Regenerate.
228 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
230 * config.in: Regenerate.
231 * configure: Likewise.
233 * configure: Regenerate.
235 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
237 * configure: Regenerate to track ../common/common.m4 changes.
240 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
241 Daniel Jacobowitz <dan@codesourcery.com>
242 Joseph Myers <joseph@codesourcery.com>
244 * configure: Regenerate.
246 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
248 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
249 that unconditionally allows fmt_ps.
250 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
251 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
252 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
253 filter from 64,f to 32,f.
254 (PREFX): Change filter from 64 to 32.
255 (LDXC1, LUXC1): Provide separate mips32r2 implementations
256 that use do_load_double instead of do_load. Make both LUXC1
257 versions unpredictable if SizeFGR () != 64.
258 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
259 instead of do_store. Remove unused variable. Make both SUXC1
260 versions unpredictable if SizeFGR () != 64.
262 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
264 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
265 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
266 shifts for that case.
268 2007-09-04 Nick Clifton <nickc@redhat.com>
270 * interp.c (options enum): Add OPTION_INFO_MEMORY.
271 (display_mem_info): New static variable.
272 (mips_option_handler): Handle OPTION_INFO_MEMORY.
273 (mips_options): Add info-memory and memory-info.
274 (sim_open): After processing the command line and board
275 specification, check display_mem_info. If it is set then
276 call the real handler for the --memory-info command line
279 2007-08-24 Joel Brobecker <brobecker@adacore.com>
281 * configure.ac: Change license of multi-run.c to GPL version 3.
282 * configure: Regenerate.
284 2007-06-28 Richard Sandiford <richard@codesourcery.com>
286 * configure.ac, configure: Revert last patch.
288 2007-06-26 Richard Sandiford <richard@codesourcery.com>
290 * configure.ac (sim_mipsisa3264_configs): New variable.
291 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
292 every configuration support all four targets, using the triplet to
293 determine the default.
294 * configure: Regenerate.
296 2007-06-25 Richard Sandiford <richard@codesourcery.com>
298 * Makefile.in (m16run.o): New rule.
300 2007-05-15 Thiemo Seufer <ths@mips.com>
302 * mips3264r2.igen (DSHD): Fix compile warning.
304 2007-05-14 Thiemo Seufer <ths@mips.com>
306 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
307 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
308 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
309 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
312 2007-03-01 Thiemo Seufer <ths@mips.com>
314 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
317 2007-02-20 Thiemo Seufer <ths@mips.com>
319 * dsp.igen: Update copyright notice.
320 * dsp2.igen: Fix copyright notice.
322 2007-02-20 Thiemo Seufer <ths@mips.com>
323 Chao-Ying Fu <fu@mips.com>
325 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
326 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
327 Add dsp2 to sim_igen_machine.
328 * configure: Regenerate.
329 * dsp.igen (do_ph_op): Add MUL support when op = 2.
330 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
331 (mulq_rs.ph): Use do_ph_mulq.
332 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
333 * mips.igen: Add dsp2 model and include dsp2.igen.
334 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
335 for *mips32r2, *mips64r2, *dsp.
336 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
337 for *mips32r2, *mips64r2, *dsp2.
338 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
340 2007-02-19 Thiemo Seufer <ths@mips.com>
341 Nigel Stephens <nigel@mips.com>
343 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
344 jumps with hazard barrier.
346 2007-02-19 Thiemo Seufer <ths@mips.com>
347 Nigel Stephens <nigel@mips.com>
349 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
350 after each call to sim_io_write.
352 2007-02-19 Thiemo Seufer <ths@mips.com>
353 Nigel Stephens <nigel@mips.com>
355 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
356 supported by this simulator.
357 (decode_coproc): Recognise additional CP0 Config registers
360 2007-02-19 Thiemo Seufer <ths@mips.com>
361 Nigel Stephens <nigel@mips.com>
362 David Ung <davidu@mips.com>
364 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
365 uninterpreted formats. If fmt is one of the uninterpreted types
366 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
367 fmt_word, and fmt_uninterpreted_64 like fmt_long.
368 (store_fpr): When writing an invalid odd register, set the
369 matching even register to fmt_unknown, not the following register.
370 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
371 the the memory window at offset 0 set by --memory-size command
373 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
375 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
377 (sim_monitor): When returning the memory size to the MIPS
378 application, use the value in STATE_MEM_SIZE, not an arbitrary
380 (cop_lw): Don' mess around with FPR_STATE, just pass
381 fmt_uninterpreted_32 to StoreFPR.
383 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
385 * mips.igen (not_word_value): Single version for mips32, mips64
388 2007-02-19 Thiemo Seufer <ths@mips.com>
389 Nigel Stephens <nigel@mips.com>
391 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
394 2007-02-17 Thiemo Seufer <ths@mips.com>
396 * configure.ac (mips*-sde-elf*): Move in front of generic machine
398 * configure: Regenerate.
400 2007-02-17 Thiemo Seufer <ths@mips.com>
402 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
403 Add mdmx to sim_igen_machine.
404 (mipsisa64*-*-*): Likewise. Remove dsp.
405 (mipsisa32*-*-*): Remove dsp.
406 * configure: Regenerate.
408 2007-02-13 Thiemo Seufer <ths@mips.com>
410 * configure.ac: Add mips*-sde-elf* target.
411 * configure: Regenerate.
413 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
415 * acconfig.h: Remove.
416 * config.in, configure: Regenerate.
418 2006-11-07 Thiemo Seufer <ths@mips.com>
420 * dsp.igen (do_w_op): Fix compiler warning.
422 2006-08-29 Thiemo Seufer <ths@mips.com>
423 David Ung <davidu@mips.com>
425 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
427 * configure: Regenerate.
428 * mips.igen (model): Add smartmips.
429 (MADDU): Increment ACX if carry.
430 (do_mult): Clear ACX.
431 (ROR,RORV): Add smartmips.
432 (include): Include smartmips.igen.
433 * sim-main.h (ACX): Set to REGISTERS[89].
434 * smartmips.igen: New file.
436 2006-08-29 Thiemo Seufer <ths@mips.com>
437 David Ung <davidu@mips.com>
439 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
440 mips3264r2.igen. Add missing dependency rules.
441 * m16e.igen: Support for mips16e save/restore instructions.
443 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
445 * configure: Regenerated.
447 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
449 * configure: Regenerated.
451 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
453 * configure: Regenerated.
455 2006-05-15 Chao-ying Fu <fu@mips.com>
457 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
459 2006-04-18 Nick Clifton <nickc@redhat.com>
461 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
464 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
466 * configure: Regenerate.
468 2005-12-14 Chao-ying Fu <fu@mips.com>
470 * Makefile.in (SIM_OBJS): Add dsp.o.
471 (dsp.o): New dependency.
472 (IGEN_INCLUDE): Add dsp.igen.
473 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
474 mipsisa64*-*-*): Add dsp to sim_igen_machine.
475 * configure: Regenerate.
476 * mips.igen: Add dsp model and include dsp.igen.
477 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
478 because these instructions are extended in DSP ASE.
479 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
480 adding 6 DSP accumulator registers and 1 DSP control register.
481 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
482 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
483 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
484 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
485 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
486 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
487 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
488 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
489 DSPCR_CCOND_SMASK): New define.
490 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
491 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
493 2005-07-08 Ian Lance Taylor <ian@airs.com>
495 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
497 2005-06-16 David Ung <davidu@mips.com>
498 Nigel Stephens <nigel@mips.com>
500 * mips.igen: New mips16e model and include m16e.igen.
501 (check_u64): Add mips16e tag.
502 * m16e.igen: New file for MIPS16e instructions.
503 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
504 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
506 * configure: Regenerate.
508 2005-05-26 David Ung <davidu@mips.com>
510 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
511 tags to all instructions which are applicable to the new ISAs.
512 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
514 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
516 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
518 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
519 * configure: Regenerate.
521 2005-03-23 Mark Kettenis <kettenis@gnu.org>
523 * configure: Regenerate.
525 2005-01-14 Andrew Cagney <cagney@gnu.org>
527 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
528 explicit call to AC_CONFIG_HEADER.
529 * configure: Regenerate.
531 2005-01-12 Andrew Cagney <cagney@gnu.org>
533 * configure.ac: Update to use ../common/common.m4.
534 * configure: Re-generate.
536 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
538 * configure: Regenerated to track ../common/aclocal.m4 changes.
540 2005-01-07 Andrew Cagney <cagney@gnu.org>
542 * configure.ac: Rename configure.in, require autoconf 2.59.
543 * configure: Re-generate.
545 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
547 * configure: Regenerate for ../common/aclocal.m4 update.
549 2004-09-24 Monika Chaddha <monika@acmet.com>
551 Committed by Andrew Cagney.
552 * m16.igen (CMP, CMPI): Fix assembler.
554 2004-08-18 Chris Demetriou <cgd@broadcom.com>
556 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
557 * configure: Regenerate.
559 2004-06-25 Chris Demetriou <cgd@broadcom.com>
561 * configure.in (sim_m16_machine): Include mipsIII.
562 * configure: Regenerate.
564 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
566 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
568 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
570 2004-04-10 Chris Demetriou <cgd@broadcom.com>
572 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
574 2004-04-09 Chris Demetriou <cgd@broadcom.com>
576 * mips.igen (check_fmt): Remove.
577 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
578 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
579 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
580 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
581 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
582 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
583 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
584 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
585 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
586 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
588 2004-04-09 Chris Demetriou <cgd@broadcom.com>
590 * sb1.igen (check_sbx): New function.
591 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
593 2004-03-29 Chris Demetriou <cgd@broadcom.com>
594 Richard Sandiford <rsandifo@redhat.com>
596 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
597 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
598 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
599 separate implementations for mipsIV and mipsV. Use new macros to
600 determine whether the restrictions apply.
602 2004-01-19 Chris Demetriou <cgd@broadcom.com>
604 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
605 (check_mult_hilo): Improve comments.
606 (check_div_hilo): Likewise. Also, fork off a new version
607 to handle mips32/mips64 (since there are no hazards to check
610 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
612 * mips.igen (do_dmultx): Fix check for negative operands.
614 2003-05-16 Ian Lance Taylor <ian@airs.com>
616 * Makefile.in (SHELL): Make sure this is defined.
617 (various): Use $(SHELL) whenever we invoke move-if-change.
619 2003-05-03 Chris Demetriou <cgd@broadcom.com>
621 * cp1.c: Tweak attribution slightly.
624 * mdmx.igen: Likewise.
625 * mips3d.igen: Likewise.
626 * sb1.igen: Likewise.
628 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
630 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
633 2003-02-27 Andrew Cagney <cagney@redhat.com>
635 * interp.c (sim_open): Rename _bfd to bfd.
636 (sim_create_inferior): Ditto.
638 2003-01-14 Chris Demetriou <cgd@broadcom.com>
640 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
642 2003-01-14 Chris Demetriou <cgd@broadcom.com>
644 * mips.igen (EI, DI): Remove.
646 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
648 * Makefile.in (tmp-run-multi): Fix mips16 filter.
650 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
651 Andrew Cagney <ac131313@redhat.com>
652 Gavin Romig-Koch <gavin@redhat.com>
653 Graydon Hoare <graydon@redhat.com>
654 Aldy Hernandez <aldyh@redhat.com>
655 Dave Brolley <brolley@redhat.com>
656 Chris Demetriou <cgd@broadcom.com>
658 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
659 (sim_mach_default): New variable.
660 (mips64vr-*-*, mips64vrel-*-*): New configurations.
661 Add a new simulator generator, MULTI.
662 * configure: Regenerate.
663 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
664 (multi-run.o): New dependency.
665 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
666 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
667 (tmp-multi): Combine them.
668 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
669 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
670 (distclean-extra): New rule.
671 * sim-main.h: Include bfd.h.
672 (MIPS_MACH): New macro.
673 * mips.igen (vr4120, vr5400, vr5500): New models.
674 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
675 * vr.igen: Replace with new version.
677 2003-01-04 Chris Demetriou <cgd@broadcom.com>
679 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
680 * configure: Regenerate.
682 2002-12-31 Chris Demetriou <cgd@broadcom.com>
684 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
685 * mips.igen: Remove all invocations of check_branch_bug and
688 2002-12-16 Chris Demetriou <cgd@broadcom.com>
690 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
692 2002-07-30 Chris Demetriou <cgd@broadcom.com>
694 * mips.igen (do_load_double, do_store_double): New functions.
695 (LDC1, SDC1): Rename to...
696 (LDC1b, SDC1b): respectively.
697 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
699 2002-07-29 Michael Snyder <msnyder@redhat.com>
701 * cp1.c (fp_recip2): Modify initialization expression so that
702 GCC will recognize it as constant.
704 2002-06-18 Chris Demetriou <cgd@broadcom.com>
706 * mdmx.c (SD_): Delete.
707 (Unpredictable): Re-define, for now, to directly invoke
708 unpredictable_action().
709 (mdmx_acc_op): Fix error in .ob immediate handling.
711 2002-06-18 Andrew Cagney <cagney@redhat.com>
713 * interp.c (sim_firmware_command): Initialize `address'.
715 2002-06-16 Andrew Cagney <ac131313@redhat.com>
717 * configure: Regenerated to track ../common/aclocal.m4 changes.
719 2002-06-14 Chris Demetriou <cgd@broadcom.com>
720 Ed Satterthwaite <ehs@broadcom.com>
722 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
723 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
724 * mips.igen: Include mips3d.igen.
725 (mips3d): New model name for MIPS-3D ASE instructions.
726 (CVT.W.fmt): Don't use this instruction for word (source) format
728 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
729 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
730 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
731 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
732 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
733 (RSquareRoot1, RSquareRoot2): New macros.
734 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
735 (fp_rsqrt2): New functions.
736 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
737 * configure: Regenerate.
739 2002-06-13 Chris Demetriou <cgd@broadcom.com>
740 Ed Satterthwaite <ehs@broadcom.com>
742 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
743 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
744 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
745 (convert): Note that this function is not used for paired-single
747 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
748 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
749 (check_fmt_p): Enable paired-single support.
750 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
751 (PUU.PS): New instructions.
752 (CVT.S.fmt): Don't use this instruction for paired-single format
754 * sim-main.h (FP_formats): New value 'fmt_ps.'
755 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
756 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
758 2002-06-12 Chris Demetriou <cgd@broadcom.com>
760 * mips.igen: Fix formatting of function calls in
763 2002-06-12 Chris Demetriou <cgd@broadcom.com>
765 * mips.igen (MOVN, MOVZ): Trace result.
766 (TNEI): Print "tnei" as the opcode name in traces.
767 (CEIL.W): Add disassembly string for traces.
768 (RSQRT.fmt): Make location of disassembly string consistent
769 with other instructions.
771 2002-06-12 Chris Demetriou <cgd@broadcom.com>
773 * mips.igen (X): Delete unused function.
775 2002-06-08 Andrew Cagney <cagney@redhat.com>
777 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
779 2002-06-07 Chris Demetriou <cgd@broadcom.com>
780 Ed Satterthwaite <ehs@broadcom.com>
782 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
783 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
784 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
785 (fp_nmsub): New prototypes.
786 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
787 (NegMultiplySub): New defines.
788 * mips.igen (RSQRT.fmt): Use RSquareRoot().
789 (MADD.D, MADD.S): Replace with...
790 (MADD.fmt): New instruction.
791 (MSUB.D, MSUB.S): Replace with...
792 (MSUB.fmt): New instruction.
793 (NMADD.D, NMADD.S): Replace with...
794 (NMADD.fmt): New instruction.
795 (NMSUB.D, MSUB.S): Replace with...
796 (NMSUB.fmt): New instruction.
798 2002-06-07 Chris Demetriou <cgd@broadcom.com>
799 Ed Satterthwaite <ehs@broadcom.com>
801 * cp1.c: Fix more comment spelling and formatting.
802 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
803 (denorm_mode): New function.
804 (fpu_unary, fpu_binary): Round results after operation, collect
805 status from rounding operations, and update the FCSR.
806 (convert): Collect status from integer conversions and rounding
807 operations, and update the FCSR. Adjust NaN values that result
808 from conversions. Convert to use sim_io_eprintf rather than
809 fprintf, and remove some debugging code.
810 * cp1.h (fenr_FS): New define.
812 2002-06-07 Chris Demetriou <cgd@broadcom.com>
814 * cp1.c (convert): Remove unusable debugging code, and move MIPS
815 rounding mode to sim FP rounding mode flag conversion code into...
816 (rounding_mode): New function.
818 2002-06-07 Chris Demetriou <cgd@broadcom.com>
820 * cp1.c: Clean up formatting of a few comments.
821 (value_fpr): Reformat switch statement.
823 2002-06-06 Chris Demetriou <cgd@broadcom.com>
824 Ed Satterthwaite <ehs@broadcom.com>
827 * sim-main.h: Include cp1.h.
828 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
829 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
830 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
831 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
832 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
833 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
834 * cp1.c: Don't include sim-fpu.h; already included by
835 sim-main.h. Clean up formatting of some comments.
836 (NaN, Equal, Less): Remove.
837 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
838 (fp_cmp): New functions.
839 * mips.igen (do_c_cond_fmt): Remove.
840 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
841 Compare. Add result tracing.
842 (CxC1): Remove, replace with...
843 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
844 (DMxC1): Remove, replace with...
845 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
846 (MxC1): Remove, replace with...
847 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
849 2002-06-04 Chris Demetriou <cgd@broadcom.com>
851 * sim-main.h (FGRIDX): Remove, replace all uses with...
852 (FGR_BASE): New macro.
853 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
854 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
855 (NR_FGR, FGR): Likewise.
856 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
857 * mips.igen: Likewise.
859 2002-06-04 Chris Demetriou <cgd@broadcom.com>
861 * cp1.c: Add an FSF Copyright notice to this file.
863 2002-06-04 Chris Demetriou <cgd@broadcom.com>
864 Ed Satterthwaite <ehs@broadcom.com>
866 * cp1.c (Infinity): Remove.
867 * sim-main.h (Infinity): Likewise.
869 * cp1.c (fp_unary, fp_binary): New functions.
870 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
871 (fp_sqrt): New functions, implemented in terms of the above.
872 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
873 (Recip, SquareRoot): Remove (replaced by functions above).
874 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
875 (fp_recip, fp_sqrt): New prototypes.
876 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
877 (Recip, SquareRoot): Replace prototypes with #defines which
878 invoke the functions above.
880 2002-06-03 Chris Demetriou <cgd@broadcom.com>
882 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
883 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
884 file, remove PARAMS from prototypes.
885 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
886 simulator state arguments.
887 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
888 pass simulator state arguments.
889 * cp1.c (SD): Redefine as CPU_STATE(cpu).
890 (store_fpr, convert): Remove 'sd' argument.
891 (value_fpr): Likewise. Convert to use 'SD' instead.
893 2002-06-03 Chris Demetriou <cgd@broadcom.com>
895 * cp1.c (Min, Max): Remove #if 0'd functions.
896 * sim-main.h (Min, Max): Remove.
898 2002-06-03 Chris Demetriou <cgd@broadcom.com>
900 * cp1.c: fix formatting of switch case and default labels.
901 * interp.c: Likewise.
902 * sim-main.c: Likewise.
904 2002-06-03 Chris Demetriou <cgd@broadcom.com>
906 * cp1.c: Clean up comments which describe FP formats.
907 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
909 2002-06-03 Chris Demetriou <cgd@broadcom.com>
910 Ed Satterthwaite <ehs@broadcom.com>
912 * configure.in (mipsisa64sb1*-*-*): New target for supporting
913 Broadcom SiByte SB-1 processor configurations.
914 * configure: Regenerate.
915 * sb1.igen: New file.
916 * mips.igen: Include sb1.igen.
918 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
919 * mdmx.igen: Add "sb1" model to all appropriate functions and
921 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
922 (ob_func, ob_acc): Reference the above.
923 (qh_acc): Adjust to keep the same size as ob_acc.
924 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
925 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
927 2002-06-03 Chris Demetriou <cgd@broadcom.com>
929 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
931 2002-06-02 Chris Demetriou <cgd@broadcom.com>
932 Ed Satterthwaite <ehs@broadcom.com>
934 * mips.igen (mdmx): New (pseudo-)model.
935 * mdmx.c, mdmx.igen: New files.
936 * Makefile.in (SIM_OBJS): Add mdmx.o.
937 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
939 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
940 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
941 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
942 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
943 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
944 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
945 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
946 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
947 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
948 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
949 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
950 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
951 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
952 (qh_fmtsel): New macros.
953 (_sim_cpu): New member "acc".
954 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
955 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
957 2002-05-01 Chris Demetriou <cgd@broadcom.com>
959 * interp.c: Use 'deprecated' rather than 'depreciated.'
960 * sim-main.h: Likewise.
962 2002-05-01 Chris Demetriou <cgd@broadcom.com>
964 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
965 which wouldn't compile anyway.
966 * sim-main.h (unpredictable_action): New function prototype.
967 (Unpredictable): Define to call igen function unpredictable().
968 (NotWordValue): New macro to call igen function not_word_value().
969 (UndefinedResult): Remove.
970 * interp.c (undefined_result): Remove.
971 (unpredictable_action): New function.
972 * mips.igen (not_word_value, unpredictable): New functions.
973 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
974 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
975 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
976 NotWordValue() to check for unpredictable inputs, then
977 Unpredictable() to handle them.
979 2002-02-24 Chris Demetriou <cgd@broadcom.com>
981 * mips.igen: Fix formatting of calls to Unpredictable().
983 2002-04-20 Andrew Cagney <ac131313@redhat.com>
985 * interp.c (sim_open): Revert previous change.
987 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
989 * interp.c (sim_open): Disable chunk of code that wrote code in
990 vector table entries.
992 2002-03-19 Chris Demetriou <cgd@broadcom.com>
994 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
995 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
998 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1000 * cp1.c: Fix many formatting issues.
1002 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1004 * cp1.c (fpu_format_name): New function to replace...
1005 (DOFMT): This. Delete, and update all callers.
1006 (fpu_rounding_mode_name): New function to replace...
1007 (RMMODE): This. Delete, and update all callers.
1009 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1011 * interp.c: Move FPU support routines from here to...
1012 * cp1.c: Here. New file.
1013 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1014 (cp1.o): New target.
1016 2002-03-12 Chris Demetriou <cgd@broadcom.com>
1018 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1019 * mips.igen (mips32, mips64): New models, add to all instructions
1020 and functions as appropriate.
1021 (loadstore_ea, check_u64): New variant for model mips64.
1022 (check_fmt_p): New variant for models mipsV and mips64, remove
1023 mipsV model marking fro other variant.
1026 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1027 for mips32 and mips64.
1028 (DCLO, DCLZ): New instructions for mips64.
1030 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1032 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1033 immediate or code as a hex value with the "%#lx" format.
1034 (ANDI): Likewise, and fix printed instruction name.
1036 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1038 * sim-main.h (UndefinedResult, Unpredictable): New macros
1039 which currently do nothing.
1041 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1043 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1044 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1045 (status_CU3): New definitions.
1047 * sim-main.h (ExceptionCause): Add new values for MIPS32
1048 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1049 for DebugBreakPoint and NMIReset to note their status in
1051 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1052 (SignalExceptionCacheErr): New exception macros.
1054 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1056 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1057 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1059 (SignalExceptionCoProcessorUnusable): Take as argument the
1060 unusable coprocessor number.
1062 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1064 * mips.igen: Fix formatting of all SignalException calls.
1066 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1068 * sim-main.h (SIGNEXTEND): Remove.
1070 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1072 * mips.igen: Remove gencode comment from top of file, fix
1073 spelling in another comment.
1075 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1077 * mips.igen (check_fmt, check_fmt_p): New functions to check
1078 whether specific floating point formats are usable.
1079 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1080 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1081 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1082 Use the new functions.
1083 (do_c_cond_fmt): Remove format checks...
1084 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1086 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1088 * mips.igen: Fix formatting of check_fpu calls.
1090 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1092 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1094 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1096 * mips.igen: Remove whitespace at end of lines.
1098 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1100 * mips.igen (loadstore_ea): New function to do effective
1101 address calculations.
1102 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1103 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1104 CACHE): Use loadstore_ea to do effective address computations.
1106 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1108 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1109 * mips.igen (LL, CxC1, MxC1): Likewise.
1111 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1113 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1114 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1115 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1116 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1117 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1118 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1119 Don't split opcode fields by hand, use the opcode field values
1122 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1124 * mips.igen (do_divu): Fix spacing.
1126 * mips.igen (do_dsllv): Move to be right before DSLLV,
1127 to match the rest of the do_<shift> functions.
1129 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1131 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1132 DSRL32, do_dsrlv): Trace inputs and results.
1134 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1136 * mips.igen (CACHE): Provide instruction-printing string.
1138 * interp.c (signal_exception): Comment tokens after #endif.
1140 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1142 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1143 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1144 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1145 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1146 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1147 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1148 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1149 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1151 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1153 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1154 instruction-printing string.
1155 (LWU): Use '64' as the filter flag.
1157 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1159 * mips.igen (SDXC1): Fix instruction-printing string.
1161 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1163 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1164 filter flags "32,f".
1166 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1168 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1171 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1173 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1174 add a comma) so that it more closely match the MIPS ISA
1175 documentation opcode partitioning.
1176 (PREF): Put useful names on opcode fields, and include
1177 instruction-printing string.
1179 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1181 * mips.igen (check_u64): New function which in the future will
1182 check whether 64-bit instructions are usable and signal an
1183 exception if not. Currently a no-op.
1184 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1185 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1186 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1187 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1189 * mips.igen (check_fpu): New function which in the future will
1190 check whether FPU instructions are usable and signal an exception
1191 if not. Currently a no-op.
1192 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1193 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1194 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1195 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1196 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1197 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1198 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1199 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1201 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1203 * mips.igen (do_load_left, do_load_right): Move to be immediately
1205 (do_store_left, do_store_right): Move to be immediately following
1208 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1210 * mips.igen (mipsV): New model name. Also, add it to
1211 all instructions and functions where it is appropriate.
1213 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1215 * mips.igen: For all functions and instructions, list model
1216 names that support that instruction one per line.
1218 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1220 * mips.igen: Add some additional comments about supported
1221 models, and about which instructions go where.
1222 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1223 order as is used in the rest of the file.
1225 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1227 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1228 indicating that ALU32_END or ALU64_END are there to check
1230 (DADD): Likewise, but also remove previous comment about
1233 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1235 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1236 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1237 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1238 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1239 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1240 fields (i.e., add and move commas) so that they more closely
1241 match the MIPS ISA documentation opcode partitioning.
1243 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1245 * mips.igen (ADDI): Print immediate value.
1246 (BREAK): Print code.
1247 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1248 (SLL): Print "nop" specially, and don't run the code
1249 that does the shift for the "nop" case.
1251 2001-11-17 Fred Fish <fnf@redhat.com>
1253 * sim-main.h (float_operation): Move enum declaration outside
1254 of _sim_cpu struct declaration.
1256 2001-04-12 Jim Blandy <jimb@redhat.com>
1258 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1259 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1261 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1262 PENDING_FILL, and you can get the intended effect gracefully by
1263 calling PENDING_SCHED directly.
1265 2001-02-23 Ben Elliston <bje@redhat.com>
1267 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1268 already defined elsewhere.
1270 2001-02-19 Ben Elliston <bje@redhat.com>
1272 * sim-main.h (sim_monitor): Return an int.
1273 * interp.c (sim_monitor): Add return values.
1274 (signal_exception): Handle error conditions from sim_monitor.
1276 2001-02-08 Ben Elliston <bje@redhat.com>
1278 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1279 (store_memory): Likewise, pass cia to sim_core_write*.
1281 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1283 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1284 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1286 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1288 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1289 * Makefile.in: Don't delete *.igen when cleaning directory.
1291 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1293 * m16.igen (break): Call SignalException not sim_engine_halt.
1295 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1297 From Jason Eckhardt:
1298 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1300 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1302 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1304 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1306 * mips.igen (do_dmultx): Fix typo.
1308 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1310 * configure: Regenerated to track ../common/aclocal.m4 changes.
1312 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1314 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1316 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1318 * sim-main.h (GPR_CLEAR): Define macro.
1320 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1322 * interp.c (decode_coproc): Output long using %lx and not %s.
1324 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1326 * interp.c (sim_open): Sort & extend dummy memory regions for
1327 --board=jmr3904 for eCos.
1329 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1331 * configure: Regenerated.
1333 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1335 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1336 calls, conditional on the simulator being in verbose mode.
1338 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1340 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1341 cache don't get ReservedInstruction traps.
1343 1999-11-29 Mark Salter <msalter@cygnus.com>
1345 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1346 to clear status bits in sdisr register. This is how the hardware works.
1348 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1349 being used by cygmon.
1351 1999-11-11 Andrew Haley <aph@cygnus.com>
1353 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1356 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1358 * mips.igen (MULT): Correct previous mis-applied patch.
1360 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1362 * mips.igen (delayslot32): Handle sequence like
1363 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1364 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1365 (MULT): Actually pass the third register...
1367 1999-09-03 Mark Salter <msalter@cygnus.com>
1369 * interp.c (sim_open): Added more memory aliases for additional
1370 hardware being touched by cygmon on jmr3904 board.
1372 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1374 * configure: Regenerated to track ../common/aclocal.m4 changes.
1376 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1378 * interp.c (sim_store_register): Handle case where client - GDB -
1379 specifies that a 4 byte register is 8 bytes in size.
1380 (sim_fetch_register): Ditto.
1382 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1384 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1385 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1386 (idt_monitor_base): Base address for IDT monitor traps.
1387 (pmon_monitor_base): Ditto for PMON.
1388 (lsipmon_monitor_base): Ditto for LSI PMON.
1389 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1390 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1391 (sim_firmware_command): New function.
1392 (mips_option_handler): Call it for OPTION_FIRMWARE.
1393 (sim_open): Allocate memory for idt_monitor region. If "--board"
1394 option was given, add no monitor by default. Add BREAK hooks only if
1395 monitors are also there.
1397 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1399 * interp.c (sim_monitor): Flush output before reading input.
1401 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1403 * tconfig.in (SIM_HANDLES_LMA): Always define.
1405 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1407 From Mark Salter <msalter@cygnus.com>:
1408 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1409 (sim_open): Add setup for BSP board.
1411 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1413 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1414 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1415 them as unimplemented.
1417 1999-05-08 Felix Lee <flee@cygnus.com>
1419 * configure: Regenerated to track ../common/aclocal.m4 changes.
1421 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1423 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1425 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1427 * configure.in: Any mips64vr5*-*-* target should have
1428 -DTARGET_ENABLE_FR=1.
1429 (default_endian): Any mips64vr*el-*-* target should default to
1431 * configure: Re-generate.
1433 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1435 * mips.igen (ldl): Extend from _16_, not 32.
1437 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1439 * interp.c (sim_store_register): Force registers written to by GDB
1440 into an un-interpreted state.
1442 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1444 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1445 CPU, start periodic background I/O polls.
1446 (tx3904sio_poll): New function: periodic I/O poller.
1448 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1450 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1452 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1454 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1457 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1459 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1460 (load_word): Call SIM_CORE_SIGNAL hook on error.
1461 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1462 starting. For exception dispatching, pass PC instead of NULL_CIA.
1463 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1464 * sim-main.h (COP0_BADVADDR): Define.
1465 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1466 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1467 (_sim_cpu): Add exc_* fields to store register value snapshots.
1468 * mips.igen (*): Replace memory-related SignalException* calls
1469 with references to SIM_CORE_SIGNAL hook.
1471 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1473 * sim-main.c (*): Minor warning cleanups.
1475 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1477 * m16.igen (DADDIU5): Correct type-o.
1479 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1481 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1484 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1486 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1488 (interp.o): Add dependency on itable.h
1489 (oengine.c, gencode): Delete remaining references.
1490 (BUILT_SRC_FROM_GEN): Clean up.
1492 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1495 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1496 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1497 tmp-run-hack) : New.
1498 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1499 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1500 Drop the "64" qualifier to get the HACK generator working.
1501 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1502 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1503 qualifier to get the hack generator working.
1504 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1505 (DSLL): Use do_dsll.
1506 (DSLLV): Use do_dsllv.
1507 (DSRA): Use do_dsra.
1508 (DSRL): Use do_dsrl.
1509 (DSRLV): Use do_dsrlv.
1510 (BC1): Move *vr4100 to get the HACK generator working.
1511 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1512 get the HACK generator working.
1513 (MACC) Rename to get the HACK generator working.
1514 (DMACC,MACCS,DMACCS): Add the 64.
1516 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1518 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1519 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1521 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1523 * mips/interp.c (DEBUG): Cleanups.
1525 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1527 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1528 (tx3904sio_tickle): fflush after a stdout character output.
1530 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1532 * interp.c (sim_close): Uninstall modules.
1534 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1536 * sim-main.h, interp.c (sim_monitor): Change to global
1539 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1541 * configure.in (vr4100): Only include vr4100 instructions in
1543 * configure: Re-generate.
1544 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1546 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1548 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1549 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1552 * configure.in (sim_default_gen, sim_use_gen): Replace with
1554 (--enable-sim-igen): Delete config option. Always using IGEN.
1555 * configure: Re-generate.
1557 * Makefile.in (gencode): Kill, kill, kill.
1560 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1562 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1563 bit mips16 igen simulator.
1564 * configure: Re-generate.
1566 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1567 as part of vr4100 ISA.
1568 * vr.igen: Mark all instructions as 64 bit only.
1570 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1572 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1575 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1577 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1578 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1579 * configure: Re-generate.
1581 * m16.igen (BREAK): Define breakpoint instruction.
1582 (JALX32): Mark instruction as mips16 and not r3900.
1583 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1585 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1587 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1589 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1590 insn as a debug breakpoint.
1592 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1594 (PENDING_SCHED): Clean up trace statement.
1595 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1596 (PENDING_FILL): Delay write by only one cycle.
1597 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1599 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1601 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1603 (pending_tick): Move incrementing of index to FOR statement.
1604 (pending_tick): Only update PENDING_OUT after a write has occured.
1606 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1608 * configure: Re-generate.
1610 * interp.c (sim_engine_run OLD): Delete explicit call to
1611 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1613 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1615 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1616 interrupt level number to match changed SignalExceptionInterrupt
1619 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1621 * interp.c: #include "itable.h" if WITH_IGEN.
1622 (get_insn_name): New function.
1623 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1624 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1626 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1628 * configure: Rebuilt to inhale new common/aclocal.m4.
1630 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1632 * dv-tx3904sio.c: Include sim-assert.h.
1634 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1636 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1637 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1638 Reorganize target-specific sim-hardware checks.
1639 * configure: rebuilt.
1640 * interp.c (sim_open): For tx39 target boards, set
1641 OPERATING_ENVIRONMENT, add tx3904sio devices.
1642 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1643 ROM executables. Install dv-sockser into sim-modules list.
1645 * dv-tx3904irc.c: Compiler warning clean-up.
1646 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1647 frequent hw-trace messages.
1649 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1651 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1653 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1655 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1657 * vr.igen: New file.
1658 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1659 * mips.igen: Define vr4100 model. Include vr.igen.
1660 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1662 * mips.igen (check_mf_hilo): Correct check.
1664 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1666 * sim-main.h (interrupt_event): Add prototype.
1668 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1669 register_ptr, register_value.
1670 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1672 * sim-main.h (tracefh): Make extern.
1674 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1676 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1677 Reduce unnecessarily high timer event frequency.
1678 * dv-tx3904cpu.c: Ditto for interrupt event.
1680 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1682 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1684 (interrupt_event): Made non-static.
1686 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1687 interchange of configuration values for external vs. internal
1690 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1692 * mips.igen (BREAK): Moved code to here for
1693 simulator-reserved break instructions.
1694 * gencode.c (build_instruction): Ditto.
1695 * interp.c (signal_exception): Code moved from here. Non-
1696 reserved instructions now use exception vector, rather
1698 * sim-main.h: Moved magic constants to here.
1700 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1702 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1703 register upon non-zero interrupt event level, clear upon zero
1705 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1706 by passing zero event value.
1707 (*_io_{read,write}_buffer): Endianness fixes.
1708 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1709 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1711 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1712 serial I/O and timer module at base address 0xFFFF0000.
1714 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1716 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1719 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1721 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1723 * configure: Update.
1725 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1727 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1728 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1729 * configure.in: Include tx3904tmr in hw_device list.
1730 * configure: Rebuilt.
1731 * interp.c (sim_open): Instantiate three timer instances.
1732 Fix address typo of tx3904irc instance.
1734 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1736 * interp.c (signal_exception): SystemCall exception now uses
1737 the exception vector.
1739 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1741 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1744 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1746 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1748 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1750 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1752 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1753 sim-main.h. Declare a struct hw_descriptor instead of struct
1754 hw_device_descriptor.
1756 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1758 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1759 right bits and then re-align left hand bytes to correct byte
1760 lanes. Fix incorrect computation in do_store_left when loading
1761 bytes from second word.
1763 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1765 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1766 * interp.c (sim_open): Only create a device tree when HW is
1769 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1770 * interp.c (signal_exception): Ditto.
1772 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1774 * gencode.c: Mark BEGEZALL as LIKELY.
1776 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1778 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1779 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1781 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1783 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1784 modules. Recognize TX39 target with "mips*tx39" pattern.
1785 * configure: Rebuilt.
1786 * sim-main.h (*): Added many macros defining bits in
1787 TX39 control registers.
1788 (SignalInterrupt): Send actual PC instead of NULL.
1789 (SignalNMIReset): New exception type.
1790 * interp.c (board): New variable for future use to identify
1791 a particular board being simulated.
1792 (mips_option_handler,mips_options): Added "--board" option.
1793 (interrupt_event): Send actual PC.
1794 (sim_open): Make memory layout conditional on board setting.
1795 (signal_exception): Initial implementation of hardware interrupt
1796 handling. Accept another break instruction variant for simulator
1798 (decode_coproc): Implement RFE instruction for TX39.
1799 (mips.igen): Decode RFE instruction as such.
1800 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1801 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1802 bbegin to implement memory map.
1803 * dv-tx3904cpu.c: New file.
1804 * dv-tx3904irc.c: New file.
1806 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
1808 * mips.igen (check_mt_hilo): Create a separate r3900 version.
1810 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
1812 * tx.igen (madd,maddu): Replace calls to check_op_hilo
1813 with calls to check_div_hilo.
1815 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
1817 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1818 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1819 Add special r3900 version of do_mult_hilo.
1820 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1821 with calls to check_mult_hilo.
1822 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1823 with calls to check_div_hilo.
1825 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
1827 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1828 Document a replacement.
1830 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
1832 * interp.c (sim_monitor): Make mon_printf work.
1834 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
1836 * sim-main.h (INSN_NAME): New arg `cpu'.
1838 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
1840 * configure: Regenerated to track ../common/aclocal.m4 changes.
1842 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
1844 * configure: Regenerated to track ../common/aclocal.m4 changes.
1847 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
1849 * acconfig.h: New file.
1850 * configure.in: Reverted change of Apr 24; use sinclude again.
1852 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
1854 * configure: Regenerated to track ../common/aclocal.m4 changes.
1857 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
1859 * configure.in: Don't call sinclude.
1861 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
1863 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1865 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1867 * mips.igen (ERET): Implement.
1869 * interp.c (decode_coproc): Return sign-extended EPC.
1871 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1873 * interp.c (signal_exception): Do not ignore Trap.
1874 (signal_exception): On TRAP, restart at exception address.
1875 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1876 (signal_exception): Update.
1877 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1878 so that TRAP instructions are caught.
1880 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
1882 * sim-main.h (struct hilo_access, struct hilo_history): Define,
1883 contains HI/LO access history.
1884 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1885 (HIACCESS, LOACCESS): Delete, replace with
1886 (HIHISTORY, LOHISTORY): New macros.
1887 (CHECKHILO): Delete all, moved to mips.igen
1889 * gencode.c (build_instruction): Do not generate checks for
1890 correct HI/LO register usage.
1892 * interp.c (old_engine_run): Delete checks for correct HI/LO
1895 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1896 check_mf_cycles): New functions.
1897 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1898 do_divu, domultx, do_mult, do_multu): Use.
1900 * tx.igen ("madd", "maddu"): Use.
1902 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
1904 * mips.igen (DSRAV): Use function do_dsrav.
1905 (SRAV): Use new function do_srav.
1907 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1908 (B): Sign extend 11 bit immediate.
1909 (EXT-B*): Shift 16 bit immediate left by 1.
1910 (ADDIU*): Don't sign extend immediate value.
1912 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1914 * m16run.c (sim_engine_run): Restore CIA after handling an event.
1916 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1919 * mips.igen (delayslot32, nullify_next_insn): New functions.
1920 (m16.igen): Always include.
1921 (do_*): Add more tracing.
1923 * m16.igen (delayslot16): Add NIA argument, could be called by a
1924 32 bit MIPS16 instruction.
1926 * interp.c (ifetch16): Move function from here.
1927 * sim-main.c (ifetch16): To here.
1929 * sim-main.c (ifetch16, ifetch32): Update to match current
1930 implementations of LH, LW.
1931 (signal_exception): Don't print out incorrect hex value of illegal
1934 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1936 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1939 * m16.igen: Implement MIPS16 instructions.
1941 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1942 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1943 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1944 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1945 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
1946 bodies of corresponding code from 32 bit insn to these. Also used
1947 by MIPS16 versions of functions.
1949 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1950 (IMEM16): Drop NR argument from macro.
1952 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1954 * Makefile.in (SIM_OBJS): Add sim-main.o.
1956 * sim-main.h (address_translation, load_memory, store_memory,
1957 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1959 (pr_addr, pr_uword64): Declare.
1960 (sim-main.c): Include when H_REVEALS_MODULE_P.
1962 * interp.c (address_translation, load_memory, store_memory,
1963 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1965 * sim-main.c: To here. Fix compilation problems.
1967 * configure.in: Enable inlining.
1968 * configure: Re-config.
1970 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1972 * configure: Regenerated to track ../common/aclocal.m4 changes.
1974 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1976 * mips.igen: Include tx.igen.
1977 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1978 * tx.igen: New file, contains MADD and MADDU.
1980 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1981 the hardwired constant `7'.
1982 (store_memory): Ditto.
1983 (LOADDRMASK): Move definition to sim-main.h.
1985 mips.igen (MTC0): Enable for r3900.
1988 mips.igen (do_load_byte): Delete.
1989 (do_load, do_store, do_load_left, do_load_write, do_store_left,
1990 do_store_right): New functions.
1991 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1993 configure.in: Let the tx39 use igen again.
1996 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1998 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1999 not an address sized quantity. Return zero for cache sizes.
2001 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
2003 * mips.igen (r3900): r3900 does not support 64 bit integer
2006 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
2008 * configure.in (mipstx39*-*-*): Use gencode simulator rather
2010 * configure : Rebuild.
2012 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
2014 * configure: Regenerated to track ../common/aclocal.m4 changes.
2016 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2018 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2020 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
2022 * configure: Regenerated to track ../common/aclocal.m4 changes.
2023 * config.in: Regenerated to track ../common/aclocal.m4 changes.
2025 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2027 * configure: Regenerated to track ../common/aclocal.m4 changes.
2029 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2031 * interp.c (Max, Min): Comment out functions. Not yet used.
2033 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2035 * configure: Regenerated to track ../common/aclocal.m4 changes.
2037 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2039 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2040 configurable settings for stand-alone simulator.
2042 * configure.in: Added X11 search, just in case.
2044 * configure: Regenerated.
2046 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2048 * interp.c (sim_write, sim_read, load_memory, store_memory):
2049 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2051 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2053 * sim-main.h (GETFCC): Return an unsigned value.
2055 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2057 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2058 (DADD): Result destination is RD not RT.
2060 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2062 * sim-main.h (HIACCESS, LOACCESS): Always define.
2064 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2066 * interp.c (sim_info): Delete.
2068 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2070 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2071 (mips_option_handler): New argument `cpu'.
2072 (sim_open): Update call to sim_add_option_table.
2074 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2076 * mips.igen (CxC1): Add tracing.
2078 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2080 * sim-main.h (Max, Min): Declare.
2082 * interp.c (Max, Min): New functions.
2084 * mips.igen (BC1): Add tracing.
2086 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2088 * interp.c Added memory map for stack in vr4100
2090 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2092 * interp.c (load_memory): Add missing "break"'s.
2094 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2096 * interp.c (sim_store_register, sim_fetch_register): Pass in
2097 length parameter. Return -1.
2099 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2101 * interp.c: Added hardware init hook, fixed warnings.
2103 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2105 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2107 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2109 * interp.c (ifetch16): New function.
2111 * sim-main.h (IMEM32): Rename IMEM.
2112 (IMEM16_IMMED): Define.
2114 (DELAY_SLOT): Update.
2116 * m16run.c (sim_engine_run): New file.
2118 * m16.igen: All instructions except LB.
2119 (LB): Call do_load_byte.
2120 * mips.igen (do_load_byte): New function.
2121 (LB): Call do_load_byte.
2123 * mips.igen: Move spec for insn bit size and high bit from here.
2124 * Makefile.in (tmp-igen, tmp-m16): To here.
2126 * m16.dc: New file, decode mips16 instructions.
2128 * Makefile.in (SIM_NO_ALL): Define.
2129 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2131 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2133 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2134 point unit to 32 bit registers.
2135 * configure: Re-generate.
2137 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2139 * configure.in (sim_use_gen): Make IGEN the default simulator
2140 generator for generic 32 and 64 bit mips targets.
2141 * configure: Re-generate.
2143 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2145 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2148 * interp.c (sim_fetch_register, sim_store_register): Read/write
2149 FGR from correct location.
2150 (sim_open): Set size of FGR's according to
2151 WITH_TARGET_FLOATING_POINT_BITSIZE.
2153 * sim-main.h (FGR): Store floating point registers in a separate
2156 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2158 * configure: Regenerated to track ../common/aclocal.m4 changes.
2160 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2162 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2164 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2166 * interp.c (pending_tick): New function. Deliver pending writes.
2168 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2169 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2170 it can handle mixed sized quantites and single bits.
2172 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2174 * interp.c (oengine.h): Do not include when building with IGEN.
2175 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2176 (sim_info): Ditto for PROCESSOR_64BIT.
2177 (sim_monitor): Replace ut_reg with unsigned_word.
2178 (*): Ditto for t_reg.
2179 (LOADDRMASK): Define.
2180 (sim_open): Remove defunct check that host FP is IEEE compliant,
2181 using software to emulate floating point.
2182 (value_fpr, ...): Always compile, was conditional on HASFPU.
2184 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2186 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2189 * interp.c (SD, CPU): Define.
2190 (mips_option_handler): Set flags in each CPU.
2191 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2192 (sim_close): Do not clear STATE, deleted anyway.
2193 (sim_write, sim_read): Assume CPU zero's vm should be used for
2195 (sim_create_inferior): Set the PC for all processors.
2196 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2198 (mips16_entry): Pass correct nr of args to store_word, load_word.
2199 (ColdReset): Cold reset all cpu's.
2200 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2201 (sim_monitor, load_memory, store_memory, signal_exception): Use
2202 `CPU' instead of STATE_CPU.
2205 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2208 * sim-main.h (signal_exception): Add sim_cpu arg.
2209 (SignalException*): Pass both SD and CPU to signal_exception.
2210 * interp.c (signal_exception): Update.
2212 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2214 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2215 address_translation): Ditto
2216 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2218 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2220 * configure: Regenerated to track ../common/aclocal.m4 changes.
2222 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2224 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2226 * mips.igen (model): Map processor names onto BFD name.
2228 * sim-main.h (CPU_CIA): Delete.
2229 (SET_CIA, GET_CIA): Define
2231 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2233 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2236 * configure.in (default_endian): Configure a big-endian simulator
2238 * configure: Re-generate.
2240 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2242 * configure: Regenerated to track ../common/aclocal.m4 changes.
2244 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2246 * interp.c (sim_monitor): Handle Densan monitor outbyte
2247 and inbyte functions.
2249 1997-12-29 Felix Lee <flee@cygnus.com>
2251 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2253 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2255 * Makefile.in (tmp-igen): Arrange for $zero to always be
2256 reset to zero after every instruction.
2258 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2260 * configure: Regenerated to track ../common/aclocal.m4 changes.
2263 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2265 * mips.igen (MSUB): Fix to work like MADD.
2266 * gencode.c (MSUB): Similarly.
2268 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2270 * configure: Regenerated to track ../common/aclocal.m4 changes.
2272 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2274 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2276 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2278 * sim-main.h (sim-fpu.h): Include.
2280 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2281 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2282 using host independant sim_fpu module.
2284 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2286 * interp.c (signal_exception): Report internal errors with SIGABRT
2289 * sim-main.h (C0_CONFIG): New register.
2290 (signal.h): No longer include.
2292 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2294 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2296 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2298 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2300 * mips.igen: Tag vr5000 instructions.
2301 (ANDI): Was missing mipsIV model, fix assembler syntax.
2302 (do_c_cond_fmt): New function.
2303 (C.cond.fmt): Handle mips I-III which do not support CC field
2305 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2306 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2308 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2309 vr5000 which saves LO in a GPR separatly.
2311 * configure.in (enable-sim-igen): For vr5000, select vr5000
2312 specific instructions.
2313 * configure: Re-generate.
2315 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2317 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2319 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2320 fmt_uninterpreted_64 bit cases to switch. Convert to
2323 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2325 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2326 as specified in IV3.2 spec.
2327 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2329 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2331 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2332 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2333 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2334 PENDING_FILL versions of instructions. Simplify.
2336 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2338 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2340 (MTHI, MFHI): Disable code checking HI-LO.
2342 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2344 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2346 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2348 * gencode.c (build_mips16_operands): Replace IPC with cia.
2350 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2351 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2353 (UndefinedResult): Replace function with macro/function
2355 (sim_engine_run): Don't save PC in IPC.
2357 * sim-main.h (IPC): Delete.
2360 * interp.c (signal_exception, store_word, load_word,
2361 address_translation, load_memory, store_memory, cache_op,
2362 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2363 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2364 current instruction address - cia - argument.
2365 (sim_read, sim_write): Call address_translation directly.
2366 (sim_engine_run): Rename variable vaddr to cia.
2367 (signal_exception): Pass cia to sim_monitor
2369 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2370 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2371 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2373 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2374 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2377 * interp.c (signal_exception): Pass restart address to
2380 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2381 idecode.o): Add dependency.
2383 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2385 (DELAY_SLOT): Update NIA not PC with branch address.
2386 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2388 * mips.igen: Use CIA not PC in branch calculations.
2389 (illegal): Call SignalException.
2390 (BEQ, ADDIU): Fix assembler.
2392 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2394 * m16.igen (JALX): Was missing.
2396 * configure.in (enable-sim-igen): New configuration option.
2397 * configure: Re-generate.
2399 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2401 * interp.c (load_memory, store_memory): Delete parameter RAW.
2402 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2403 bypassing {load,store}_memory.
2405 * sim-main.h (ByteSwapMem): Delete definition.
2407 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2409 * interp.c (sim_do_command, sim_commands): Delete mips specific
2410 commands. Handled by module sim-options.
2412 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2413 (WITH_MODULO_MEMORY): Define.
2415 * interp.c (sim_info): Delete code printing memory size.
2417 * interp.c (mips_size): Nee sim_size, delete function.
2419 (monitor, monitor_base, monitor_size): Delete global variables.
2420 (sim_open, sim_close): Delete code creating monitor and other
2421 memory regions. Use sim-memopts module, via sim_do_commandf, to
2422 manage memory regions.
2423 (load_memory, store_memory): Use sim-core for memory model.
2425 * interp.c (address_translation): Delete all memory map code
2426 except line forcing 32 bit addresses.
2428 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2430 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2433 * interp.c (logfh, logfile): Delete globals.
2434 (sim_open, sim_close): Delete code opening & closing log file.
2435 (mips_option_handler): Delete -l and -n options.
2436 (OPTION mips_options): Ditto.
2438 * interp.c (OPTION mips_options): Rename option trace to dinero.
2439 (mips_option_handler): Update.
2441 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2443 * interp.c (fetch_str): New function.
2444 (sim_monitor): Rewrite using sim_read & sim_write.
2445 (sim_open): Check magic number.
2446 (sim_open): Write monitor vectors into memory using sim_write.
2447 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2448 (sim_read, sim_write): Simplify - transfer data one byte at a
2450 (load_memory, store_memory): Clarify meaning of parameter RAW.
2452 * sim-main.h (isHOST): Defete definition.
2453 (isTARGET): Mark as depreciated.
2454 (address_translation): Delete parameter HOST.
2456 * interp.c (address_translation): Delete parameter HOST.
2458 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2462 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2463 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2465 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2467 * mips.igen: Add model filter field to records.
2469 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2471 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2473 interp.c (sim_engine_run): Do not compile function sim_engine_run
2474 when WITH_IGEN == 1.
2476 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2477 target architecture.
2479 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2480 igen. Replace with configuration variables sim_igen_flags /
2483 * m16.igen: New file. Copy mips16 insns here.
2484 * mips.igen: From here.
2486 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2488 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2490 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2492 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2494 * gencode.c (build_instruction): Follow sim_write's lead in using
2495 BigEndianMem instead of !ByteSwapMem.
2497 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2499 * configure.in (sim_gen): Dependent on target, select type of
2500 generator. Always select old style generator.
2502 configure: Re-generate.
2504 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2506 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2507 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2508 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2509 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2510 SIM_@sim_gen@_*, set by autoconf.
2512 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2514 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2516 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2517 CURRENT_FLOATING_POINT instead.
2519 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2520 (address_translation): Raise exception InstructionFetch when
2521 translation fails and isINSTRUCTION.
2523 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2524 sim_engine_run): Change type of of vaddr and paddr to
2526 (address_translation, prefetch, load_memory, store_memory,
2527 cache_op): Change type of vAddr and pAddr to address_word.
2529 * gencode.c (build_instruction): Change type of vaddr and paddr to
2532 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2534 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2535 macro to obtain result of ALU op.
2537 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2539 * interp.c (sim_info): Call profile_print.
2541 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2543 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2545 * sim-main.h (WITH_PROFILE): Do not define, defined in
2546 common/sim-config.h. Use sim-profile module.
2547 (simPROFILE): Delete defintion.
2549 * interp.c (PROFILE): Delete definition.
2550 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2551 (sim_close): Delete code writing profile histogram.
2552 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2554 (sim_engine_run): Delete code profiling the PC.
2556 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2558 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2560 * interp.c (sim_monitor): Make register pointers of type
2563 * sim-main.h: Make registers of type unsigned_word not
2566 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2568 * interp.c (sync_operation): Rename from SyncOperation, make
2569 global, add SD argument.
2570 (prefetch): Rename from Prefetch, make global, add SD argument.
2571 (decode_coproc): Make global.
2573 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2575 * gencode.c (build_instruction): Generate DecodeCoproc not
2576 decode_coproc calls.
2578 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2579 (SizeFGR): Move to sim-main.h
2580 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2581 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2582 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2584 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2585 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2586 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2587 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2588 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2589 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2591 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2593 (sim-alu.h): Include.
2594 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2595 (sim_cia): Typedef to instruction_address.
2597 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2599 * Makefile.in (interp.o): Rename generated file engine.c to
2604 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2606 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2608 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2610 * gencode.c (build_instruction): For "FPSQRT", output correct
2611 number of arguments to Recip.
2613 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2615 * Makefile.in (interp.o): Depends on sim-main.h
2617 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2619 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2620 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2621 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2622 STATE, DSSTATE): Define
2623 (GPR, FGRIDX, ..): Define.
2625 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2626 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2627 (GPR, FGRIDX, ...): Delete macros.
2629 * interp.c: Update names to match defines from sim-main.h
2631 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2633 * interp.c (sim_monitor): Add SD argument.
2634 (sim_warning): Delete. Replace calls with calls to
2636 (sim_error): Delete. Replace calls with sim_io_error.
2637 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2638 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2639 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2641 (mips_size): Rename from sim_size. Add SD argument.
2643 * interp.c (simulator): Delete global variable.
2644 (callback): Delete global variable.
2645 (mips_option_handler, sim_open, sim_write, sim_read,
2646 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2647 sim_size,sim_monitor): Use sim_io_* not callback->*.
2648 (sim_open): ZALLOC simulator struct.
2649 (PROFILE): Do not define.
2651 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2653 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2654 support.h with corresponding code.
2656 * sim-main.h (word64, uword64), support.h: Move definition to
2658 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2661 * Makefile.in: Update dependencies
2662 * interp.c: Do not include.
2664 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2666 * interp.c (address_translation, load_memory, store_memory,
2667 cache_op): Rename to from AddressTranslation et.al., make global,
2670 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2673 * interp.c (SignalException): Rename to signal_exception, make
2676 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2678 * sim-main.h (SignalException, SignalExceptionInterrupt,
2679 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2680 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2681 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2684 * interp.c, support.h: Use.
2686 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2688 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2689 to value_fpr / store_fpr. Add SD argument.
2690 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2691 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2693 * sim-main.h (ValueFPR, StoreFPR): Define.
2695 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2697 * interp.c (sim_engine_run): Check consistency between configure
2698 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2701 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2702 (mips_fpu): Configure WITH_FLOATING_POINT.
2703 (mips_endian): Configure WITH_TARGET_ENDIAN.
2704 * configure: Update.
2706 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2708 * configure: Regenerated to track ../common/aclocal.m4 changes.
2710 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2712 * configure: Regenerated.
2714 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2716 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2718 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2720 * gencode.c (print_igen_insn_models): Assume certain architectures
2721 include all mips* instructions.
2722 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2725 * Makefile.in (tmp.igen): Add target. Generate igen input from
2728 * gencode.c (FEATURE_IGEN): Define.
2729 (main): Add --igen option. Generate output in igen format.
2730 (process_instructions): Format output according to igen option.
2731 (print_igen_insn_format): New function.
2732 (print_igen_insn_models): New function.
2733 (process_instructions): Only issue warnings and ignore
2734 instructions when no FEATURE_IGEN.
2736 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2738 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2741 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2743 * configure: Regenerated to track ../common/aclocal.m4 changes.
2745 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2747 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2748 SIM_RESERVED_BITS): Delete, moved to common.
2749 (SIM_EXTRA_CFLAGS): Update.
2751 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2753 * configure.in: Configure non-strict memory alignment.
2754 * configure: Regenerated to track ../common/aclocal.m4 changes.
2756 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2758 * configure: Regenerated to track ../common/aclocal.m4 changes.
2760 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2762 * gencode.c (SDBBP,DERET): Added (3900) insns.
2763 (RFE): Turn on for 3900.
2764 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2765 (dsstate): Made global.
2766 (SUBTARGET_R3900): Added.
2767 (CANCELDELAYSLOT): New.
2768 (SignalException): Ignore SystemCall rather than ignore and
2769 terminate. Add DebugBreakPoint handling.
2770 (decode_coproc): New insns RFE, DERET; and new registers Debug
2771 and DEPC protected by SUBTARGET_R3900.
2772 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2774 * Makefile.in,configure.in: Add mips subtarget option.
2775 * configure: Update.
2777 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2779 * gencode.c: Add r3900 (tx39).
2782 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2784 * gencode.c (build_instruction): Don't need to subtract 4 for
2787 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2789 * interp.c: Correct some HASFPU problems.
2791 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2793 * configure: Regenerated to track ../common/aclocal.m4 changes.
2795 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2797 * interp.c (mips_options): Fix samples option short form, should
2800 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2802 * interp.c (sim_info): Enable info code. Was just returning.
2804 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2806 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2809 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
2811 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2813 (build_instruction): Ditto for LL.
2815 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
2817 * configure: Regenerated to track ../common/aclocal.m4 changes.
2819 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2821 * configure: Regenerated to track ../common/aclocal.m4 changes.
2824 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
2826 * interp.c (sim_open): Add call to sim_analyze_program, update
2829 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
2831 * interp.c (sim_kill): Delete.
2832 (sim_create_inferior): Add ABFD argument. Set PC from same.
2833 (sim_load): Move code initializing trap handlers from here.
2834 (sim_open): To here.
2835 (sim_load): Delete, use sim-hload.c.
2837 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2839 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2841 * configure: Regenerated to track ../common/aclocal.m4 changes.
2844 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2846 * interp.c (sim_open): Add ABFD argument.
2847 (sim_load): Move call to sim_config from here.
2848 (sim_open): To here. Check return status.
2850 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
2852 * gencode.c (build_instruction): Two arg MADD should
2853 not assign result to $0.
2855 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
2857 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2858 * sim/mips/configure.in: Regenerate.
2860 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
2862 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2863 signed8, unsigned8 et.al. types.
2865 * interp.c (SUB_REG_FETCH): Handle both little and big endian
2866 hosts when selecting subreg.
2868 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
2870 * interp.c (sim_engine_run): Reset the ZERO register to zero
2871 regardless of FEATURE_WARN_ZERO.
2872 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2874 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2876 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2877 (SignalException): For BreakPoints ignore any mode bits and just
2879 (SignalException): Always set the CAUSE register.
2881 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
2883 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2884 exception has been taken.
2886 * interp.c: Implement the ERET and mt/f sr instructions.
2888 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
2890 * interp.c (SignalException): Don't bother restarting an
2893 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2895 * interp.c (SignalException): Really take an interrupt.
2896 (interrupt_event): Only deliver interrupts when enabled.
2898 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2900 * interp.c (sim_info): Only print info when verbose.
2901 (sim_info) Use sim_io_printf for output.
2903 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2905 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2908 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2910 * interp.c (sim_do_command): Check for common commands if a
2911 simulator specific command fails.
2913 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
2915 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2916 and simBE when DEBUG is defined.
2918 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
2920 * interp.c (interrupt_event): New function. Pass exception event
2921 onto exception handler.
2923 * configure.in: Check for stdlib.h.
2924 * configure: Regenerate.
2926 * gencode.c (build_instruction): Add UNUSED attribute to tempS
2927 variable declaration.
2928 (build_instruction): Initialize memval1.
2929 (build_instruction): Add UNUSED attribute to byte, bigend,
2931 (build_operands): Ditto.
2933 * interp.c: Fix GCC warnings.
2934 (sim_get_quit_code): Delete.
2936 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2937 * Makefile.in: Ditto.
2938 * configure: Re-generate.
2940 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2942 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2944 * interp.c (mips_option_handler): New function parse argumes using
2946 (myname): Replace with STATE_MY_NAME.
2947 (sim_open): Delete check for host endianness - performed by
2949 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2950 (sim_open): Move much of the initialization from here.
2951 (sim_load): To here. After the image has been loaded and
2953 (sim_open): Move ColdReset from here.
2954 (sim_create_inferior): To here.
2955 (sim_open): Make FP check less dependant on host endianness.
2957 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2959 * interp.c (sim_set_callbacks): Delete.
2961 * interp.c (membank, membank_base, membank_size): Replace with
2962 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2963 (sim_open): Remove call to callback->init. gdb/run do this.
2967 * sim-main.h (SIM_HAVE_FLATMEM): Define.
2969 * interp.c (big_endian_p): Delete, replaced by
2970 current_target_byte_order.
2972 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2974 * interp.c (host_read_long, host_read_word, host_swap_word,
2975 host_swap_long): Delete. Using common sim-endian.
2976 (sim_fetch_register, sim_store_register): Use H2T.
2977 (pipeline_ticks): Delete. Handled by sim-events.
2979 (sim_engine_run): Update.
2981 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
2983 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2985 (SignalException): To here. Signal using sim_engine_halt.
2986 (sim_stop_reason): Delete, moved to common.
2988 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
2990 * interp.c (sim_open): Add callback argument.
2991 (sim_set_callbacks): Delete SIM_DESC argument.
2994 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2996 * Makefile.in (SIM_OBJS): Add common modules.
2998 * interp.c (sim_set_callbacks): Also set SD callback.
2999 (set_endianness, xfer_*, swap_*): Delete.
3000 (host_read_word, host_read_long, host_swap_word, host_swap_long):
3001 Change to functions using sim-endian macros.
3002 (control_c, sim_stop): Delete, use common version.
3003 (simulate): Convert into.
3004 (sim_engine_run): This function.
3005 (sim_resume): Delete.
3007 * interp.c (simulation): New variable - the simulator object.
3008 (sim_kind): Delete global - merged into simulation.
3009 (sim_load): Cleanup. Move PC assignment from here.
3010 (sim_create_inferior): To here.
3012 * sim-main.h: New file.
3013 * interp.c (sim-main.h): Include.
3015 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
3017 * configure: Regenerated to track ../common/aclocal.m4 changes.
3019 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
3021 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3023 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
3025 * gencode.c (build_instruction): DIV instructions: check
3026 for division by zero and integer overflow before using
3027 host's division operation.
3029 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3031 * Makefile.in (SIM_OBJS): Add sim-load.o.
3032 * interp.c: #include bfd.h.
3033 (target_byte_order): Delete.
3034 (sim_kind, myname, big_endian_p): New static locals.
3035 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3036 after argument parsing. Recognize -E arg, set endianness accordingly.
3037 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3038 load file into simulator. Set PC from bfd.
3039 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3040 (set_endianness): Use big_endian_p instead of target_byte_order.
3042 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3044 * interp.c (sim_size): Delete prototype - conflicts with
3045 definition in remote-sim.h. Correct definition.
3047 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3049 * configure: Regenerated to track ../common/aclocal.m4 changes.
3052 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3054 * interp.c (sim_open): New arg `kind'.
3056 * configure: Regenerated to track ../common/aclocal.m4 changes.
3058 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3060 * configure: Regenerated to track ../common/aclocal.m4 changes.
3062 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3064 * interp.c (sim_open): Set optind to 0 before calling getopt.
3066 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3068 * configure: Regenerated to track ../common/aclocal.m4 changes.
3070 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3072 * interp.c : Replace uses of pr_addr with pr_uword64
3073 where the bit length is always 64 independent of SIM_ADDR.
3074 (pr_uword64) : added.
3076 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3078 * configure: Re-generate.
3080 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3082 * configure: Regenerate to track ../common/aclocal.m4 changes.
3084 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3086 * interp.c (sim_open): New SIM_DESC result. Argument is now
3088 (other sim_*): New SIM_DESC argument.
3090 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3092 * interp.c: Fix printing of addresses for non-64-bit targets.
3093 (pr_addr): Add function to print address based on size.
3095 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3097 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3099 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3101 * gencode.c (build_mips16_operands): Correct computation of base
3102 address for extended PC relative instruction.
3104 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3106 * interp.c (mips16_entry): Add support for floating point cases.
3107 (SignalException): Pass floating point cases to mips16_entry.
3108 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3110 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3112 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3113 and then set the state to fmt_uninterpreted.
3114 (COP_SW): Temporarily set the state to fmt_word while calling
3117 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3119 * gencode.c (build_instruction): The high order may be set in the
3120 comparison flags at any ISA level, not just ISA 4.
3122 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3124 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3125 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3126 * configure.in: sinclude ../common/aclocal.m4.
3127 * configure: Regenerated.
3129 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3131 * configure: Rebuild after change to aclocal.m4.
3133 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3135 * configure configure.in Makefile.in: Update to new configure
3136 scheme which is more compatible with WinGDB builds.
3137 * configure.in: Improve comment on how to run autoconf.
3138 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3139 * Makefile.in: Use autoconf substitution to install common
3142 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3144 * gencode.c (build_instruction): Use BigEndianCPU instead of
3147 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3149 * interp.c (sim_monitor): Make output to stdout visible in
3150 wingdb's I/O log window.
3152 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3154 * support.h: Undo previous change to SIGTRAP
3157 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3159 * interp.c (store_word, load_word): New static functions.
3160 (mips16_entry): New static function.
3161 (SignalException): Look for mips16 entry and exit instructions.
3162 (simulate): Use the correct index when setting fpr_state after
3163 doing a pending move.
3165 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3167 * interp.c: Fix byte-swapping code throughout to work on
3168 both little- and big-endian hosts.
3170 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3172 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3173 with gdb/config/i386/xm-windows.h.
3175 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3177 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3178 that messes up arithmetic shifts.
3180 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3182 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3183 SIGTRAP and SIGQUIT for _WIN32.
3185 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3187 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3188 force a 64 bit multiplication.
3189 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3190 destination register is 0, since that is the default mips16 nop
3193 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3195 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3196 (build_endian_shift): Don't check proc64.
3197 (build_instruction): Always set memval to uword64. Cast op2 to
3198 uword64 when shifting it left in memory instructions. Always use
3199 the same code for stores--don't special case proc64.
3201 * gencode.c (build_mips16_operands): Fix base PC value for PC
3203 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3205 * interp.c (simJALDELAYSLOT): Define.
3206 (JALDELAYSLOT): Define.
3207 (INDELAYSLOT, INJALDELAYSLOT): Define.
3208 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3210 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3212 * interp.c (sim_open): add flush_cache as a PMON routine
3213 (sim_monitor): handle flush_cache by ignoring it
3215 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3217 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3219 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3220 (BigEndianMem): Rename to ByteSwapMem and change sense.
3221 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3222 BigEndianMem references to !ByteSwapMem.
3223 (set_endianness): New function, with prototype.
3224 (sim_open): Call set_endianness.
3225 (sim_info): Use simBE instead of BigEndianMem.
3226 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3227 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3228 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3229 ifdefs, keeping the prototype declaration.
3230 (swap_word): Rewrite correctly.
3231 (ColdReset): Delete references to CONFIG. Delete endianness related
3232 code; moved to set_endianness.
3234 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3236 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3237 * interp.c (CHECKHILO): Define away.
3238 (simSIGINT): New macro.
3239 (membank_size): Increase from 1MB to 2MB.
3240 (control_c): New function.
3241 (sim_resume): Rename parameter signal to signal_number. Add local
3242 variable prev. Call signal before and after simulate.
3243 (sim_stop_reason): Add simSIGINT support.
3244 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3246 (sim_warning): Delete call to SignalException. Do call printf_filtered
3248 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3249 a call to sim_warning.
3251 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3253 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3254 16 bit instructions.
3256 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3258 Add support for mips16 (16 bit MIPS implementation):
3259 * gencode.c (inst_type): Add mips16 instruction encoding types.
3260 (GETDATASIZEINSN): Define.
3261 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3262 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3264 (MIPS16_DECODE): New table, for mips16 instructions.
3265 (bitmap_val): New static function.
3266 (struct mips16_op): Define.
3267 (mips16_op_table): New table, for mips16 operands.
3268 (build_mips16_operands): New static function.
3269 (process_instructions): If PC is odd, decode a mips16
3270 instruction. Break out instruction handling into new
3271 build_instruction function.
3272 (build_instruction): New static function, broken out of
3273 process_instructions. Check modifiers rather than flags for SHIFT
3274 bit count and m[ft]{hi,lo} direction.
3275 (usage): Pass program name to fprintf.
3276 (main): Remove unused variable this_option_optind. Change
3277 ``*loptarg++'' to ``loptarg++''.
3278 (my_strtoul): Parenthesize && within ||.
3279 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3280 (simulate): If PC is odd, fetch a 16 bit instruction, and
3281 increment PC by 2 rather than 4.
3282 * configure.in: Add case for mips16*-*-*.
3283 * configure: Rebuild.
3285 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3287 * interp.c: Allow -t to enable tracing in standalone simulator.
3288 Fix garbage output in trace file and error messages.
3290 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3292 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3293 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3294 * configure.in: Simplify using macros in ../common/aclocal.m4.
3295 * configure: Regenerated.
3296 * tconfig.in: New file.
3298 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3300 * interp.c: Fix bugs in 64-bit port.
3301 Use ansi function declarations for msvc compiler.
3302 Initialize and test file pointer in trace code.
3303 Prevent duplicate definition of LAST_EMED_REGNUM.
3305 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3307 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3309 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3311 * interp.c (SignalException): Check for explicit terminating
3313 * gencode.c: Pass instruction value through SignalException()
3314 calls for Trap, Breakpoint and Syscall.
3316 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3318 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3319 only used on those hosts that provide it.
3320 * configure.in: Add sqrt() to list of functions to be checked for.
3321 * config.in: Re-generated.
3322 * configure: Re-generated.
3324 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3326 * gencode.c (process_instructions): Call build_endian_shift when
3327 expanding STORE RIGHT, to fix swr.
3328 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3329 clear the high bits.
3330 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3331 Fix float to int conversions to produce signed values.
3333 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3335 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3336 (process_instructions): Correct handling of nor instruction.
3337 Correct shift count for 32 bit shift instructions. Correct sign
3338 extension for arithmetic shifts to not shift the number of bits in
3339 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3340 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3342 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3343 It's OK to have a mult follow a mult. What's not OK is to have a
3344 mult follow an mfhi.
3345 (Convert): Comment out incorrect rounding code.
3347 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3349 * interp.c (sim_monitor): Improved monitor printf
3350 simulation. Tidied up simulator warnings, and added "--log" option
3351 for directing warning message output.
3352 * gencode.c: Use sim_warning() rather than WARNING macro.
3354 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3356 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3357 getopt1.o, rather than on gencode.c. Link objects together.
3358 Don't link against -liberty.
3359 (gencode.o, getopt.o, getopt1.o): New targets.
3360 * gencode.c: Include <ctype.h> and "ansidecl.h".
3361 (AND): Undefine after including "ansidecl.h".
3362 (ULONG_MAX): Define if not defined.
3363 (OP_*): Don't define macros; now defined in opcode/mips.h.
3364 (main): Call my_strtoul rather than strtoul.
3365 (my_strtoul): New static function.
3367 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3369 * gencode.c (process_instructions): Generate word64 and uword64
3370 instead of `long long' and `unsigned long long' data types.
3371 * interp.c: #include sysdep.h to get signals, and define default
3373 * (Convert): Work around for Visual-C++ compiler bug with type
3375 * support.h: Make things compile under Visual-C++ by using
3376 __int64 instead of `long long'. Change many refs to long long
3377 into word64/uword64 typedefs.
3379 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3381 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3382 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3384 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3385 (AC_PROG_INSTALL): Added.
3386 (AC_PROG_CC): Moved to before configure.host call.
3387 * configure: Rebuilt.
3389 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3391 * configure.in: Define @SIMCONF@ depending on mips target.
3392 * configure: Rebuild.
3393 * Makefile.in (run): Add @SIMCONF@ to control simulator
3395 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3396 * interp.c: Remove some debugging, provide more detailed error
3397 messages, update memory accesses to use LOADDRMASK.
3399 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3401 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3402 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3404 * configure: Rebuild.
3405 * config.in: New file, generated by autoheader.
3406 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3407 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3408 HAVE_ANINT and HAVE_AINT, as appropriate.
3409 * Makefile.in (run): Use @LIBS@ rather than -lm.
3410 (interp.o): Depend upon config.h.
3411 (Makefile): Just rebuild Makefile.
3412 (clean): Remove stamp-h.
3413 (mostlyclean): Make the same as clean, not as distclean.
3414 (config.h, stamp-h): New targets.
3416 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3418 * interp.c (ColdReset): Fix boolean test. Make all simulator
3421 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3423 * interp.c (xfer_direct_word, xfer_direct_long,
3424 swap_direct_word, swap_direct_long, xfer_big_word,
3425 xfer_big_long, xfer_little_word, xfer_little_long,
3426 swap_word,swap_long): Added.
3427 * interp.c (ColdReset): Provide function indirection to
3428 host<->simulated_target transfer routines.
3429 * interp.c (sim_store_register, sim_fetch_register): Updated to
3430 make use of indirected transfer routines.
3432 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3434 * gencode.c (process_instructions): Ensure FP ABS instruction
3436 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3437 system call support.
3439 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3441 * interp.c (sim_do_command): Complain if callback structure not
3444 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3446 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3447 support for Sun hosts.
3448 * Makefile.in (gencode): Ensure the host compiler and libraries
3449 used for cross-hosted build.
3451 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3453 * interp.c, gencode.c: Some more (TODO) tidying.
3455 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3457 * gencode.c, interp.c: Replaced explicit long long references with
3458 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3459 * support.h (SET64LO, SET64HI): Macros added.
3461 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3463 * configure: Regenerate with autoconf 2.7.
3465 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3467 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3468 * support.h: Remove superfluous "1" from #if.
3469 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3471 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3473 * interp.c (StoreFPR): Control UndefinedResult() call on
3474 WARN_RESULT manifest.
3476 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3478 * gencode.c: Tidied instruction decoding, and added FP instruction
3481 * interp.c: Added dineroIII, and BSD profiling support. Also
3482 run-time FP handling.
3484 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3486 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3487 gencode.c, interp.c, support.h: created.