sim/mips/ChangeLog

   1 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
   2
   3         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
   4         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
   5         Add special r3900 version of do_mult_hilo.
   6         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
   7         with calls to check_mult_hilo.
   8         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
   9         with calls to check_div_hilo.
  10
  11 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  12
  13         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
  14         Document a replacement.
  15
  16 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
  17
  18         * interp.c (sim_monitor): Make mon_printf work.
  19
  20 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
  21
  22         * sim-main.h (INSN_NAME): New arg `cpu'.
  23
  24 start-sanitize-sky
  25 Thu Apr 30 18:51:26 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  26
  27         * sky-libvpe.c (FMAdd, FMSub): Replace r59fp_op3 call with
  28         r59fp_mula.
  29
  30 end-sanitize-sky
  31 start-sanitize-r5900
  32 Wed Apr 29 22:54:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  33
  34         * sim-main.h (R5900_FP_MAX, R5900_FP_MIN): Define.
  35         * r5900.igen (r59fp_overflow): Use.
  36
  37         * r5900.igen (r59fp_op3): Rename to
  38         (r59fp_mula): This, delete opm argument.
  39         (MADD.S, MADDA.S, MSUB.S, MSUBS.S): Update.
  40         (r59fp_mula): Overflowing product propogates through to result.
  41         (r59fp_mula): ACC to the MAX propogates to result.
  42         (r59fp_mula): Underflow during multiply only sets SU.
  43
  44 end-sanitize-r5900
  45 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
  46
  47         * configure: Regenerated to track ../common/aclocal.m4 changes.
  48
  49 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
  50
  51         * configure: Regenerated to track ../common/aclocal.m4 changes.
  52         * config.in: Ditto.
  53
  54 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
  55
  56         * acconfig.h: New file.
  57         * configure.in: Reverted change of Apr 24; use sinclude again.
  58
  59 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
  60
  61         * configure: Regenerated to track ../common/aclocal.m4 changes.
  62         * config.in: Ditto.
  63
  64 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
  65
  66         * configure.in: Don't call sinclude.
  67
  68 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
  69
  70         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
  71
  72 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  73
  74         * mips.igen (ERET): Implement.
  75
  76         * interp.c (decode_coproc): Return sign-extended EPC.
  77
  78         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
  79
  80         * interp.c (signal_exception): Do not ignore Trap.
  81         (signal_exception): On TRAP, restart at exception address.
  82         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
  83         (signal_exception): Update.
  84         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
  85         so that TRAP instructions are caught.
  86
  87 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  88
  89         * sim-main.h (struct hilo_access, struct hilo_history): Define,
  90         contains HI/LO access history.
  91         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
  92         (HIACCESS, LOACCESS): Delete, replace with
  93         (HIHISTORY, LOHISTORY): New macros.
  94         (start-sanitize-r5900):
  95         (struct sim_5900_cpu): Make hi1access, lo1access of type
  96         hilo_access.
  97         (HI1ACCESS, LO1ACCESS): Delete, replace with
  98         (HI1HISTORY, LO1HISTORY): New macros.
  99         (end-sanitize-r5900):
 100         (CHECKHILO): Delete all, moved to mips.igen
 101
 102         * gencode.c (build_instruction): Do not generate checks for
 103         correct HI/LO register usage.
 104
 105         * interp.c (old_engine_run): Delete checks for correct HI/LO
 106         register usage.
 107
 108         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
 109         check_mf_cycles): New functions.
 110         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
 111         do_divu, domultx, do_mult, do_multu): Use.
 112
 113         * tx.igen ("madd", "maddu"): Use.
 114         (start-sanitize-r5900):
 115
 116         r5900.igen: Update all HI/LO checks.
 117         ("mfhi1", "mflo1", "mthi1", "mthi1", "pmfhi", "pmflo", "pmfhl",
 118         "pmthi", "pmtlo", "mpthl"): Check MF/MT HI/LO.
 119         ("mult1", "div1", "divu1", "multu1", "madd1", "maddu1", "pdivbw",
 120         "pdivuw", "pdivw", "phmaddh", "phmsubh", "pmaddh", "madduw",
 121         "pmaddw", "pmsubh", "pmsubw", "pmulth", "pmultuw", "pmultw"):
 122         Check HI/LO op.
 123         (end-sanitize-r5900):
 124
 125 start-sanitize-sky
 126 Mon Apr 20 18:39:47 1998  Frank Ch. Eigler  <fche@cygnus.com>
 127
 128         * interp.c (decode_coproc): Correct CMFC2/QMTC2
 129         GPR access.
 130
 131         * r5900.igen (LQ,SQ): Use a pair of 64-bit accesses
 132         instead of a single 128-bit access.
 133
 134 end-sanitize-sky
 135 start-sanitize-sky
 136 Fri Apr 17 14:50:39 1998  Frank Ch. Eigler  <fche@cygnus.com>
 137
 138         * r5900.igen (COP_[LS]Q): Transfer COP2 quadwords.
 139         * interp.c (cop_[ls]q): Fixes corresponding to above.
 140
 141 end-sanitize-sky
 142 start-sanitize-sky
 143 Thu Apr 16 15:24:14 1998  Frank Ch. Eigler  <fche@cygnus.com>
 144
 145         * interp.c (decode_coproc): Adapt COP2 micro interlock to
 146         clarified specs.  Reset "M" bit; exit also on "E" bit.
 147
 148 end-sanitize-sky
 149 start-sanitize-r5900
 150 Thu Apr 16 10:40:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 151
 152         * r5900.igen (CFC1, CTC1): Implement R5900 specific version.
 153         * mips.igen (CFC1, CTC1): R5900 des not use generic version.
 154
 155         * r5900.igen (r59fp_unpack): New function.
 156         (r59fp_op1, r59fp_op2, r59fp_op3, C.cond.S, CVT.S.W, DIV.S,
 157         RSQRT.S, SQRT.S): Use.
 158         (r59fp_zero): New function.
 159         (r59fp_overflow): Generate r5900 specific overflow value.
 160         (r59fp_store): Re-write, overflow to MAX_R5900_FP value, underflow
 161         to zero.
 162         (CVT.S.W, CVT.W.S): Exchange implementations.
 163
 164         * sim-main.h (R5900_EXPMAX, R5900_EXPMIN, R5900_EXPBIAS): Defile.
 165
 166 end-sanitize-r5900
 167 start-sanitize-tx19
 168 Thu Apr 16 09:14:44 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 169
 170         * configure.in (tx19, sim_use_gen): Switch to igen.
 171         * configure: Re-build.
 172
 173 end-sanitize-tx19
 174 start-sanitize-sky
 175 Wed Apr 15 12:41:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
 176
 177         * interp.c (decode_coproc): Make COP2 branch code compile after
 178         igen signature changes.
 179
 180 end-sanitize-sky
 181 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 182
 183         * mips.igen (DSRAV): Use function do_dsrav.
 184         (SRAV): Use new function do_srav.
 185
 186         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
 187         (B): Sign extend 11 bit immediate.
 188         (EXT-B*): Shift 16 bit immediate left by 1.
 189         (ADDIU*): Don't sign extend immediate value.
 190
 191 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 192
 193         * m16run.c (sim_engine_run): Restore CIA after handling an event.
 194
 195 start-sanitize-tx19
 196         * mips.igen (mtc0): Valid tx19 instruction.
 197
 198 end-sanitize-tx19
 199         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
 200         functions.
 201
 202         * mips.igen (delayslot32, nullify_next_insn): New functions.
 203         (m16.igen): Always include.
 204         (do_*): Add more tracing.
 205
 206         * m16.igen (delayslot16): Add NIA argument, could be called by a
 207         32 bit MIPS16 instruction.
 208
 209         * interp.c (ifetch16): Move function from here.
 210         * sim-main.c (ifetch16): To here.
 211
 212         * sim-main.c (ifetch16, ifetch32): Update to match current
 213         implementations of LH, LW.
 214         (signal_exception): Don't print out incorrect hex value of illegal
 215         instruction.
 216
 217 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 218
 219         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
 220         instruction.
 221
 222         * m16.igen: Implement MIPS16 instructions.
 223
 224         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
 225         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
 226         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
 227         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
 228         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
 229         bodies of corresponding code from 32 bit insn to these.  Also used
 230         by MIPS16 versions of functions.
 231
 232         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
 233         (IMEM16): Drop NR argument from macro.
 234
 235 start-sanitize-sky
 236 Mon Apr 13 16:28:52 1998  Frank Ch. Eigler  <fche@cygnus.com>
 237
 238         * interp.c (decode_coproc): Add proper 1000000 bit-string at top
 239         of VU lower instruction.
 240
 241 end-sanitize-sky
 242 start-sanitize-sky
 243 Thu Apr  9 16:38:23 1998  Frank Ch. Eigler  <fche@cygnus.com>
 244
 245         * r5900.igen (LQC,SQC): Adapted code to DOUBLEWORD accesses
 246         instead of QUADWORD.
 247
 248         * sim-main.h: Removed attempt at allowing 128-bit access.
 249
 250 end-sanitize-sky
 251 start-sanitize-sky
 252 Wed Apr  8 18:12:13 1998  Frank Ch. Eigler  <fche@cygnus.com>
 253
 254         * Makefile.in (SIM_SKY_OBJS): Added sky-vudis.o.
 255
 256         * interp.c (decode_coproc): Refer to VU CIA as a "special"
 257         register, not as a "misc" register.  Aha.  Add activity
 258         assertions after VCALLMS* instructions.
 259
 260 end-sanitize-sky
 261 start-sanitize-sky
 262 Tue Apr  7 18:32:49 1998  Frank Ch. Eigler  <fche@cygnus.com>
 263
 264         * interp.c (decode_coproc): Do not apply superfluous E (end) flag
 265         to upper code of generated VU instruction.
 266
 267 end-sanitize-sky
 268 start-sanitize-sky
 269 Mon Apr  6 19:55:56 1998  Frank Ch. Eigler  <fche@cygnus.com>
 270
 271         * interp.c (cop_[ls]q): Replaced stub with proper COP2 code.
 272
 273         * sim-main.h (LOADADDRMASK): Redefine to allow 128-bit accesses
 274         for TARGET_SKY.
 275
 276         * r5900.igen (SQC2): Thinko.
 277
 278 end-sanitize-sky
 279 start-sanitize-sky
 280 Sun Apr  5 12:05:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
 281
 282         * interp.c (*): Adapt code to merged VU device & state structs.
 283         (decode_coproc): Execute COP2 each macroinstruction without
 284         pipelining, by stepping VU to completion state.  Adapted to
 285         read_vu_*_reg style of register access.
 286
 287         * mips.igen ([SL]QC2): Removed these COP2 instructions.
 288
 289         * r5900.igen ([SL]QC2): Transplanted these COP2 instructions here.
 290
 291         * sim-main.h (cop_[ls]q): Enclosed in TARGET_SKY guards.
 292
 293 end-sanitize-sky
 294 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 295
 296         * Makefile.in (SIM_OBJS): Add sim-main.o.
 297
 298         * sim-main.h (address_translation, load_memory, store_memory,
 299         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
 300         as INLINE_SIM_MAIN.
 301         (pr_addr, pr_uword64): Declare.
 302         (sim-main.c): Include when H_REVEALS_MODULE_P.
 303
 304         * interp.c (address_translation, load_memory, store_memory,
 305         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
 306         from here.
 307         * sim-main.c: To here. Fix compilation problems.
 308
 309         * configure.in: Enable inlining.
 310         * configure: Re-config.
 311
 312 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 313
 314         * configure: Regenerated to track ../common/aclocal.m4 changes.
 315
 316 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 317
 318         * mips.igen: Include tx.igen.
 319         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
 320         * tx.igen: New file, contains MADD and MADDU.
 321
 322         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
 323         the hardwired constant `7'.
 324         (store_memory): Ditto.
 325         (LOADDRMASK): Move definition to sim-main.h.
 326
 327         mips.igen (MTC0): Enable for r3900.
 328         (ADDU): Add trace.
 329
 330         mips.igen (do_load_byte): Delete.
 331         (do_load, do_store, do_load_left, do_load_write, do_store_left,
 332         do_store_right): New functions.
 333         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
 334
 335         configure.in: Let the tx39 use igen again.
 336         configure: Update.
 337
 338 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 339
 340         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
 341         not an address sized quantity.  Return zero for cache sizes.
 342
 343 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 344
 345         * mips.igen (r3900): r3900 does not support 64 bit integer
 346         operations.
 347
 348 start-sanitize-sky
 349 Wed Apr 1 08:20:31 1998  Frank Ch. Eigler  <fche@cygnus.com>
 350
 351         * mips.igen (SQC2/LQC2): Make bodies sky-target-only also.
 352
 353 end-sanitize-sky
 354 start-sanitize-sky
 355 Mon Mar 30 18:41:43 1998  Frank Ch. Eigler  <fche@cygnus.com>
 356
 357         * interp.c (decode_coproc): Continuing COP2 work.
 358         (cop_[ls]q): Make sky-target-only.
 359
 360         * sim-main.h (COP_[LS]Q): Make sky-target-only.
 361 end-sanitize-sky
 362 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
 363
 364         * configure.in (mipstx39*-*-*): Use gencode simulator rather
 365         than igen one.
 366         * configure : Rebuild.
 367
 368 start-sanitize-sky
 369 Sun Mar 29 17:50:11       Frank Ch. Eigler  <fche@cygnus.com>
 370
 371         * interp.c (decode_coproc): Added a missing TARGET_SKY check
 372         around COP2 implementation skeleton.
 373
 374 end-sanitize-sky
 375 start-sanitize-sky
 376 Fri Mar 27 16:19:29 1998  Frank Ch. Eigler  <fche@cygnus.com>
 377
 378         * Makefile.in (SIM_SKY_OBJS): Replaced sky-vu[01].o with sky-vu.o.
 379
 380         * interp.c (sim_{load,store}_register): Use new vu[01]_device
 381         static to access VU registers.
 382         (decode_coproc): Added skeleton of sky COP2 (VU) instruction
 383         decoding.  Work in progress.
 384
 385         * mips.igen (LDCzz, SDCzz): Removed *5900 case for this
 386         overlapping/redundant bit pattern.
 387         (LQC2, SQC2): Added *5900 COP2 instruction skeleta.  Work in
 388         progress.
 389
 390         * sim-main.h (status_CU[012]): Added COP[n]-enabled flags for
 391         status register.
 392
 393         * interp.c (cop_lq, cop_sq): New functions for future 128-bit
 394         access to coprocessor registers.
 395
 396         * sim-main.h (COP_LQ, COP_SQ): New macro front-ends for above.
 397 end-sanitize-sky
 398 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 399
 400         * configure: Regenerated to track ../common/aclocal.m4 changes.
 401
 402 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 403
 404         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
 405
 406 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
 407
 408         * configure: Regenerated to track ../common/aclocal.m4 changes.
 409         * config.in: Regenerated to track ../common/aclocal.m4 changes.
 410
 411 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 412
 413         * configure: Regenerated to track ../common/aclocal.m4 changes.
 414
 415 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 416
 417         * interp.c (Max, Min): Comment out functions. Not yet used.
 418
 419 start-sanitize-vr4320
 420 Wed Mar 25 10:04:13 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 421
 422         * vr4320.igen (DCLZ): Pacify GCC, 64 bit arg, int format.
 423
 424 end-sanitize-vr4320
 425 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 426
 427         * configure: Regenerated to track ../common/aclocal.m4 changes.
 428
 429 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
 430
 431         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
 432         configurable settings for stand-alone simulator.
 433
 434 start-sanitize-sky
 435         * configure.in: Added --with-sim-gpu2 option to specify path of
 436         sky GPU2 library.  Triggers -DSKY_GPU2 for sky-gpuif.c, and
 437         links/compiles stand-alone simulator with this library.
 438
 439         * interp.c (MEM_SIZE): Increased default sky memory size to 16MB.
 440 end-sanitize-sky
 441         * configure.in: Added X11 search, just in case.
 442
 443         * configure: Regenerated.
 444
 445 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 446
 447         * interp.c (sim_write, sim_read, load_memory, store_memory):
 448         Replace sim_core_*_map with read_map, write_map, exec_map resp.
 449
 450 start-sanitize-vr4320
 451 Tue Mar 10 10:32:22 1998  Gavin Koch  <gavin@cygnus.com>
 452
 453         * vr4320.igen (clz,dclz) : Added.
 454         (dmac): Replaced 99, with LO.
 455
 456 end-sanitize-vr4320
 457 start-sanitize-vr5400
 458 Fri Mar  6 08:30:58 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 459
 460         * mdmx.igen (SHFL.REPA.fmt, SHFL.REPB.fmt): Fix bit fields.
 461
 462 end-sanitize-vr5400
 463 start-sanitize-vr4320
 464 Tue Mar  3 11:56:29 1998  Gavin Koch  <gavin@cygnus.com>
 465
 466         * vr4320.igen: New file.
 467         * Makefile.in (vr4320.igen) : Added.
 468         * configure.in (mips64vr4320-*-*): Added.
 469         * configure : Rebuilt.
 470         * mips.igen : Correct the bfd-names in the mips-ISA model entries.
 471         Add the vr4320 model entry and mark the vr4320 insn as necessary.
 472
 473 end-sanitize-vr4320
 474 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 475
 476         * sim-main.h (GETFCC): Return an unsigned value.
 477
 478 start-sanitize-r5900
 479         * r5900.igen: Use an unsigned array index variable `i'.
 480         (QFSRV): Ditto for variable bytes.
 481
 482 end-sanitize-r5900
 483 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 484
 485         * mips.igen (DIV): Fix check for -1 / MIN_INT.
 486         (DADD): Result destination is RD not RT.
 487
 488 start-sanitize-r5900
 489         * r5900.igen (DIV1): Fix check for -1 / MIN_INT.
 490         (DIVU1): Don't check for MIN_INT / -1 as performing unsigned
 491         divide.
 492
 493 end-sanitize-r5900
 494 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 495
 496         * sim-main.h (HIACCESS, LOACCESS): Always define.
 497
 498         * mdmx.igen (Maxi, Mini): Rename Max, Min.
 499
 500         * interp.c (sim_info): Delete.
 501
 502 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
 503
 504         * interp.c (DECLARE_OPTION_HANDLER): Use it.
 505         (mips_option_handler): New argument `cpu'.
 506         (sim_open): Update call to sim_add_option_table.
 507
 508 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 509
 510         * mips.igen (CxC1): Add tracing.
 511
 512 start-sanitize-r5900
 513 Wed Feb 25 13:59:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 514
 515         * r5900.igen (StoreFP): Delete.
 516         (r59fp_store, r59fp_overflow, r59fp_op1, r59fp_op2, r59fp_op3):
 517         New functions.
 518         (rsqrt.s, sqrt.s): Implement.
 519         (r59cond): New function.
 520         (C.COND.S): Call r59cond in assembler line.
 521         (cvt.w.s, cvt.s.w): Implement.
 522
 523         * mips.igen (rsqrt.fmt, sqrt.fmt, cvt.*.*): Remove from r5900
 524         instruction set.
 525
 526         * sim-main.h: Define an enum of r5900 FCSR bit fields.
 527
 528 end-sanitize-r5900
 529 start-sanitize-r5900
 530 Tue Feb 24 14:44:18 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 531
 532         * r5900.igen: Add tracing to all p* instructions.
 533
 534 Tue Feb 24 02:47:33 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 535
 536         * interp.c (sim_store_register, sim_fetch_register): Pull swifty
 537         to get gdb talking to re-aranged sim_cpu register structure.
 538
 539 end-sanitize-r5900
 540 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 541
 542         * sim-main.h (Max, Min): Declare.
 543
 544         * interp.c (Max, Min): New functions.
 545
 546         * mips.igen (BC1): Add tracing.
 547
 548 start-sanitize-vr5400
 549 Fri Feb 20 16:27:17 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 550
 551         * mdmx.igen: Tag all functions as requiring either with mdmx or
 552         vr5400 processor.
 553
 554 end-sanitize-vr5400
 555 start-sanitize-r5900
 556 Fri Feb 20 15:55:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 557
 558         * configure.in (SIM_AC_OPTION_FLOAT): For r5900, set FP bit size
 559         to 32.
 560         (SIM_AC_OPTION_BITSIZE): For r5900, set nr address bits to 32.
 561
 562         * mips.igen (C.cond.fmt, ..): Not part of r5900 insn set.
 563
 564         * r5900.igen: Rewrite.
 565
 566         * sim-main.h: Move r5900 registers to a separate _sim_r5900_cpu
 567         struct.
 568         (GPR_SB, GPR_SH, GPR_SW, GPR_SD, GPR_UB, GPR_UH, GPR_UW, GPR_UD):
 569         Define in terms of GPR/GPR1 instead of REGISTERS/REGISTERS.1
 570
 571 end-sanitize-r5900
 572 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
 573
 574         * interp.c Added memory map for stack in vr4100
 575
 576 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
 577
 578         * interp.c (load_memory): Add missing "break"'s.
 579
 580 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 581
 582         * interp.c (sim_store_register, sim_fetch_register): Pass in
 583         length parameter.  Return -1.
 584
 585 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
 586
 587         * interp.c: Added hardware init hook, fixed warnings.
 588
 589 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 590
 591         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
 592
 593 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 594
 595         * interp.c (ifetch16): New function.
 596
 597         * sim-main.h (IMEM32): Rename IMEM.
 598         (IMEM16_IMMED): Define.
 599         (IMEM16): Define.
 600         (DELAY_SLOT): Update.
 601
 602         * m16run.c (sim_engine_run): New file.
 603
 604         * m16.igen: All instructions except LB.
 605         (LB): Call do_load_byte.
 606         * mips.igen (do_load_byte): New function.
 607         (LB): Call do_load_byte.
 608
 609         * mips.igen: Move spec for insn bit size and high bit from here.
 610         * Makefile.in (tmp-igen, tmp-m16): To here.
 611
 612         * m16.dc: New file, decode mips16 instructions.
 613
 614         * Makefile.in (SIM_NO_ALL): Define.
 615         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
 616
 617 start-sanitize-tx19
 618         * m16.igen: Mark all mips16 insns as being part of the tx19 insn
 619         set.
 620
 621 end-sanitize-tx19
 622 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 623
 624         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
 625         point unit to 32 bit registers.
 626         * configure: Re-generate.
 627
 628 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 629
 630         * configure.in (sim_use_gen): Make IGEN the default simulator
 631         generator for generic 32 and 64 bit mips targets.
 632         * configure: Re-generate.
 633
 634 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 635
 636         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
 637         bitsize.
 638
 639         * interp.c (sim_fetch_register, sim_store_register): Read/write
 640         FGR from correct location.
 641         (sim_open): Set size of FGR's according to
 642         WITH_TARGET_FLOATING_POINT_BITSIZE.
 643
 644         * sim-main.h (FGR): Store floating point registers in a separate
 645         array.
 646
 647 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 648
 649         * configure: Regenerated to track ../common/aclocal.m4 changes.
 650
 651 start-sanitize-vr5400
 652         * mdmx.igen: Mark all instructions as 64bit/fp specific.
 653
 654 end-sanitize-vr5400
 655 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 656
 657         * interp.c (ColdReset): Call PENDING_INVALIDATE.
 658
 659         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
 660
 661         * interp.c (pending_tick): New function.  Deliver pending writes.
 662
 663         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
 664         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
 665         it can handle mixed sized quantites and single bits.
 666
 667 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 668
 669         * interp.c (oengine.h): Do not include when building with IGEN.
 670         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
 671         (sim_info): Ditto for PROCESSOR_64BIT.
 672         (sim_monitor): Replace ut_reg with unsigned_word.
 673         (*): Ditto for t_reg.
 674         (LOADDRMASK): Define.
 675         (sim_open): Remove defunct check that host FP is IEEE compliant,
 676         using software to emulate floating point.
 677         (value_fpr, ...): Always compile, was conditional on HASFPU.
 678
 679 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 680
 681         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
 682         size.
 683
 684         * interp.c (SD, CPU): Define.
 685         (mips_option_handler): Set flags in each CPU.
 686         (interrupt_event): Assume CPU 0 is the one being iterrupted.
 687         (sim_close): Do not clear STATE, deleted anyway.
 688         (sim_write, sim_read): Assume CPU zero's vm should be used for
 689         data transfers.
 690         (sim_create_inferior): Set the PC for all processors.
 691         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
 692         argument.
 693         (mips16_entry): Pass correct nr of args to store_word, load_word.
 694         (ColdReset): Cold reset all cpu's.
 695         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
 696         (sim_monitor, load_memory, store_memory, signal_exception): Use
 697         `CPU' instead of STATE_CPU.
 698
 699
 700         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
 701         SD or CPU_.
 702
 703         * sim-main.h (signal_exception): Add sim_cpu arg.
 704         (SignalException*): Pass both SD and CPU to signal_exception.
 705         * interp.c (signal_exception): Update.
 706
 707         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
 708         Ditto
 709         (sync_operation, prefetch, cache_op, store_memory, load_memory,
 710         address_translation): Ditto
 711         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
 712
 713 start-sanitize-vr5400
 714         * mdmx.igen (get_scale): Pass CPU_ to semantic_illegal instead of
 715         `sd'.
 716         (ByteAlign): Use StoreFPR, pass args in correct order.
 717
 718 end-sanitize-vr5400
 719 start-sanitize-r5900
 720 Sun Feb  1 10:59:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 721
 722         * configure.in (sim_igen_filter): For r5900, configure as SMP.
 723
 724 end-sanitize-r5900
 725 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 726
 727         * configure: Regenerated to track ../common/aclocal.m4 changes.
 728
 729 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 730
 731 start-sanitize-r5900
 732         * configure.in (sim_igen_filter): For r5900, use igen.
 733         * configure: Re-generate.
 734
 735 end-sanitize-r5900
 736         * interp.c (sim_engine_run): Add `nr_cpus' argument.
 737
 738         * mips.igen (model): Map processor names onto BFD name.
 739
 740         * sim-main.h (CPU_CIA): Delete.
 741         (SET_CIA, GET_CIA): Define
 742
 743 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 744
 745         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
 746         regiser.
 747
 748         * configure.in (default_endian): Configure a big-endian simulator
 749         by default.
 750         * configure: Re-generate.
 751
 752 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
 753
 754         * configure: Regenerated to track ../common/aclocal.m4 changes.
 755
 756 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
 757
 758         * interp.c (sim_monitor): Handle Densan monitor outbyte
 759         and inbyte functions.
 760
 761 1997-12-29  Felix Lee  <flee@cygnus.com>
 762
 763         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
 764
 765 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
 766
 767         * Makefile.in (tmp-igen): Arrange for $zero to always be
 768         reset to zero after every instruction.
 769
 770 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 771
 772         * configure: Regenerated to track ../common/aclocal.m4 changes.
 773         * config.in: Ditto.
 774
 775 start-sanitize-vr5400
 776 Sat Dec 13 15:18:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 777
 778         * vr5400.igen (Low32Bits, High32Bits): Sign extend extracted 32
 779         bit values.
 780
 781 end-sanitize-vr5400
 782 start-sanitize-vr5400
 783 Fri Dec 12 12:26:07 1997  Jeffrey A Law  (law@cygnus.com)
 784
 785         * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or
 786         vr5400 with the vr5000 as the default.
 787
 788 end-sanitize-vr5400
 789 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
 790
 791         * mips.igen (MSUB): Fix to work like MADD.
 792         * gencode.c (MSUB): Similarly.
 793
 794 start-sanitize-vr5400
 795 Tue Dec  9 12:02:12 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 796
 797         * configure.in (sim_igen_filter): Multi-sim vr5400 - vr5000 or
 798         vr5400.
 799
 800 end-sanitize-vr5400
 801 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
 802
 803         * configure: Regenerated to track ../common/aclocal.m4 changes.
 804
 805 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 806
 807         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
 808
 809 start-sanitize-vr5400
 810         * mdmx.igen (value_vr): Correct sim_io_eprintf format argument.
 811         (value_cc, store_cc): Implement.
 812
 813         * sim-main.h: Add 8*3*8 bit accumulator.
 814
 815         * vr5400.igen: Move mdmx instructins from here
 816         * mdmx.igen: To here - new file. Add/fix missing instructions.
 817         * mips.igen: Include mdmx.igen.
 818         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
 819
 820 end-sanitize-vr5400
 821 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 822
 823         * sim-main.h (sim-fpu.h): Include.
 824
 825         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
 826         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
 827         using host independant sim_fpu module.
 828
 829 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 830
 831         * interp.c (signal_exception): Report internal errors with SIGABRT
 832         not SIGQUIT.
 833
 834         * sim-main.h (C0_CONFIG): New register.
 835         (signal.h): No longer include.
 836
 837         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
 838
 839 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
 840
 841         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
 842
 843 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 844
 845         * mips.igen: Tag vr5000 instructions.
 846         (ANDI): Was missing mipsIV model, fix assembler syntax.
 847         (do_c_cond_fmt): New function.
 848         (C.cond.fmt): Handle mips I-III which do not support CC field
 849         separatly.
 850         (bc1): Handle mips IV which do not have a delaed FCC separatly.
 851         (SDR): Mask paddr when BigEndianMem, not the converse as specified
 852         in IV3.2 spec.
 853         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
 854         vr5000 which saves LO in a GPR separatly.
 855
 856         * configure.in (enable-sim-igen): For vr5000, select vr5000
 857         specific instructions.
 858         * configure: Re-generate.
 859
 860 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 861
 862         * Makefile.in (SIM_OBJS): Add sim-fpu module.
 863
 864         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
 865         fmt_uninterpreted_64 bit cases to switch.  Convert to
 866         fmt_formatted,
 867
 868         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
 869
 870         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
 871         as specified in IV3.2 spec.
 872         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
 873
 874 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 875
 876         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
 877         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
 878         (start-sanitize-r5900):
 879         (LWXC1, SWXC1): Delete from r5900 instruction set.
 880         (end-sanitize-r5900):
 881         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
 882         PENDING_FILL versions of instructions.  Simplify.
 883         (X): New function.
 884         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
 885         instructions.
 886         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
 887         a signed value.
 888         (MTHI, MFHI): Disable code checking HI-LO.
 889
 890         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
 891         global.
 892         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
 893
 894 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 895
 896         * gencode.c (build_mips16_operands): Replace IPC with cia.
 897
 898         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
 899         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
 900         IPC to `cia'.
 901         (UndefinedResult): Replace function with macro/function
 902         combination.
 903         (sim_engine_run): Don't save PC in IPC.
 904
 905         * sim-main.h (IPC): Delete.
 906
 907         start-sanitize-vr5400
 908         * vr5400.igen (vr): Add missing cia argument to value_fpr.
 909         (do_select): Rename function select.
 910         end-sanitize-vr5400
 911
 912         * interp.c (signal_exception, store_word, load_word,
 913         address_translation, load_memory, store_memory, cache_op,
 914         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
 915         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
 916         current instruction address - cia - argument.
 917         (sim_read, sim_write): Call address_translation directly.
 918         (sim_engine_run): Rename variable vaddr to cia.
 919         (signal_exception): Pass cia to sim_monitor
 920
 921         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
 922         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
 923         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
 924
 925         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
 926         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
 927         SIM_ASSERT.
 928
 929         * interp.c (signal_exception): Pass restart address to
 930         sim_engine_restart.
 931
 932         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
 933         idecode.o): Add dependency.
 934
 935         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
 936         Delete definitions
 937         (DELAY_SLOT): Update NIA not PC with branch address.
 938         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
 939
 940         * mips.igen: Use CIA not PC in branch calculations.
 941         (illegal): Call SignalException.
 942         (BEQ, ADDIU): Fix assembler.
 943
 944 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 945
 946         * m16.igen (JALX): Was missing.
 947
 948         * configure.in (enable-sim-igen): New configuration option.
 949         * configure: Re-generate.
 950
 951         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
 952
 953         * interp.c (load_memory, store_memory): Delete parameter RAW.
 954         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
 955         bypassing {load,store}_memory.
 956
 957         * sim-main.h (ByteSwapMem): Delete definition.
 958
 959         * Makefile.in (SIM_OBJS): Add sim-memopt module.
 960
 961         * interp.c (sim_do_command, sim_commands): Delete mips specific
 962         commands.  Handled by module sim-options.
 963
 964         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
 965         (WITH_MODULO_MEMORY): Define.
 966
 967         * interp.c (sim_info): Delete code printing memory size.
 968
 969         * interp.c (mips_size): Nee sim_size, delete function.
 970         (power2): Delete.
 971         (monitor, monitor_base, monitor_size): Delete global variables.
 972         (sim_open, sim_close): Delete code creating monitor and other
 973         memory regions.  Use sim-memopts module, via sim_do_commandf, to
 974         manage memory regions.
 975         (load_memory, store_memory): Use sim-core for memory model.
 976
 977         * interp.c (address_translation): Delete all memory map code
 978         except line forcing 32 bit addresses.
 979
 980 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 981
 982         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
 983         trace options.
 984
 985         * interp.c (logfh, logfile): Delete globals.
 986         (sim_open, sim_close): Delete code opening & closing log file.
 987         (mips_option_handler): Delete -l and -n options.
 988         (OPTION mips_options): Ditto.
 989
 990         * interp.c (OPTION mips_options): Rename option trace to dinero.
 991         (mips_option_handler): Update.
 992
 993 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 994
 995         * interp.c (fetch_str): New function.
 996         (sim_monitor): Rewrite using sim_read & sim_write.
 997         (sim_open): Check magic number.
 998         (sim_open): Write monitor vectors into memory using sim_write.
 999         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
1000         (sim_read, sim_write): Simplify - transfer data one byte at a
1001         time.
1002         (load_memory, store_memory): Clarify meaning of parameter RAW.
1003
1004         * sim-main.h (isHOST): Defete definition.
1005         (isTARGET): Mark as depreciated.
1006         (address_translation): Delete parameter HOST.
1007
1008         * interp.c (address_translation): Delete parameter HOST.
1009
1010 start-sanitize-tx49
1011 Wed Oct 29 14:21:32 1997  Gavin Koch  <gavin@cygnus.com>
1012
1013         * gencode.c: Add tx49 configury and insns.
1014         * configure.in: Add tx49 configury.
1015         * configure: Update.
1016
1017 end-sanitize-tx49
1018 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1019
1020         * mips.igen:
1021
1022         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
1023         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
1024
1025 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1026
1027         * mips.igen: Add model filter field to records.
1028
1029 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1030
1031         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
1032
1033         interp.c (sim_engine_run): Do not compile function sim_engine_run
1034         when WITH_IGEN == 1.
1035
1036         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
1037         target architecture.
1038
1039         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
1040         igen. Replace with configuration variables sim_igen_flags /
1041         sim_m16_flags.
1042
1043         start-sanitize-r5900
1044         * r5900.igen: New file. Copy r5900 insns here.
1045         end-sanitize-r5900
1046         start-sanitize-vr5400
1047         * vr5400.igen: New file.
1048         end-sanitize-vr5400
1049         * m16.igen: New file.  Copy mips16 insns here.
1050         * mips.igen: From here.
1051
1052 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1053
1054         start-sanitize-vr5400
1055         * mips.igen: Tag all mipsIV instructions with vr5400 model.
1056
1057         * configure.in: Add mips64vr5400 target.
1058         * configure: Re-generate.
1059
1060         end-sanitize-vr5400
1061         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
1062         to top.
1063         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
1064
1065 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
1066
1067         * gencode.c (build_instruction): Follow sim_write's lead in using
1068         BigEndianMem instead of !ByteSwapMem.
1069
1070 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1071
1072         * configure.in (sim_gen): Dependent on target, select type of
1073         generator.  Always select old style generator.
1074
1075         configure: Re-generate.
1076
1077         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
1078         targets.
1079         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
1080         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
1081         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
1082         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
1083         SIM_@sim_gen@_*, set by autoconf.
1084
1085 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1086
1087         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
1088
1089         * interp.c (ColdReset): Remove #ifdef HASFPU, check
1090         CURRENT_FLOATING_POINT instead.
1091
1092         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
1093         (address_translation): Raise exception InstructionFetch when
1094         translation fails and isINSTRUCTION.
1095
1096         * interp.c (sim_open, sim_write, sim_monitor, store_word,
1097         sim_engine_run): Change type of of vaddr and paddr to
1098         address_word.
1099         (address_translation, prefetch, load_memory, store_memory,
1100         cache_op): Change type of vAddr and pAddr to address_word.
1101
1102         * gencode.c (build_instruction): Change type of vaddr and paddr to
1103         address_word.
1104
1105 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1106
1107         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
1108         macro to obtain result of ALU op.
1109
1110 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1111
1112         * interp.c (sim_info): Call profile_print.
1113
1114 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1115
1116         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
1117
1118         * sim-main.h (WITH_PROFILE): Do not define, defined in
1119         common/sim-config.h.  Use sim-profile module.
1120         (simPROFILE): Delete defintion.
1121
1122         * interp.c (PROFILE): Delete definition.
1123         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
1124         (sim_close): Delete code writing profile histogram.
1125         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
1126         Delete.
1127         (sim_engine_run): Delete code profiling the PC.
1128
1129 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1130
1131         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
1132
1133         * interp.c (sim_monitor): Make register pointers of type
1134         unsigned_word*.
1135
1136         * sim-main.h: Make registers of type unsigned_word not
1137         signed_word.
1138
1139 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1140
1141 start-sanitize-r5900
1142         * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
1143         ...): Move to sim-main.h
1144
1145 end-sanitize-r5900
1146         * interp.c (sync_operation): Rename from SyncOperation, make
1147         global, add SD argument.
1148         (prefetch): Rename from Prefetch, make global, add SD argument.
1149         (decode_coproc): Make global.
1150
1151         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
1152
1153         * gencode.c (build_instruction): Generate DecodeCoproc not
1154         decode_coproc calls.
1155
1156         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
1157         (SizeFGR): Move to sim-main.h
1158         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
1159         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
1160         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
1161         sim-main.h.
1162         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
1163         FP_RM_TOMINF, GETRM): Move to sim-main.h.
1164         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
1165         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
1166         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
1167         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
1168
1169         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
1170         exception.
1171         (sim-alu.h): Include.
1172         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
1173         (sim_cia): Typedef to instruction_address.
1174
1175 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1176
1177         * Makefile.in (interp.o): Rename generated file engine.c to
1178         oengine.c.
1179
1180         * interp.c: Update.
1181
1182 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1183
1184         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
1185
1186 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1187
1188         * gencode.c (build_instruction): For "FPSQRT", output correct
1189         number of arguments to Recip.
1190
1191 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1192
1193         * Makefile.in (interp.o): Depends on sim-main.h
1194
1195         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
1196
1197         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
1198         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
1199         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
1200         STATE, DSSTATE): Define
1201         (GPR, FGRIDX, ..): Define.
1202
1203         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
1204         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
1205         (GPR, FGRIDX, ...): Delete macros.
1206
1207         * interp.c: Update names to match defines from sim-main.h
1208
1209 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1210
1211         * interp.c (sim_monitor): Add SD argument.
1212         (sim_warning): Delete.  Replace calls with calls to
1213         sim_io_eprintf.
1214         (sim_error): Delete. Replace calls with sim_io_error.
1215         (open_trace, writeout32, writeout16, getnum): Add SD argument.
1216         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
1217         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
1218         argument.
1219         (mips_size): Rename from sim_size. Add SD argument.
1220
1221         * interp.c (simulator): Delete global variable.
1222         (callback): Delete global variable.
1223         (mips_option_handler, sim_open, sim_write, sim_read,
1224         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
1225         sim_size,sim_monitor): Use sim_io_* not callback->*.
1226         (sim_open): ZALLOC simulator struct.
1227         (PROFILE): Do not define.
1228
1229 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1230
1231         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
1232         support.h with corresponding code.
1233
1234         * sim-main.h (word64, uword64), support.h: Move definition to
1235         sim-main.h.
1236         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
1237
1238         * support.h: Delete
1239         * Makefile.in: Update dependencies
1240         * interp.c: Do not include.
1241
1242 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1243
1244         * interp.c (address_translation, load_memory, store_memory,
1245         cache_op): Rename to from AddressTranslation et.al., make global,
1246         add SD argument
1247
1248         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
1249         CacheOp): Define.
1250
1251         * interp.c (SignalException): Rename to signal_exception, make
1252         global.
1253
1254         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
1255
1256         * sim-main.h (SignalException, SignalExceptionInterrupt,
1257         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
1258         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
1259         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
1260         Define.
1261
1262         * interp.c, support.h: Use.
1263
1264 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1265
1266         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
1267         to value_fpr / store_fpr. Add SD argument.
1268         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
1269         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
1270
1271         * sim-main.h (ValueFPR, StoreFPR): Define.
1272
1273 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1274
1275         * interp.c (sim_engine_run): Check consistency between configure
1276         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
1277         and HASFPU.
1278
1279         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
1280         (mips_fpu): Configure WITH_FLOATING_POINT.
1281         (mips_endian): Configure WITH_TARGET_ENDIAN.
1282         * configure: Update.
1283
1284 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1285
1286         * configure: Regenerated to track ../common/aclocal.m4 changes.
1287
1288 start-sanitize-r5900
1289 Mon Aug 25 19:11:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1290
1291         * interp.c (MAX_REG): Allow up-to 128 registers.
1292         (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
1293         (REGISTER_SA): Ditto.
1294         (sim_open): Initialize register_widths for r5900 specific
1295         registers.
1296         (sim_fetch_register, sim_store_register): Check for request of
1297         r5900 specific SA register.  Check for request for hi 64 bits of
1298         r5900 specific registers.
1299
1300 end-sanitize-r5900
1301 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
1302
1303         * configure: Regenerated.
1304
1305 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
1306
1307         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
1308
1309 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1310
1311         * gencode.c (print_igen_insn_models): Assume certain architectures
1312         include all mips* instructions.
1313         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
1314         instruction.
1315
1316         * Makefile.in (tmp.igen): Add target. Generate igen input from
1317         gencode file.
1318
1319         * gencode.c (FEATURE_IGEN): Define.
1320         (main): Add --igen option.  Generate output in igen format.
1321         (process_instructions): Format output according to igen option.
1322         (print_igen_insn_format): New function.
1323         (print_igen_insn_models): New function.
1324         (process_instructions): Only issue warnings and ignore
1325         instructions when no FEATURE_IGEN.
1326
1327 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1328
1329         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
1330         MIPS targets.
1331
1332 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1333
1334         * configure: Regenerated to track ../common/aclocal.m4 changes.
1335
1336 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1337
1338         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
1339         SIM_RESERVED_BITS): Delete, moved to common.
1340         (SIM_EXTRA_CFLAGS): Update.
1341
1342 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1343
1344         * configure.in: Configure non-strict memory alignment.
1345         * configure: Regenerated to track ../common/aclocal.m4 changes.
1346
1347 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1348
1349         * configure: Regenerated to track ../common/aclocal.m4 changes.
1350
1351 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
1352
1353         * gencode.c (SDBBP,DERET): Added (3900) insns.
1354         (RFE): Turn on for 3900.
1355         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
1356         (dsstate): Made global.
1357         (SUBTARGET_R3900): Added.
1358         (CANCELDELAYSLOT): New.
1359         (SignalException): Ignore SystemCall rather than ignore and
1360         terminate.  Add DebugBreakPoint handling.
1361         (decode_coproc): New insns RFE, DERET; and new registers Debug
1362         and DEPC protected by SUBTARGET_R3900.
1363         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
1364         bits explicitly.
1365         * Makefile.in,configure.in: Add mips subtarget option.
1366         * configure: Update.
1367
1368 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
1369
1370         * gencode.c: Add r3900 (tx39).
1371
1372 start-sanitize-tx19
1373         * gencode.c: Fix some configuration problems by improving
1374         the relationship between tx19 and tx39.
1375 end-sanitize-tx19
1376
1377 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
1378
1379         * gencode.c (build_instruction): Don't need to subtract 4 for
1380         JALR, just 2.
1381
1382 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
1383
1384         * interp.c: Correct some HASFPU problems.
1385
1386 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1387
1388         * configure: Regenerated to track ../common/aclocal.m4 changes.
1389
1390 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1391
1392         * interp.c (mips_options): Fix samples option short form, should
1393         be `x'.
1394
1395 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1396
1397         * interp.c (sim_info): Enable info code.  Was just returning.
1398
1399 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1400
1401         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
1402         MFC0.
1403
1404 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1405
1406         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
1407         constants.
1408         (build_instruction): Ditto for LL.
1409
1410 start-sanitize-tx19
1411 Sun Sep  7 16:05:46 1997  Gavin Koch  <gavin@cygnus.com>
1412
1413         * mips/configure.in, mips/gencode: Add tx19/r1900.
1414
1415 end-sanitize-tx19
1416 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
1417
1418         * configure: Regenerated to track ../common/aclocal.m4 changes.
1419
1420 start-sanitize-r5900
1421 Mon Sep  1 18:43:30 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1422
1423         * gencode.c (build_instruction): For "pabsw" and "pabsh", check
1424         for overflow due to ABS of MININT, set result to MAXINT.
1425         (build_instruction): For "psrlvw", signextend bit 31.
1426
1427 end-sanitize-r5900
1428 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1429
1430         * configure: Regenerated to track ../common/aclocal.m4 changes.
1431         * config.in: Ditto.
1432
1433 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1434
1435         * interp.c (sim_open): Add call to sim_analyze_program, update
1436         call to sim_config.
1437
1438 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1439
1440         * interp.c (sim_kill): Delete.
1441         (sim_create_inferior): Add ABFD argument. Set PC from same.
1442         (sim_load): Move code initializing trap handlers from here.
1443         (sim_open): To here.
1444         (sim_load): Delete, use sim-hload.c.
1445
1446         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
1447
1448 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1449
1450         * configure: Regenerated to track ../common/aclocal.m4 changes.
1451         * config.in: Ditto.
1452
1453 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1454
1455         * interp.c (sim_open): Add ABFD argument.
1456         (sim_load): Move call to sim_config from here.
1457         (sim_open): To here.  Check return status.
1458
1459 start-sanitize-r5900
1460         * gencode.c (build_instruction): Do not define x8000000000000000,
1461         x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
1462
1463 end-sanitize-r5900
1464 start-sanitize-r5900
1465 Mon Jul 28 19:49:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1466
1467         * gencode.c (build_instruction): For "pdivw", "pdivbw" and
1468         "pdivuw" check for overflow due to signed divide by -1.
1469
1470 end-sanitize-r5900
1471 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
1472
1473         * gencode.c (build_instruction): Two arg MADD should
1474         not assign result to $0.
1475
1476 start-sanitize-r5900
1477 Thu Jul 10 11:58:48 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1478
1479         * gencode.c (build_instruction): For "ppac5" use unsigned
1480         arrithmetic so that the sign bit doesn't smear when right shifted.
1481         (build_instruction): For "pdiv" perform sign extension when
1482         storing results in HI and LO.
1483         (build_instructions): For "pdiv" and "pdivbw" check for
1484         divide-by-zero.
1485         (build_instruction): For "pmfhl.slw" update hi part of dest
1486         register as well as low part.
1487         (build_instruction): For "pmfhl" portably handle long long values.
1488         (build_instruction): For "pmfhl.sh" correctly negative values.
1489         Store half words 2 and three in the correct place.
1490         (build_instruction): For "psllvw", sign extend value after shift.
1491
1492 end-sanitize-r5900
1493 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
1494
1495         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
1496         * sim/mips/configure.in: Regenerate.
1497
1498 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1499
1500         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
1501         signed8, unsigned8 et.al. types.
1502
1503 start-sanitize-r5900
1504         * gencode.c (build_instruction): For PMULTU* do not sign extend
1505         registers.  Make generated code easier to debug.
1506
1507 end-sanitize-r5900
1508         * interp.c (SUB_REG_FETCH): Handle both little and big endian
1509         hosts when selecting subreg.
1510
1511 start-sanitize-r5900
1512 Tue Jul  8 18:07:20 1997  Andrew Cagney  <cagney@andros.cygnus.com>
1513
1514         * gencode.c (type_for_data_len): For 32bit operations concerned
1515         with overflow, perform op using 64bits.
1516         (build_instruction): For PADD, always compute operation using type
1517         returned by type_for_data_len.
1518         (build_instruction): For PSUBU, when overflow, saturate to zero as
1519         actually underflow.
1520
1521 end-sanitize-r5900
1522 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
1523
1524 start-sanitize-r5900
1525         * gencode.c (build_instruction): Handle "pext5" according to
1526         version 1.95 of the r5900 ISA.
1527
1528         * gencode.c (build_instruction): Handle "ppac5" according to
1529         version 1.95 of the r5900 ISA.
1530
1531 end-sanitize-r5900
1532         * interp.c (sim_engine_run): Reset the ZERO register to zero
1533         regardless of FEATURE_WARN_ZERO.
1534         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
1535
1536 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1537
1538         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
1539         (SignalException): For BreakPoints ignore any mode bits and just
1540         save the PC.
1541         (SignalException): Always set the CAUSE register.
1542
1543 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1544
1545         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
1546         exception has been taken.
1547
1548         * interp.c: Implement the ERET and mt/f sr instructions.
1549
1550 start-sanitize-r5900
1551 Mon Jun  2 23:28:19 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1552
1553         * gencode.c (build_instruction): For paddu, extract unsigned
1554         sub-fields.
1555
1556         * gencode.c (build_instruction): Saturate padds instead of padd
1557         instructions.
1558
1559 end-sanitize-r5900
1560 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1561
1562         * interp.c (SignalException): Don't bother restarting an
1563         interrupt.
1564
1565 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1566
1567         * interp.c (SignalException): Really take an interrupt.
1568         (interrupt_event): Only deliver interrupts when enabled.
1569
1570 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1571
1572         * interp.c (sim_info): Only print info when verbose.
1573         (sim_info) Use sim_io_printf for output.
1574
1575 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1576
1577         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
1578         mips architectures.
1579
1580 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1581
1582         * interp.c (sim_do_command): Check for common commands if a
1583         simulator specific command fails.
1584
1585 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
1586
1587         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
1588         and simBE when DEBUG is defined.
1589
1590 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1591
1592         * interp.c (interrupt_event): New function.  Pass exception event
1593         onto exception handler.
1594
1595         * configure.in: Check for stdlib.h.
1596         * configure: Regenerate.
1597
1598         * gencode.c (build_instruction): Add UNUSED attribute to tempS
1599         variable declaration.
1600         (build_instruction): Initialize memval1.
1601         (build_instruction): Add UNUSED attribute to byte, bigend,
1602         reverse.
1603         (build_operands): Ditto.
1604
1605         * interp.c: Fix GCC warnings.
1606         (sim_get_quit_code): Delete.
1607
1608         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
1609         * Makefile.in: Ditto.
1610         * configure: Re-generate.
1611
1612         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
1613
1614 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1615
1616         * interp.c (mips_option_handler): New function parse argumes using
1617         sim-options.
1618         (myname): Replace with STATE_MY_NAME.
1619         (sim_open): Delete check for host endianness - performed by
1620         sim_config.
1621         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
1622         (sim_open): Move much of the initialization from here.
1623         (sim_load): To here.  After the image has been loaded and
1624         endianness set.
1625         (sim_open): Move ColdReset from here.
1626         (sim_create_inferior): To here.
1627         (sim_open): Make FP check less dependant on host endianness.
1628
1629         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
1630         run.
1631         * interp.c (sim_set_callbacks): Delete.
1632
1633         * interp.c (membank, membank_base, membank_size): Replace with
1634         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
1635         (sim_open): Remove call to callback->init. gdb/run do this.
1636
1637         * interp.c: Update
1638
1639         * sim-main.h (SIM_HAVE_FLATMEM): Define.
1640
1641         * interp.c (big_endian_p): Delete, replaced by
1642         current_target_byte_order.
1643
1644 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1645
1646         * interp.c (host_read_long, host_read_word, host_swap_word,
1647         host_swap_long): Delete. Using common sim-endian.
1648         (sim_fetch_register, sim_store_register): Use H2T.
1649         (pipeline_ticks): Delete.  Handled by sim-events.
1650         (sim_info): Update.
1651         (sim_engine_run): Update.
1652
1653 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1654
1655         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
1656         reason from here.
1657         (SignalException): To here. Signal using sim_engine_halt.
1658         (sim_stop_reason): Delete, moved to common.
1659
1660 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
1661
1662         * interp.c (sim_open): Add callback argument.
1663         (sim_set_callbacks): Delete SIM_DESC argument.
1664         (sim_size): Ditto.
1665
1666 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1667
1668         * Makefile.in (SIM_OBJS): Add common modules.
1669
1670         * interp.c (sim_set_callbacks): Also set SD callback.
1671         (set_endianness, xfer_*, swap_*): Delete.
1672         (host_read_word, host_read_long, host_swap_word, host_swap_long):
1673         Change to functions using sim-endian macros.
1674         (control_c, sim_stop): Delete, use common version.
1675         (simulate): Convert into.
1676         (sim_engine_run): This function.
1677         (sim_resume): Delete.
1678
1679         * interp.c (simulation): New variable - the simulator object.
1680         (sim_kind): Delete global - merged into simulation.
1681         (sim_load): Cleanup.  Move PC assignment from here.
1682         (sim_create_inferior): To here.
1683
1684         * sim-main.h: New file.
1685         * interp.c (sim-main.h): Include.
1686
1687 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
1688
1689         * configure: Regenerated to track ../common/aclocal.m4 changes.
1690
1691 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
1692
1693         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
1694
1695 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
1696
1697         * gencode.c (build_instruction): DIV instructions: check
1698         for division by zero and integer overflow before using
1699         host's division operation.
1700
1701 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
1702
1703         * Makefile.in (SIM_OBJS): Add sim-load.o.
1704         * interp.c: #include bfd.h.
1705         (target_byte_order): Delete.
1706         (sim_kind, myname, big_endian_p): New static locals.
1707         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
1708         after argument parsing.  Recognize -E arg, set endianness accordingly.
1709         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
1710         load file into simulator.  Set PC from bfd.
1711         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
1712         (set_endianness): Use big_endian_p instead of target_byte_order.
1713
1714 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1715
1716         * interp.c (sim_size): Delete prototype - conflicts with
1717         definition in remote-sim.h.  Correct definition.
1718
1719 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1720
1721         * configure: Regenerated to track ../common/aclocal.m4 changes.
1722         * config.in: Ditto.
1723
1724 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
1725
1726         * interp.c (sim_open): New arg `kind'.
1727
1728         * configure: Regenerated to track ../common/aclocal.m4 changes.
1729
1730 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1731
1732         * configure: Regenerated to track ../common/aclocal.m4 changes.
1733
1734 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
1735
1736         * interp.c (sim_open): Set optind to 0 before calling getopt.
1737
1738 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1739
1740         * configure: Regenerated to track ../common/aclocal.m4 changes.
1741
1742 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1743
1744         * interp.c : Replace uses of pr_addr with pr_uword64
1745         where the bit length is always 64 independent of SIM_ADDR.
1746         (pr_uword64) : added.
1747
1748 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1749
1750         * configure: Re-generate.
1751
1752 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
1753
1754         * configure: Regenerate to track ../common/aclocal.m4 changes.
1755
1756 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
1757
1758         * interp.c (sim_open): New SIM_DESC result.  Argument is now
1759         in argv form.
1760         (other sim_*): New SIM_DESC argument.
1761
1762 start-sanitize-r5900
1763 Wed Feb 26 18:32:21 1997  Gavin Koch  <gavin@cygnus.com>
1764
1765         * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
1766         Change values to avoid overloading DOUBLEWORD which is tested
1767         for all insns.
1768         * gencode.c: reinstate "offending code".
1769
1770 end-sanitize-r5900
1771 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
1772
1773         * interp.c: Fix printing of addresses for non-64-bit targets.
1774         (pr_addr): Add function to print address based on size.
1775 start-sanitize-r5900
1776         * gencode.c: #ifdef out offending code until a permanent fix
1777         can be added.  Code is causing build errors for non-5900 mips targets.
1778 end-sanitize-r5900
1779
1780 start-sanitize-r5900
1781 Thu Feb 20 10:40:24 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1782
1783         * gencode.c (process_instructions): Correct test for ISA dependent
1784         architecture bits in isa field of MIPS_DECODE.
1785
1786 end-sanitize-r5900
1787 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
1788
1789         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
1790
1791 start-sanitize-r5900
1792 Tue Feb 18 17:03:47 1997  Gavin Koch  <gavin@cygnus.com>
1793
1794         * gencode.c (MIPS_DECODE): Correct instruction feature flags for
1795         PMADDUW.
1796
1797 end-sanitize-r5900
1798 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
1799
1800         * gencode.c (build_mips16_operands): Correct computation of base
1801         address for extended PC relative instruction.
1802
1803 start-sanitize-r5900
1804 Fri Feb  7 11:12:44 1997  Gavin Koch  <gavin@cygnus.com>
1805
1806         * Makefile.in, configure, configure.in, gencode.c,
1807         interp.c, support.h: add r5900.
1808
1809 end-sanitize-r5900
1810 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
1811
1812         * interp.c (mips16_entry): Add support for floating point cases.
1813         (SignalException): Pass floating point cases to mips16_entry.
1814         (ValueFPR): Don't restrict fmt_single and fmt_word to even
1815         registers.
1816         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
1817         or fmt_word.
1818         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1819         and then set the state to fmt_uninterpreted.
1820         (COP_SW): Temporarily set the state to fmt_word while calling
1821         ValueFPR.
1822
1823 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
1824
1825         * gencode.c (build_instruction): The high order may be set in the
1826         comparison flags at any ISA level, not just ISA 4.
1827
1828 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
1829
1830         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1831         COMMON_{PRE,POST}_CONFIG_FRAG instead.
1832         * configure.in: sinclude ../common/aclocal.m4.
1833         * configure: Regenerated.
1834
1835 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
1836
1837         * configure: Rebuild after change to aclocal.m4.
1838
1839 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
1840
1841         * configure configure.in Makefile.in:  Update to new configure
1842         scheme which is more compatible with WinGDB builds.
1843         * configure.in:  Improve comment on how to run autoconf.
1844         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
1845         * Makefile.in:  Use autoconf substitution to install common
1846         makefile fragment.
1847
1848 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
1849
1850         * gencode.c (build_instruction): Use BigEndianCPU instead of
1851         ByteSwapMem.
1852
1853 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
1854
1855         * interp.c (sim_monitor): Make output to stdout visible in
1856         wingdb's I/O log window.
1857
1858 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
1859
1860         * support.h: Undo previous change to SIGTRAP
1861         and SIGQUIT values.
1862
1863 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
1864
1865         * interp.c (store_word, load_word): New static functions.
1866         (mips16_entry): New static function.
1867         (SignalException): Look for mips16 entry and exit instructions.
1868         (simulate): Use the correct index when setting fpr_state after
1869         doing a pending move.
1870
1871 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
1872
1873         * interp.c: Fix byte-swapping code throughout to work on
1874         both little- and big-endian hosts.
1875
1876 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
1877
1878         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1879         with gdb/config/i386/xm-windows.h.
1880
1881 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
1882
1883         * gencode.c (build_instruction): Work around MSVC++ code gen bug
1884         that messes up arithmetic shifts.
1885
1886 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
1887
1888         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
1889         SIGTRAP and SIGQUIT for _WIN32.
1890
1891 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
1892
1893         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1894         force a 64 bit multiplication.
1895         (build_instruction) [OR]: In mips16 mode, don't do anything if the
1896         destination register is 0, since that is the default mips16 nop
1897         instruction.
1898
1899 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
1900
1901         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1902         (build_endian_shift): Don't check proc64.
1903         (build_instruction): Always set memval to uword64.  Cast op2 to
1904         uword64 when shifting it left in memory instructions.  Always use
1905         the same code for stores--don't special case proc64.
1906
1907         * gencode.c (build_mips16_operands): Fix base PC value for PC
1908         relative operands.
1909         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1910         jal instruction.
1911         * interp.c (simJALDELAYSLOT): Define.
1912         (JALDELAYSLOT): Define.
1913         (INDELAYSLOT, INJALDELAYSLOT): Define.
1914         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1915
1916 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
1917
1918         * interp.c (sim_open): add flush_cache as a PMON routine
1919         (sim_monitor): handle flush_cache by ignoring it
1920
1921 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
1922
1923         * gencode.c (build_instruction): Use !ByteSwapMem instead of
1924         BigEndianMem.
1925         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1926         (BigEndianMem): Rename to ByteSwapMem and change sense.
1927         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1928         BigEndianMem references to !ByteSwapMem.
1929         (set_endianness): New function, with prototype.
1930         (sim_open): Call set_endianness.
1931         (sim_info): Use simBE instead of BigEndianMem.
1932         (xfer_direct_word, xfer_direct_long, swap_direct_word,
1933         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1934         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1935         ifdefs, keeping the prototype declaration.
1936         (swap_word): Rewrite correctly.
1937         (ColdReset): Delete references to CONFIG.  Delete endianness related
1938         code; moved to set_endianness.
1939
1940 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
1941
1942         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1943         * interp.c (CHECKHILO): Define away.
1944         (simSIGINT): New macro.
1945         (membank_size): Increase from 1MB to 2MB.
1946         (control_c): New function.
1947         (sim_resume): Rename parameter signal to signal_number.  Add local
1948         variable prev.  Call signal before and after simulate.
1949         (sim_stop_reason): Add simSIGINT support.
1950         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1951         functions always.
1952         (sim_warning): Delete call to SignalException.  Do call printf_filtered
1953         if logfh is NULL.
1954         (AddressTranslation): Add #ifdef DEBUG around debugging message and
1955         a call to sim_warning.
1956
1957 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
1958
1959         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1960         16 bit instructions.
1961
1962 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1963
1964         Add support for mips16 (16 bit MIPS implementation):
1965         * gencode.c (inst_type): Add mips16 instruction encoding types.
1966         (GETDATASIZEINSN): Define.
1967         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
1968         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
1969         mtlo.
1970         (MIPS16_DECODE): New table, for mips16 instructions.
1971         (bitmap_val): New static function.
1972         (struct mips16_op): Define.
1973         (mips16_op_table): New table, for mips16 operands.
1974         (build_mips16_operands): New static function.
1975         (process_instructions): If PC is odd, decode a mips16
1976         instruction.  Break out instruction handling into new
1977         build_instruction function.
1978         (build_instruction): New static function, broken out of
1979         process_instructions.  Check modifiers rather than flags for SHIFT
1980         bit count and m[ft]{hi,lo} direction.
1981         (usage): Pass program name to fprintf.
1982         (main): Remove unused variable this_option_optind.  Change
1983         ``*loptarg++'' to ``loptarg++''.
1984         (my_strtoul): Parenthesize && within ||.
1985         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
1986         (simulate): If PC is odd, fetch a 16 bit instruction, and
1987         increment PC by 2 rather than 4.
1988         * configure.in: Add case for mips16*-*-*.
1989         * configure: Rebuild.
1990
1991 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
1992
1993         * interp.c: Allow -t to enable tracing in standalone simulator.
1994         Fix garbage output in trace file and error messages.
1995
1996 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
1997
1998         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
1999         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
2000         * configure.in: Simplify using macros in ../common/aclocal.m4.
2001         * configure: Regenerated.
2002         * tconfig.in: New file.
2003
2004 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
2005
2006         * interp.c: Fix bugs in 64-bit port.
2007         Use ansi function declarations for msvc compiler.
2008         Initialize and test file pointer in trace code.
2009         Prevent duplicate definition of LAST_EMED_REGNUM.
2010
2011 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
2012
2013         * interp.c (xfer_big_long): Prevent unwanted sign extension.
2014
2015 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
2016
2017         * interp.c (SignalException): Check for explicit terminating
2018         breakpoint value.
2019         * gencode.c: Pass instruction value through SignalException()
2020         calls for Trap, Breakpoint and Syscall.
2021
2022 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
2023
2024         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
2025         only used on those hosts that provide it.
2026         * configure.in: Add sqrt() to list of functions to be checked for.
2027         * config.in: Re-generated.
2028         * configure: Re-generated.
2029
2030 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
2031
2032         * gencode.c (process_instructions): Call build_endian_shift when
2033         expanding STORE RIGHT, to fix swr.
2034         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
2035         clear the high bits.
2036         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
2037         Fix float to int conversions to produce signed values.
2038
2039 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
2040
2041         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
2042         (process_instructions): Correct handling of nor instruction.
2043         Correct shift count for 32 bit shift instructions. Correct sign
2044         extension for arithmetic shifts to not shift the number of bits in
2045         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
2046         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
2047         Fix madd.
2048         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
2049         It's OK to have a mult follow a mult.  What's not OK is to have a
2050         mult follow an mfhi.
2051         (Convert): Comment out incorrect rounding code.
2052
2053 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
2054
2055         * interp.c (sim_monitor): Improved monitor printf
2056         simulation. Tidied up simulator warnings, and added "--log" option
2057         for directing warning message output.
2058         * gencode.c: Use sim_warning() rather than WARNING macro.
2059
2060 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
2061
2062         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
2063         getopt1.o, rather than on gencode.c.  Link objects together.
2064         Don't link against -liberty.
2065         (gencode.o, getopt.o, getopt1.o): New targets.
2066         * gencode.c: Include <ctype.h> and "ansidecl.h".
2067         (AND): Undefine after including "ansidecl.h".
2068         (ULONG_MAX): Define if not defined.
2069         (OP_*): Don't define macros; now defined in opcode/mips.h.
2070         (main): Call my_strtoul rather than strtoul.
2071         (my_strtoul): New static function.
2072
2073 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
2074
2075         * gencode.c (process_instructions):  Generate word64 and uword64
2076         instead of `long long' and `unsigned long long' data types.
2077         * interp.c:  #include sysdep.h to get signals, and define default
2078         for SIGBUS.
2079         * (Convert):  Work around for Visual-C++ compiler bug with type
2080         conversion.
2081         * support.h:  Make things compile under Visual-C++ by using
2082         __int64 instead of `long long'.  Change many refs to long long
2083         into word64/uword64 typedefs.
2084
2085 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
2086
2087         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
2088         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
2089         (docdir): Removed.
2090         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
2091         (AC_PROG_INSTALL): Added.
2092         (AC_PROG_CC): Moved to before configure.host call.
2093         * configure: Rebuilt.
2094
2095 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
2096
2097         * configure.in: Define @SIMCONF@ depending on mips target.
2098         * configure: Rebuild.
2099         * Makefile.in (run): Add @SIMCONF@ to control simulator
2100         construction.
2101         * gencode.c: Change LOADDRMASK to 64bit memory model only.
2102         * interp.c: Remove some debugging, provide more detailed error
2103         messages, update memory accesses to use LOADDRMASK.
2104
2105 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
2106
2107         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
2108         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
2109         stamp-h.
2110         * configure: Rebuild.
2111         * config.in: New file, generated by autoheader.
2112         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
2113         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
2114         HAVE_ANINT and HAVE_AINT, as appropriate.
2115         * Makefile.in (run): Use @LIBS@ rather than -lm.
2116         (interp.o): Depend upon config.h.
2117         (Makefile): Just rebuild Makefile.
2118         (clean): Remove stamp-h.
2119         (mostlyclean): Make the same as clean, not as distclean.
2120         (config.h, stamp-h): New targets.
2121
2122 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
2123
2124         * interp.c (ColdReset): Fix boolean test. Make all simulator
2125         globals static.
2126
2127 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
2128
2129         * interp.c (xfer_direct_word, xfer_direct_long,
2130         swap_direct_word, swap_direct_long, xfer_big_word,
2131         xfer_big_long, xfer_little_word, xfer_little_long,
2132         swap_word,swap_long): Added.
2133         * interp.c (ColdReset): Provide function indirection to
2134         host<->simulated_target transfer routines.
2135         * interp.c (sim_store_register, sim_fetch_register): Updated to
2136         make use of indirected transfer routines.
2137
2138 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
2139
2140         * gencode.c (process_instructions): Ensure FP ABS instruction
2141         recognised.
2142         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
2143         system call support.
2144
2145 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
2146
2147         * interp.c (sim_do_command): Complain if callback structure not
2148         initialised.
2149
2150 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
2151
2152         * interp.c (Convert): Provide round-to-nearest and round-to-zero
2153         support for Sun hosts.
2154         * Makefile.in (gencode): Ensure the host compiler and libraries
2155         used for cross-hosted build.
2156
2157 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
2158
2159         * interp.c, gencode.c: Some more (TODO) tidying.
2160
2161 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
2162
2163         * gencode.c, interp.c: Replaced explicit long long references with
2164         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
2165         * support.h (SET64LO, SET64HI): Macros added.
2166
2167 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
2168
2169         * configure: Regenerate with autoconf 2.7.
2170
2171 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
2172
2173         * interp.c (LoadMemory): Enclose text following #endif in /* */.
2174         * support.h: Remove superfluous "1" from #if.
2175         * support.h (CHECKSIM): Remove stray 'a' at end of line.
2176
2177 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
2178
2179         * interp.c (StoreFPR): Control UndefinedResult() call on
2180         WARN_RESULT manifest.
2181
2182 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
2183
2184         * gencode.c: Tidied instruction decoding, and added FP instruction
2185         support.
2186
2187         * interp.c: Added dineroIII, and BSD profiling support. Also
2188         run-time FP handling.
2189
2190 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
2191
2192         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
2193         gencode.c, interp.c, support.h: created.