2 Sun Mar 29 17:50:11 Frank Ch. Eigler <fche@cygnus.com>
4 * interp.c (decode_coproc): Added a missing TARGET_SKY check
5 around COP2 implementation skeleton.
9 Fri Mar 27 16:19:29 1998 Frank Ch. Eigler <fche@cygnus.com>
12 * Makefile.in (SIM_SKY_OBJS): Replaced sky-vu[01].o with sky-vu.o.
14 * interp.c (sim_{load,store}_register): Use new vu[01]_device
15 static to access VU registers.
16 (decode_coproc): Added skeleton of sky COP2 (VU) instruction
17 decoding. Work in progress.
19 * mips.igen (LDCzz, SDCzz): Removed *5900 case for this
20 overlapping/redundant bit pattern.
21 (LQC2, SQC2): Added *5900 COP2 instruction skeleta. Work in
24 * sim-main.h (status_CU[012]): Added COP[n]-enabled flags for
29 * interp.c (cop_lq, cop_sq): New functions for future 128-bit
30 access to coprocessor registers.
32 * sim-main.h (COP_LQ, COP_SQ): New macro front-ends for above.
34 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
36 * configure: Regenerated to track ../common/aclocal.m4 changes.
38 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
40 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
42 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
44 * configure: Regenerated to track ../common/aclocal.m4 changes.
45 * config.in: Regenerated to track ../common/aclocal.m4 changes.
47 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
49 * configure: Regenerated to track ../common/aclocal.m4 changes.
51 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
53 * interp.c (Max, Min): Comment out functions. Not yet used.
56 Wed Mar 25 10:04:13 1998 Andrew Cagney <cagney@b1.cygnus.com>
58 * vr4320.igen (DCLZ): Pacify GCC, 64 bit arg, int format.
61 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
63 * configure: Regenerated to track ../common/aclocal.m4 changes.
65 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
67 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
68 configurable settings for stand-alone simulator.
71 * configure.in: Added --with-sim-gpu2 option to specify path of
72 sky GPU2 library. Triggers -DSKY_GPU2 for sky-gpuif.c, and
73 links/compiles stand-alone simulator with this library.
75 * interp.c (MEM_SIZE): Increased default sky memory size to 16MB.
78 * configure.in: Added X11 search, just in case.
80 * configure: Regenerated.
82 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
84 * interp.c (sim_write, sim_read, load_memory, store_memory):
85 Replace sim_core_*_map with read_map, write_map, exec_map resp.
88 Tue Mar 10 10:32:22 1998 Gavin Koch <gavin@cygnus.com>
90 * vr4320.igen (clz,dclz) : Added.
91 (dmac): Replaced 99, with LO.
95 Fri Mar 6 08:30:58 1998 Andrew Cagney <cagney@b1.cygnus.com>
97 * mdmx.igen (SHFL.REPA.fmt, SHFL.REPB.fmt): Fix bit fields.
100 start-sanitize-vr4320
101 Tue Mar 3 11:56:29 1998 Gavin Koch <gavin@cygnus.com>
103 * vr4320.igen: New file.
104 * Makefile.in (vr4320.igen) : Added.
105 * configure.in (mips64vr4320-*-*): Added.
106 * configure : Rebuilt.
107 * mips.igen : Correct the bfd-names in the mips-ISA model entries.
108 Add the vr4320 model entry and mark the vr4320 insn as necessary.
111 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
113 * sim-main.h (GETFCC): Return an unsigned value.
116 * r5900.igen: Use an unsigned array index variable `i'.
117 (QFSRV): Ditto for variable bytes.
120 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
122 * mips.igen (DIV): Fix check for -1 / MIN_INT.
123 (DADD): Result destination is RD not RT.
126 * r5900.igen (DIV1): Fix check for -1 / MIN_INT.
127 (DIVU1): Don't check for MIN_INT / -1 as performing unsigned
131 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
133 * sim-main.h (HIACCESS, LOACCESS): Always define.
135 * mdmx.igen (Maxi, Mini): Rename Max, Min.
137 * interp.c (sim_info): Delete.
139 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
141 * interp.c (DECLARE_OPTION_HANDLER): Use it.
142 (mips_option_handler): New argument `cpu'.
143 (sim_open): Update call to sim_add_option_table.
145 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
147 * mips.igen (CxC1): Add tracing.
150 Wed Feb 25 13:59:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
152 * r5900.igen (StoreFP): Delete.
153 (r59fp_store, r59fp_overflow, r59fp_op1, r59fp_op2, r59fp_op3):
155 (rsqrt.s, sqrt.s): Implement.
156 (r59cond): New function.
157 (C.COND.S): Call r59cond in assembler line.
158 (cvt.w.s, cvt.s.w): Implement.
160 * mips.igen (rsqrt.fmt, sqrt.fmt, cvt.*.*): Remove from r5900
163 * sim-main.h: Define an enum of r5900 FCSR bit fields.
167 Tue Feb 24 14:44:18 1998 Andrew Cagney <cagney@b1.cygnus.com>
169 * r5900.igen: Add tracing to all p* instructions.
171 Tue Feb 24 02:47:33 1998 Andrew Cagney <cagney@b1.cygnus.com>
173 * interp.c (sim_store_register, sim_fetch_register): Pull swifty
174 to get gdb talking to re-aranged sim_cpu register structure.
177 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
179 * sim-main.h (Max, Min): Declare.
181 * interp.c (Max, Min): New functions.
183 * mips.igen (BC1): Add tracing.
185 start-sanitize-vr5400
186 Fri Feb 20 16:27:17 1998 Andrew Cagney <cagney@b1.cygnus.com>
188 * mdmx.igen: Tag all functions as requiring either with mdmx or
193 Fri Feb 20 15:55:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
195 * configure.in (SIM_AC_OPTION_FLOAT): For r5900, set FP bit size
197 (SIM_AC_OPTION_BITSIZE): For r5900, set nr address bits to 32.
199 * mips.igen (C.cond.fmt, ..): Not part of r5900 insn set.
201 * r5900.igen: Rewrite.
203 * sim-main.h: Move r5900 registers to a separate _sim_r5900_cpu
205 (GPR_SB, GPR_SH, GPR_SW, GPR_SD, GPR_UB, GPR_UH, GPR_UW, GPR_UD):
206 Define in terms of GPR/GPR1 instead of REGISTERS/REGISTERS.1
209 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
211 * interp.c Added memory map for stack in vr4100
213 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
215 * interp.c (load_memory): Add missing "break"'s.
217 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
219 * interp.c (sim_store_register, sim_fetch_register): Pass in
220 length parameter. Return -1.
222 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
224 * interp.c: Added hardware init hook, fixed warnings.
226 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
228 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
230 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
232 * interp.c (ifetch16): New function.
234 * sim-main.h (IMEM32): Rename IMEM.
235 (IMEM16_IMMED): Define.
237 (DELAY_SLOT): Update.
239 * m16run.c (sim_engine_run): New file.
241 * m16.igen: All instructions except LB.
242 (LB): Call do_load_byte.
243 * mips.igen (do_load_byte): New function.
244 (LB): Call do_load_byte.
246 * mips.igen: Move spec for insn bit size and high bit from here.
247 * Makefile.in (tmp-igen, tmp-m16): To here.
249 * m16.dc: New file, decode mips16 instructions.
251 * Makefile.in (SIM_NO_ALL): Define.
252 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
255 * m16.igen: Mark all mips16 insns as being part of the tx19 insn
259 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
261 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
262 point unit to 32 bit registers.
263 * configure: Re-generate.
265 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
267 * configure.in (sim_use_gen): Make IGEN the default simulator
268 generator for generic 32 and 64 bit mips targets.
269 * configure: Re-generate.
271 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
273 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
276 * interp.c (sim_fetch_register, sim_store_register): Read/write
277 FGR from correct location.
278 (sim_open): Set size of FGR's according to
279 WITH_TARGET_FLOATING_POINT_BITSIZE.
281 * sim-main.h (FGR): Store floating point registers in a separate
284 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
286 * configure: Regenerated to track ../common/aclocal.m4 changes.
288 start-sanitize-vr5400
289 * mdmx.igen: Mark all instructions as 64bit/fp specific.
292 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
294 * interp.c (ColdReset): Call PENDING_INVALIDATE.
296 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
298 * interp.c (pending_tick): New function. Deliver pending writes.
300 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
301 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
302 it can handle mixed sized quantites and single bits.
304 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
306 * interp.c (oengine.h): Do not include when building with IGEN.
307 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
308 (sim_info): Ditto for PROCESSOR_64BIT.
309 (sim_monitor): Replace ut_reg with unsigned_word.
310 (*): Ditto for t_reg.
311 (LOADDRMASK): Define.
312 (sim_open): Remove defunct check that host FP is IEEE compliant,
313 using software to emulate floating point.
314 (value_fpr, ...): Always compile, was conditional on HASFPU.
316 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
318 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
321 * interp.c (SD, CPU): Define.
322 (mips_option_handler): Set flags in each CPU.
323 (interrupt_event): Assume CPU 0 is the one being iterrupted.
324 (sim_close): Do not clear STATE, deleted anyway.
325 (sim_write, sim_read): Assume CPU zero's vm should be used for
327 (sim_create_inferior): Set the PC for all processors.
328 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
330 (mips16_entry): Pass correct nr of args to store_word, load_word.
331 (ColdReset): Cold reset all cpu's.
332 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
333 (sim_monitor, load_memory, store_memory, signal_exception): Use
334 `CPU' instead of STATE_CPU.
337 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
340 * sim-main.h (signal_exception): Add sim_cpu arg.
341 (SignalException*): Pass both SD and CPU to signal_exception.
342 * interp.c (signal_exception): Update.
344 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
346 (sync_operation, prefetch, cache_op, store_memory, load_memory,
347 address_translation): Ditto
348 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
350 start-sanitize-vr5400
351 * mdmx.igen (get_scale): Pass CPU_ to semantic_illegal instead of
353 (ByteAlign): Use StoreFPR, pass args in correct order.
357 Sun Feb 1 10:59:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
359 * configure.in (sim_igen_filter): For r5900, configure as SMP.
362 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
364 * configure: Regenerated to track ../common/aclocal.m4 changes.
366 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
369 * configure.in (sim_igen_filter): For r5900, use igen.
370 * configure: Re-generate.
373 * interp.c (sim_engine_run): Add `nr_cpus' argument.
375 * mips.igen (model): Map processor names onto BFD name.
377 * sim-main.h (CPU_CIA): Delete.
378 (SET_CIA, GET_CIA): Define
380 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
382 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
385 * configure.in (default_endian): Configure a big-endian simulator
387 * configure: Re-generate.
389 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
391 * configure: Regenerated to track ../common/aclocal.m4 changes.
393 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
395 * interp.c (sim_monitor): Handle Densan monitor outbyte
396 and inbyte functions.
398 1997-12-29 Felix Lee <flee@cygnus.com>
400 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
402 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
404 * Makefile.in (tmp-igen): Arrange for $zero to always be
405 reset to zero after every instruction.
407 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
409 * configure: Regenerated to track ../common/aclocal.m4 changes.
412 start-sanitize-vr5400
413 Sat Dec 13 15:18:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
415 * vr5400.igen (Low32Bits, High32Bits): Sign extend extracted 32
419 start-sanitize-vr5400
420 Fri Dec 12 12:26:07 1997 Jeffrey A Law (law@cygnus.com)
422 * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or
423 vr5400 with the vr5000 as the default.
426 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
428 * mips.igen (MSUB): Fix to work like MADD.
429 * gencode.c (MSUB): Similarly.
431 start-sanitize-vr5400
432 Tue Dec 9 12:02:12 1997 Andrew Cagney <cagney@b1.cygnus.com>
434 * configure.in (sim_igen_filter): Multi-sim vr5400 - vr5000 or
438 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
440 * configure: Regenerated to track ../common/aclocal.m4 changes.
442 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
444 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
446 start-sanitize-vr5400
447 * mdmx.igen (value_vr): Correct sim_io_eprintf format argument.
448 (value_cc, store_cc): Implement.
450 * sim-main.h: Add 8*3*8 bit accumulator.
452 * vr5400.igen: Move mdmx instructins from here
453 * mdmx.igen: To here - new file. Add/fix missing instructions.
454 * mips.igen: Include mdmx.igen.
455 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
458 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
460 * sim-main.h (sim-fpu.h): Include.
462 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
463 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
464 using host independant sim_fpu module.
466 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
468 * interp.c (signal_exception): Report internal errors with SIGABRT
471 * sim-main.h (C0_CONFIG): New register.
472 (signal.h): No longer include.
474 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
476 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
478 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
480 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
482 * mips.igen: Tag vr5000 instructions.
483 (ANDI): Was missing mipsIV model, fix assembler syntax.
484 (do_c_cond_fmt): New function.
485 (C.cond.fmt): Handle mips I-III which do not support CC field
487 (bc1): Handle mips IV which do not have a delaed FCC separatly.
488 (SDR): Mask paddr when BigEndianMem, not the converse as specified
490 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
491 vr5000 which saves LO in a GPR separatly.
493 * configure.in (enable-sim-igen): For vr5000, select vr5000
494 specific instructions.
495 * configure: Re-generate.
497 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
499 * Makefile.in (SIM_OBJS): Add sim-fpu module.
501 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
502 fmt_uninterpreted_64 bit cases to switch. Convert to
505 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
507 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
508 as specified in IV3.2 spec.
509 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
511 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
513 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
514 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
515 (start-sanitize-r5900):
516 (LWXC1, SWXC1): Delete from r5900 instruction set.
517 (end-sanitize-r5900):
518 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
519 PENDING_FILL versions of instructions. Simplify.
521 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
523 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
525 (MTHI, MFHI): Disable code checking HI-LO.
527 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
529 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
531 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
533 * gencode.c (build_mips16_operands): Replace IPC with cia.
535 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
536 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
538 (UndefinedResult): Replace function with macro/function
540 (sim_engine_run): Don't save PC in IPC.
542 * sim-main.h (IPC): Delete.
544 start-sanitize-vr5400
545 * vr5400.igen (vr): Add missing cia argument to value_fpr.
546 (do_select): Rename function select.
549 * interp.c (signal_exception, store_word, load_word,
550 address_translation, load_memory, store_memory, cache_op,
551 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
552 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
553 current instruction address - cia - argument.
554 (sim_read, sim_write): Call address_translation directly.
555 (sim_engine_run): Rename variable vaddr to cia.
556 (signal_exception): Pass cia to sim_monitor
558 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
559 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
560 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
562 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
563 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
566 * interp.c (signal_exception): Pass restart address to
569 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
570 idecode.o): Add dependency.
572 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
574 (DELAY_SLOT): Update NIA not PC with branch address.
575 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
577 * mips.igen: Use CIA not PC in branch calculations.
578 (illegal): Call SignalException.
579 (BEQ, ADDIU): Fix assembler.
581 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
583 * m16.igen (JALX): Was missing.
585 * configure.in (enable-sim-igen): New configuration option.
586 * configure: Re-generate.
588 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
590 * interp.c (load_memory, store_memory): Delete parameter RAW.
591 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
592 bypassing {load,store}_memory.
594 * sim-main.h (ByteSwapMem): Delete definition.
596 * Makefile.in (SIM_OBJS): Add sim-memopt module.
598 * interp.c (sim_do_command, sim_commands): Delete mips specific
599 commands. Handled by module sim-options.
601 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
602 (WITH_MODULO_MEMORY): Define.
604 * interp.c (sim_info): Delete code printing memory size.
606 * interp.c (mips_size): Nee sim_size, delete function.
608 (monitor, monitor_base, monitor_size): Delete global variables.
609 (sim_open, sim_close): Delete code creating monitor and other
610 memory regions. Use sim-memopts module, via sim_do_commandf, to
611 manage memory regions.
612 (load_memory, store_memory): Use sim-core for memory model.
614 * interp.c (address_translation): Delete all memory map code
615 except line forcing 32 bit addresses.
617 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
619 * sim-main.h (WITH_TRACE): Delete definition. Enables common
622 * interp.c (logfh, logfile): Delete globals.
623 (sim_open, sim_close): Delete code opening & closing log file.
624 (mips_option_handler): Delete -l and -n options.
625 (OPTION mips_options): Ditto.
627 * interp.c (OPTION mips_options): Rename option trace to dinero.
628 (mips_option_handler): Update.
630 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
632 * interp.c (fetch_str): New function.
633 (sim_monitor): Rewrite using sim_read & sim_write.
634 (sim_open): Check magic number.
635 (sim_open): Write monitor vectors into memory using sim_write.
636 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
637 (sim_read, sim_write): Simplify - transfer data one byte at a
639 (load_memory, store_memory): Clarify meaning of parameter RAW.
641 * sim-main.h (isHOST): Defete definition.
642 (isTARGET): Mark as depreciated.
643 (address_translation): Delete parameter HOST.
645 * interp.c (address_translation): Delete parameter HOST.
648 Wed Oct 29 14:21:32 1997 Gavin Koch <gavin@cygnus.com>
650 * gencode.c: Add tx49 configury and insns.
651 * configure.in: Add tx49 configury.
655 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
659 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
660 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
662 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
664 * mips.igen: Add model filter field to records.
666 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
668 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
670 interp.c (sim_engine_run): Do not compile function sim_engine_run
673 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
676 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
677 igen. Replace with configuration variables sim_igen_flags /
681 * r5900.igen: New file. Copy r5900 insns here.
683 start-sanitize-vr5400
684 * vr5400.igen: New file.
686 * m16.igen: New file. Copy mips16 insns here.
687 * mips.igen: From here.
689 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
691 start-sanitize-vr5400
692 * mips.igen: Tag all mipsIV instructions with vr5400 model.
694 * configure.in: Add mips64vr5400 target.
695 * configure: Re-generate.
698 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
700 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
702 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
704 * gencode.c (build_instruction): Follow sim_write's lead in using
705 BigEndianMem instead of !ByteSwapMem.
707 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
709 * configure.in (sim_gen): Dependent on target, select type of
710 generator. Always select old style generator.
712 configure: Re-generate.
714 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
716 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
717 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
718 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
719 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
720 SIM_@sim_gen@_*, set by autoconf.
722 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
724 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
726 * interp.c (ColdReset): Remove #ifdef HASFPU, check
727 CURRENT_FLOATING_POINT instead.
729 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
730 (address_translation): Raise exception InstructionFetch when
731 translation fails and isINSTRUCTION.
733 * interp.c (sim_open, sim_write, sim_monitor, store_word,
734 sim_engine_run): Change type of of vaddr and paddr to
736 (address_translation, prefetch, load_memory, store_memory,
737 cache_op): Change type of vAddr and pAddr to address_word.
739 * gencode.c (build_instruction): Change type of vaddr and paddr to
742 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
744 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
745 macro to obtain result of ALU op.
747 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
749 * interp.c (sim_info): Call profile_print.
751 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
753 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
755 * sim-main.h (WITH_PROFILE): Do not define, defined in
756 common/sim-config.h. Use sim-profile module.
757 (simPROFILE): Delete defintion.
759 * interp.c (PROFILE): Delete definition.
760 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
761 (sim_close): Delete code writing profile histogram.
762 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
764 (sim_engine_run): Delete code profiling the PC.
766 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
768 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
770 * interp.c (sim_monitor): Make register pointers of type
773 * sim-main.h: Make registers of type unsigned_word not
776 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
779 * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
780 ...): Move to sim-main.h
783 * interp.c (sync_operation): Rename from SyncOperation, make
784 global, add SD argument.
785 (prefetch): Rename from Prefetch, make global, add SD argument.
786 (decode_coproc): Make global.
788 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
790 * gencode.c (build_instruction): Generate DecodeCoproc not
793 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
794 (SizeFGR): Move to sim-main.h
795 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
796 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
797 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
799 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
800 FP_RM_TOMINF, GETRM): Move to sim-main.h.
801 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
802 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
803 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
804 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
806 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
808 (sim-alu.h): Include.
809 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
810 (sim_cia): Typedef to instruction_address.
812 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
814 * Makefile.in (interp.o): Rename generated file engine.c to
819 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
821 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
823 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
825 * gencode.c (build_instruction): For "FPSQRT", output correct
826 number of arguments to Recip.
828 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
830 * Makefile.in (interp.o): Depends on sim-main.h
832 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
834 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
835 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
836 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
837 STATE, DSSTATE): Define
838 (GPR, FGRIDX, ..): Define.
840 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
841 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
842 (GPR, FGRIDX, ...): Delete macros.
844 * interp.c: Update names to match defines from sim-main.h
846 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
848 * interp.c (sim_monitor): Add SD argument.
849 (sim_warning): Delete. Replace calls with calls to
851 (sim_error): Delete. Replace calls with sim_io_error.
852 (open_trace, writeout32, writeout16, getnum): Add SD argument.
853 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
854 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
856 (mips_size): Rename from sim_size. Add SD argument.
858 * interp.c (simulator): Delete global variable.
859 (callback): Delete global variable.
860 (mips_option_handler, sim_open, sim_write, sim_read,
861 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
862 sim_size,sim_monitor): Use sim_io_* not callback->*.
863 (sim_open): ZALLOC simulator struct.
864 (PROFILE): Do not define.
866 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
868 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
869 support.h with corresponding code.
871 * sim-main.h (word64, uword64), support.h: Move definition to
873 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
876 * Makefile.in: Update dependencies
877 * interp.c: Do not include.
879 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
881 * interp.c (address_translation, load_memory, store_memory,
882 cache_op): Rename to from AddressTranslation et.al., make global,
885 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
888 * interp.c (SignalException): Rename to signal_exception, make
891 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
893 * sim-main.h (SignalException, SignalExceptionInterrupt,
894 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
895 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
896 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
899 * interp.c, support.h: Use.
901 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
903 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
904 to value_fpr / store_fpr. Add SD argument.
905 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
906 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
908 * sim-main.h (ValueFPR, StoreFPR): Define.
910 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
912 * interp.c (sim_engine_run): Check consistency between configure
913 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
916 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
917 (mips_fpu): Configure WITH_FLOATING_POINT.
918 (mips_endian): Configure WITH_TARGET_ENDIAN.
921 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
923 * configure: Regenerated to track ../common/aclocal.m4 changes.
926 Mon Aug 25 19:11:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
928 * interp.c (MAX_REG): Allow up-to 128 registers.
929 (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
930 (REGISTER_SA): Ditto.
931 (sim_open): Initialize register_widths for r5900 specific
933 (sim_fetch_register, sim_store_register): Check for request of
934 r5900 specific SA register. Check for request for hi 64 bits of
935 r5900 specific registers.
938 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
940 * configure: Regenerated.
942 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
944 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
946 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
948 * gencode.c (print_igen_insn_models): Assume certain architectures
949 include all mips* instructions.
950 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
953 * Makefile.in (tmp.igen): Add target. Generate igen input from
956 * gencode.c (FEATURE_IGEN): Define.
957 (main): Add --igen option. Generate output in igen format.
958 (process_instructions): Format output according to igen option.
959 (print_igen_insn_format): New function.
960 (print_igen_insn_models): New function.
961 (process_instructions): Only issue warnings and ignore
962 instructions when no FEATURE_IGEN.
964 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
966 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
969 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
971 * configure: Regenerated to track ../common/aclocal.m4 changes.
973 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
975 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
976 SIM_RESERVED_BITS): Delete, moved to common.
977 (SIM_EXTRA_CFLAGS): Update.
979 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
981 * configure.in: Configure non-strict memory alignment.
982 * configure: Regenerated to track ../common/aclocal.m4 changes.
984 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
986 * configure: Regenerated to track ../common/aclocal.m4 changes.
988 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
990 * gencode.c (SDBBP,DERET): Added (3900) insns.
991 (RFE): Turn on for 3900.
992 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
993 (dsstate): Made global.
994 (SUBTARGET_R3900): Added.
995 (CANCELDELAYSLOT): New.
996 (SignalException): Ignore SystemCall rather than ignore and
997 terminate. Add DebugBreakPoint handling.
998 (decode_coproc): New insns RFE, DERET; and new registers Debug
999 and DEPC protected by SUBTARGET_R3900.
1000 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
1002 * Makefile.in,configure.in: Add mips subtarget option.
1003 * configure: Update.
1005 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
1007 * gencode.c: Add r3900 (tx39).
1010 * gencode.c: Fix some configuration problems by improving
1011 the relationship between tx19 and tx39.
1014 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
1016 * gencode.c (build_instruction): Don't need to subtract 4 for
1019 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
1021 * interp.c: Correct some HASFPU problems.
1023 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
1025 * configure: Regenerated to track ../common/aclocal.m4 changes.
1027 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
1029 * interp.c (mips_options): Fix samples option short form, should
1032 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
1034 * interp.c (sim_info): Enable info code. Was just returning.
1036 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
1038 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
1041 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
1043 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
1045 (build_instruction): Ditto for LL.
1048 Sun Sep 7 16:05:46 1997 Gavin Koch <gavin@cygnus.com>
1050 * mips/configure.in, mips/gencode: Add tx19/r1900.
1053 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
1055 * configure: Regenerated to track ../common/aclocal.m4 changes.
1057 start-sanitize-r5900
1058 Mon Sep 1 18:43:30 1997 Andrew Cagney <cagney@b1.cygnus.com>
1060 * gencode.c (build_instruction): For "pabsw" and "pabsh", check
1061 for overflow due to ABS of MININT, set result to MAXINT.
1062 (build_instruction): For "psrlvw", signextend bit 31.
1065 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1067 * configure: Regenerated to track ../common/aclocal.m4 changes.
1070 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
1072 * interp.c (sim_open): Add call to sim_analyze_program, update
1075 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
1077 * interp.c (sim_kill): Delete.
1078 (sim_create_inferior): Add ABFD argument. Set PC from same.
1079 (sim_load): Move code initializing trap handlers from here.
1080 (sim_open): To here.
1081 (sim_load): Delete, use sim-hload.c.
1083 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
1085 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1087 * configure: Regenerated to track ../common/aclocal.m4 changes.
1090 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1092 * interp.c (sim_open): Add ABFD argument.
1093 (sim_load): Move call to sim_config from here.
1094 (sim_open): To here. Check return status.
1096 start-sanitize-r5900
1097 * gencode.c (build_instruction): Do not define x8000000000000000,
1098 x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
1101 start-sanitize-r5900
1102 Mon Jul 28 19:49:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
1104 * gencode.c (build_instruction): For "pdivw", "pdivbw" and
1105 "pdivuw" check for overflow due to signed divide by -1.
1108 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
1110 * gencode.c (build_instruction): Two arg MADD should
1111 not assign result to $0.
1113 start-sanitize-r5900
1114 Thu Jul 10 11:58:48 1997 Andrew Cagney <cagney@critters.cygnus.com>
1116 * gencode.c (build_instruction): For "ppac5" use unsigned
1117 arrithmetic so that the sign bit doesn't smear when right shifted.
1118 (build_instruction): For "pdiv" perform sign extension when
1119 storing results in HI and LO.
1120 (build_instructions): For "pdiv" and "pdivbw" check for
1122 (build_instruction): For "pmfhl.slw" update hi part of dest
1123 register as well as low part.
1124 (build_instruction): For "pmfhl" portably handle long long values.
1125 (build_instruction): For "pmfhl.sh" correctly negative values.
1126 Store half words 2 and three in the correct place.
1127 (build_instruction): For "psllvw", sign extend value after shift.
1130 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
1132 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
1133 * sim/mips/configure.in: Regenerate.
1135 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
1137 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
1138 signed8, unsigned8 et.al. types.
1140 start-sanitize-r5900
1141 * gencode.c (build_instruction): For PMULTU* do not sign extend
1142 registers. Make generated code easier to debug.
1145 * interp.c (SUB_REG_FETCH): Handle both little and big endian
1146 hosts when selecting subreg.
1148 start-sanitize-r5900
1149 Tue Jul 8 18:07:20 1997 Andrew Cagney <cagney@andros.cygnus.com>
1151 * gencode.c (type_for_data_len): For 32bit operations concerned
1152 with overflow, perform op using 64bits.
1153 (build_instruction): For PADD, always compute operation using type
1154 returned by type_for_data_len.
1155 (build_instruction): For PSUBU, when overflow, saturate to zero as
1159 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
1161 start-sanitize-r5900
1162 * gencode.c (build_instruction): Handle "pext5" according to
1163 version 1.95 of the r5900 ISA.
1165 * gencode.c (build_instruction): Handle "ppac5" according to
1166 version 1.95 of the r5900 ISA.
1169 * interp.c (sim_engine_run): Reset the ZERO register to zero
1170 regardless of FEATURE_WARN_ZERO.
1171 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
1173 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
1175 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
1176 (SignalException): For BreakPoints ignore any mode bits and just
1178 (SignalException): Always set the CAUSE register.
1180 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
1182 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
1183 exception has been taken.
1185 * interp.c: Implement the ERET and mt/f sr instructions.
1187 start-sanitize-r5900
1188 Mon Jun 2 23:28:19 1997 Andrew Cagney <cagney@b1.cygnus.com>
1190 * gencode.c (build_instruction): For paddu, extract unsigned
1193 * gencode.c (build_instruction): Saturate padds instead of padd
1197 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
1199 * interp.c (SignalException): Don't bother restarting an
1202 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1204 * interp.c (SignalException): Really take an interrupt.
1205 (interrupt_event): Only deliver interrupts when enabled.
1207 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
1209 * interp.c (sim_info): Only print info when verbose.
1210 (sim_info) Use sim_io_printf for output.
1212 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1214 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
1217 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1219 * interp.c (sim_do_command): Check for common commands if a
1220 simulator specific command fails.
1222 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
1224 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
1225 and simBE when DEBUG is defined.
1227 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
1229 * interp.c (interrupt_event): New function. Pass exception event
1230 onto exception handler.
1232 * configure.in: Check for stdlib.h.
1233 * configure: Regenerate.
1235 * gencode.c (build_instruction): Add UNUSED attribute to tempS
1236 variable declaration.
1237 (build_instruction): Initialize memval1.
1238 (build_instruction): Add UNUSED attribute to byte, bigend,
1240 (build_operands): Ditto.
1242 * interp.c: Fix GCC warnings.
1243 (sim_get_quit_code): Delete.
1245 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
1246 * Makefile.in: Ditto.
1247 * configure: Re-generate.
1249 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
1251 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1253 * interp.c (mips_option_handler): New function parse argumes using
1255 (myname): Replace with STATE_MY_NAME.
1256 (sim_open): Delete check for host endianness - performed by
1258 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
1259 (sim_open): Move much of the initialization from here.
1260 (sim_load): To here. After the image has been loaded and
1262 (sim_open): Move ColdReset from here.
1263 (sim_create_inferior): To here.
1264 (sim_open): Make FP check less dependant on host endianness.
1266 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
1268 * interp.c (sim_set_callbacks): Delete.
1270 * interp.c (membank, membank_base, membank_size): Replace with
1271 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
1272 (sim_open): Remove call to callback->init. gdb/run do this.
1276 * sim-main.h (SIM_HAVE_FLATMEM): Define.
1278 * interp.c (big_endian_p): Delete, replaced by
1279 current_target_byte_order.
1281 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
1283 * interp.c (host_read_long, host_read_word, host_swap_word,
1284 host_swap_long): Delete. Using common sim-endian.
1285 (sim_fetch_register, sim_store_register): Use H2T.
1286 (pipeline_ticks): Delete. Handled by sim-events.
1288 (sim_engine_run): Update.
1290 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
1292 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
1294 (SignalException): To here. Signal using sim_engine_halt.
1295 (sim_stop_reason): Delete, moved to common.
1297 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
1299 * interp.c (sim_open): Add callback argument.
1300 (sim_set_callbacks): Delete SIM_DESC argument.
1303 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
1305 * Makefile.in (SIM_OBJS): Add common modules.
1307 * interp.c (sim_set_callbacks): Also set SD callback.
1308 (set_endianness, xfer_*, swap_*): Delete.
1309 (host_read_word, host_read_long, host_swap_word, host_swap_long):
1310 Change to functions using sim-endian macros.
1311 (control_c, sim_stop): Delete, use common version.
1312 (simulate): Convert into.
1313 (sim_engine_run): This function.
1314 (sim_resume): Delete.
1316 * interp.c (simulation): New variable - the simulator object.
1317 (sim_kind): Delete global - merged into simulation.
1318 (sim_load): Cleanup. Move PC assignment from here.
1319 (sim_create_inferior): To here.
1321 * sim-main.h: New file.
1322 * interp.c (sim-main.h): Include.
1324 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
1326 * configure: Regenerated to track ../common/aclocal.m4 changes.
1328 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
1330 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
1332 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
1334 * gencode.c (build_instruction): DIV instructions: check
1335 for division by zero and integer overflow before using
1336 host's division operation.
1338 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
1340 * Makefile.in (SIM_OBJS): Add sim-load.o.
1341 * interp.c: #include bfd.h.
1342 (target_byte_order): Delete.
1343 (sim_kind, myname, big_endian_p): New static locals.
1344 (sim_open): Set sim_kind, myname. Move call to set_endianness to
1345 after argument parsing. Recognize -E arg, set endianness accordingly.
1346 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
1347 load file into simulator. Set PC from bfd.
1348 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
1349 (set_endianness): Use big_endian_p instead of target_byte_order.
1351 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
1353 * interp.c (sim_size): Delete prototype - conflicts with
1354 definition in remote-sim.h. Correct definition.
1356 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1358 * configure: Regenerated to track ../common/aclocal.m4 changes.
1361 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
1363 * interp.c (sim_open): New arg `kind'.
1365 * configure: Regenerated to track ../common/aclocal.m4 changes.
1367 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1369 * configure: Regenerated to track ../common/aclocal.m4 changes.
1371 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
1373 * interp.c (sim_open): Set optind to 0 before calling getopt.
1375 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1377 * configure: Regenerated to track ../common/aclocal.m4 changes.
1379 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
1381 * interp.c : Replace uses of pr_addr with pr_uword64
1382 where the bit length is always 64 independent of SIM_ADDR.
1383 (pr_uword64) : added.
1385 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1387 * configure: Re-generate.
1389 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
1391 * configure: Regenerate to track ../common/aclocal.m4 changes.
1393 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
1395 * interp.c (sim_open): New SIM_DESC result. Argument is now
1397 (other sim_*): New SIM_DESC argument.
1399 start-sanitize-r5900
1400 Wed Feb 26 18:32:21 1997 Gavin Koch <gavin@cygnus.com>
1402 * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
1403 Change values to avoid overloading DOUBLEWORD which is tested
1405 * gencode.c: reinstate "offending code".
1408 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
1410 * interp.c: Fix printing of addresses for non-64-bit targets.
1411 (pr_addr): Add function to print address based on size.
1412 start-sanitize-r5900
1413 * gencode.c: #ifdef out offending code until a permanent fix
1414 can be added. Code is causing build errors for non-5900 mips targets.
1417 start-sanitize-r5900
1418 Thu Feb 20 10:40:24 1997 Gavin Koch <gavin@cetus.cygnus.com>
1420 * gencode.c (process_instructions): Correct test for ISA dependent
1421 architecture bits in isa field of MIPS_DECODE.
1424 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
1426 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
1428 start-sanitize-r5900
1429 Tue Feb 18 17:03:47 1997 Gavin Koch <gavin@cygnus.com>
1431 * gencode.c (MIPS_DECODE): Correct instruction feature flags for
1435 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
1437 * gencode.c (build_mips16_operands): Correct computation of base
1438 address for extended PC relative instruction.
1440 start-sanitize-r5900
1441 Fri Feb 7 11:12:44 1997 Gavin Koch <gavin@cygnus.com>
1443 * Makefile.in, configure, configure.in, gencode.c,
1444 interp.c, support.h: add r5900.
1447 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
1449 * interp.c (mips16_entry): Add support for floating point cases.
1450 (SignalException): Pass floating point cases to mips16_entry.
1451 (ValueFPR): Don't restrict fmt_single and fmt_word to even
1453 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
1455 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1456 and then set the state to fmt_uninterpreted.
1457 (COP_SW): Temporarily set the state to fmt_word while calling
1460 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
1462 * gencode.c (build_instruction): The high order may be set in the
1463 comparison flags at any ISA level, not just ISA 4.
1465 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
1467 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1468 COMMON_{PRE,POST}_CONFIG_FRAG instead.
1469 * configure.in: sinclude ../common/aclocal.m4.
1470 * configure: Regenerated.
1472 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
1474 * configure: Rebuild after change to aclocal.m4.
1476 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
1478 * configure configure.in Makefile.in: Update to new configure
1479 scheme which is more compatible with WinGDB builds.
1480 * configure.in: Improve comment on how to run autoconf.
1481 * configure: Re-run autoconf to get new ../common/aclocal.m4.
1482 * Makefile.in: Use autoconf substitution to install common
1485 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
1487 * gencode.c (build_instruction): Use BigEndianCPU instead of
1490 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
1492 * interp.c (sim_monitor): Make output to stdout visible in
1493 wingdb's I/O log window.
1495 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
1497 * support.h: Undo previous change to SIGTRAP
1500 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
1502 * interp.c (store_word, load_word): New static functions.
1503 (mips16_entry): New static function.
1504 (SignalException): Look for mips16 entry and exit instructions.
1505 (simulate): Use the correct index when setting fpr_state after
1506 doing a pending move.
1508 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
1510 * interp.c: Fix byte-swapping code throughout to work on
1511 both little- and big-endian hosts.
1513 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
1515 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1516 with gdb/config/i386/xm-windows.h.
1518 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
1520 * gencode.c (build_instruction): Work around MSVC++ code gen bug
1521 that messes up arithmetic shifts.
1523 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
1525 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
1526 SIGTRAP and SIGQUIT for _WIN32.
1528 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
1530 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1531 force a 64 bit multiplication.
1532 (build_instruction) [OR]: In mips16 mode, don't do anything if the
1533 destination register is 0, since that is the default mips16 nop
1536 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
1538 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1539 (build_endian_shift): Don't check proc64.
1540 (build_instruction): Always set memval to uword64. Cast op2 to
1541 uword64 when shifting it left in memory instructions. Always use
1542 the same code for stores--don't special case proc64.
1544 * gencode.c (build_mips16_operands): Fix base PC value for PC
1546 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1548 * interp.c (simJALDELAYSLOT): Define.
1549 (JALDELAYSLOT): Define.
1550 (INDELAYSLOT, INJALDELAYSLOT): Define.
1551 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1553 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
1555 * interp.c (sim_open): add flush_cache as a PMON routine
1556 (sim_monitor): handle flush_cache by ignoring it
1558 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
1560 * gencode.c (build_instruction): Use !ByteSwapMem instead of
1562 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1563 (BigEndianMem): Rename to ByteSwapMem and change sense.
1564 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1565 BigEndianMem references to !ByteSwapMem.
1566 (set_endianness): New function, with prototype.
1567 (sim_open): Call set_endianness.
1568 (sim_info): Use simBE instead of BigEndianMem.
1569 (xfer_direct_word, xfer_direct_long, swap_direct_word,
1570 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1571 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1572 ifdefs, keeping the prototype declaration.
1573 (swap_word): Rewrite correctly.
1574 (ColdReset): Delete references to CONFIG. Delete endianness related
1575 code; moved to set_endianness.
1577 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
1579 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1580 * interp.c (CHECKHILO): Define away.
1581 (simSIGINT): New macro.
1582 (membank_size): Increase from 1MB to 2MB.
1583 (control_c): New function.
1584 (sim_resume): Rename parameter signal to signal_number. Add local
1585 variable prev. Call signal before and after simulate.
1586 (sim_stop_reason): Add simSIGINT support.
1587 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1589 (sim_warning): Delete call to SignalException. Do call printf_filtered
1591 (AddressTranslation): Add #ifdef DEBUG around debugging message and
1592 a call to sim_warning.
1594 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
1596 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1597 16 bit instructions.
1599 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
1601 Add support for mips16 (16 bit MIPS implementation):
1602 * gencode.c (inst_type): Add mips16 instruction encoding types.
1603 (GETDATASIZEINSN): Define.
1604 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
1605 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
1607 (MIPS16_DECODE): New table, for mips16 instructions.
1608 (bitmap_val): New static function.
1609 (struct mips16_op): Define.
1610 (mips16_op_table): New table, for mips16 operands.
1611 (build_mips16_operands): New static function.
1612 (process_instructions): If PC is odd, decode a mips16
1613 instruction. Break out instruction handling into new
1614 build_instruction function.
1615 (build_instruction): New static function, broken out of
1616 process_instructions. Check modifiers rather than flags for SHIFT
1617 bit count and m[ft]{hi,lo} direction.
1618 (usage): Pass program name to fprintf.
1619 (main): Remove unused variable this_option_optind. Change
1620 ``*loptarg++'' to ``loptarg++''.
1621 (my_strtoul): Parenthesize && within ||.
1622 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
1623 (simulate): If PC is odd, fetch a 16 bit instruction, and
1624 increment PC by 2 rather than 4.
1625 * configure.in: Add case for mips16*-*-*.
1626 * configure: Rebuild.
1628 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
1630 * interp.c: Allow -t to enable tracing in standalone simulator.
1631 Fix garbage output in trace file and error messages.
1633 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
1635 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
1636 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
1637 * configure.in: Simplify using macros in ../common/aclocal.m4.
1638 * configure: Regenerated.
1639 * tconfig.in: New file.
1641 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
1643 * interp.c: Fix bugs in 64-bit port.
1644 Use ansi function declarations for msvc compiler.
1645 Initialize and test file pointer in trace code.
1646 Prevent duplicate definition of LAST_EMED_REGNUM.
1648 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
1650 * interp.c (xfer_big_long): Prevent unwanted sign extension.
1652 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
1654 * interp.c (SignalException): Check for explicit terminating
1656 * gencode.c: Pass instruction value through SignalException()
1657 calls for Trap, Breakpoint and Syscall.
1659 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
1661 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
1662 only used on those hosts that provide it.
1663 * configure.in: Add sqrt() to list of functions to be checked for.
1664 * config.in: Re-generated.
1665 * configure: Re-generated.
1667 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
1669 * gencode.c (process_instructions): Call build_endian_shift when
1670 expanding STORE RIGHT, to fix swr.
1671 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
1672 clear the high bits.
1673 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
1674 Fix float to int conversions to produce signed values.
1676 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
1678 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
1679 (process_instructions): Correct handling of nor instruction.
1680 Correct shift count for 32 bit shift instructions. Correct sign
1681 extension for arithmetic shifts to not shift the number of bits in
1682 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
1683 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
1685 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
1686 It's OK to have a mult follow a mult. What's not OK is to have a
1687 mult follow an mfhi.
1688 (Convert): Comment out incorrect rounding code.
1690 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
1692 * interp.c (sim_monitor): Improved monitor printf
1693 simulation. Tidied up simulator warnings, and added "--log" option
1694 for directing warning message output.
1695 * gencode.c: Use sim_warning() rather than WARNING macro.
1697 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
1699 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
1700 getopt1.o, rather than on gencode.c. Link objects together.
1701 Don't link against -liberty.
1702 (gencode.o, getopt.o, getopt1.o): New targets.
1703 * gencode.c: Include <ctype.h> and "ansidecl.h".
1704 (AND): Undefine after including "ansidecl.h".
1705 (ULONG_MAX): Define if not defined.
1706 (OP_*): Don't define macros; now defined in opcode/mips.h.
1707 (main): Call my_strtoul rather than strtoul.
1708 (my_strtoul): New static function.
1710 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
1712 * gencode.c (process_instructions): Generate word64 and uword64
1713 instead of `long long' and `unsigned long long' data types.
1714 * interp.c: #include sysdep.h to get signals, and define default
1716 * (Convert): Work around for Visual-C++ compiler bug with type
1718 * support.h: Make things compile under Visual-C++ by using
1719 __int64 instead of `long long'. Change many refs to long long
1720 into word64/uword64 typedefs.
1722 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
1724 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
1725 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
1727 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1728 (AC_PROG_INSTALL): Added.
1729 (AC_PROG_CC): Moved to before configure.host call.
1730 * configure: Rebuilt.
1732 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
1734 * configure.in: Define @SIMCONF@ depending on mips target.
1735 * configure: Rebuild.
1736 * Makefile.in (run): Add @SIMCONF@ to control simulator
1738 * gencode.c: Change LOADDRMASK to 64bit memory model only.
1739 * interp.c: Remove some debugging, provide more detailed error
1740 messages, update memory accesses to use LOADDRMASK.
1742 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
1744 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
1745 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
1747 * configure: Rebuild.
1748 * config.in: New file, generated by autoheader.
1749 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
1750 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
1751 HAVE_ANINT and HAVE_AINT, as appropriate.
1752 * Makefile.in (run): Use @LIBS@ rather than -lm.
1753 (interp.o): Depend upon config.h.
1754 (Makefile): Just rebuild Makefile.
1755 (clean): Remove stamp-h.
1756 (mostlyclean): Make the same as clean, not as distclean.
1757 (config.h, stamp-h): New targets.
1759 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
1761 * interp.c (ColdReset): Fix boolean test. Make all simulator
1764 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
1766 * interp.c (xfer_direct_word, xfer_direct_long,
1767 swap_direct_word, swap_direct_long, xfer_big_word,
1768 xfer_big_long, xfer_little_word, xfer_little_long,
1769 swap_word,swap_long): Added.
1770 * interp.c (ColdReset): Provide function indirection to
1771 host<->simulated_target transfer routines.
1772 * interp.c (sim_store_register, sim_fetch_register): Updated to
1773 make use of indirected transfer routines.
1775 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
1777 * gencode.c (process_instructions): Ensure FP ABS instruction
1779 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
1780 system call support.
1782 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
1784 * interp.c (sim_do_command): Complain if callback structure not
1787 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
1789 * interp.c (Convert): Provide round-to-nearest and round-to-zero
1790 support for Sun hosts.
1791 * Makefile.in (gencode): Ensure the host compiler and libraries
1792 used for cross-hosted build.
1794 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
1796 * interp.c, gencode.c: Some more (TODO) tidying.
1798 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
1800 * gencode.c, interp.c: Replaced explicit long long references with
1801 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
1802 * support.h (SET64LO, SET64HI): Macros added.
1804 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
1806 * configure: Regenerate with autoconf 2.7.
1808 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
1810 * interp.c (LoadMemory): Enclose text following #endif in /* */.
1811 * support.h: Remove superfluous "1" from #if.
1812 * support.h (CHECKSIM): Remove stray 'a' at end of line.
1814 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
1816 * interp.c (StoreFPR): Control UndefinedResult() call on
1817 WARN_RESULT manifest.
1819 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
1821 * gencode.c: Tidied instruction decoding, and added FP instruction
1824 * interp.c: Added dineroIII, and BSD profiling support. Also
1825 run-time FP handling.
1827 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1829 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
1830 gencode.c, interp.c, support.h: created.