1 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
3 * configure.in (mipstx39*-*-*): Use gencode simulator rather
8 Sun Mar 29 17:50:11 Frank Ch. Eigler <fche@cygnus.com>
10 * interp.c (decode_coproc): Added a missing TARGET_SKY check
11 around COP2 implementation skeleton.
15 Fri Mar 27 16:19:29 1998 Frank Ch. Eigler <fche@cygnus.com>
18 * Makefile.in (SIM_SKY_OBJS): Replaced sky-vu[01].o with sky-vu.o.
20 * interp.c (sim_{load,store}_register): Use new vu[01]_device
21 static to access VU registers.
22 (decode_coproc): Added skeleton of sky COP2 (VU) instruction
23 decoding. Work in progress.
25 * mips.igen (LDCzz, SDCzz): Removed *5900 case for this
26 overlapping/redundant bit pattern.
27 (LQC2, SQC2): Added *5900 COP2 instruction skeleta. Work in
30 * sim-main.h (status_CU[012]): Added COP[n]-enabled flags for
35 * interp.c (cop_lq, cop_sq): New functions for future 128-bit
36 access to coprocessor registers.
38 * sim-main.h (COP_LQ, COP_SQ): New macro front-ends for above.
40 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
42 * configure: Regenerated to track ../common/aclocal.m4 changes.
44 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
46 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
48 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
50 * configure: Regenerated to track ../common/aclocal.m4 changes.
51 * config.in: Regenerated to track ../common/aclocal.m4 changes.
53 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
55 * configure: Regenerated to track ../common/aclocal.m4 changes.
57 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
59 * interp.c (Max, Min): Comment out functions. Not yet used.
62 Wed Mar 25 10:04:13 1998 Andrew Cagney <cagney@b1.cygnus.com>
64 * vr4320.igen (DCLZ): Pacify GCC, 64 bit arg, int format.
67 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
69 * configure: Regenerated to track ../common/aclocal.m4 changes.
71 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
73 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
74 configurable settings for stand-alone simulator.
77 * configure.in: Added --with-sim-gpu2 option to specify path of
78 sky GPU2 library. Triggers -DSKY_GPU2 for sky-gpuif.c, and
79 links/compiles stand-alone simulator with this library.
81 * interp.c (MEM_SIZE): Increased default sky memory size to 16MB.
84 * configure.in: Added X11 search, just in case.
86 * configure: Regenerated.
88 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
90 * interp.c (sim_write, sim_read, load_memory, store_memory):
91 Replace sim_core_*_map with read_map, write_map, exec_map resp.
94 Tue Mar 10 10:32:22 1998 Gavin Koch <gavin@cygnus.com>
96 * vr4320.igen (clz,dclz) : Added.
97 (dmac): Replaced 99, with LO.
100 start-sanitize-vr5400
101 Fri Mar 6 08:30:58 1998 Andrew Cagney <cagney@b1.cygnus.com>
103 * mdmx.igen (SHFL.REPA.fmt, SHFL.REPB.fmt): Fix bit fields.
106 start-sanitize-vr4320
107 Tue Mar 3 11:56:29 1998 Gavin Koch <gavin@cygnus.com>
109 * vr4320.igen: New file.
110 * Makefile.in (vr4320.igen) : Added.
111 * configure.in (mips64vr4320-*-*): Added.
112 * configure : Rebuilt.
113 * mips.igen : Correct the bfd-names in the mips-ISA model entries.
114 Add the vr4320 model entry and mark the vr4320 insn as necessary.
117 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
119 * sim-main.h (GETFCC): Return an unsigned value.
122 * r5900.igen: Use an unsigned array index variable `i'.
123 (QFSRV): Ditto for variable bytes.
126 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
128 * mips.igen (DIV): Fix check for -1 / MIN_INT.
129 (DADD): Result destination is RD not RT.
132 * r5900.igen (DIV1): Fix check for -1 / MIN_INT.
133 (DIVU1): Don't check for MIN_INT / -1 as performing unsigned
137 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
139 * sim-main.h (HIACCESS, LOACCESS): Always define.
141 * mdmx.igen (Maxi, Mini): Rename Max, Min.
143 * interp.c (sim_info): Delete.
145 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
147 * interp.c (DECLARE_OPTION_HANDLER): Use it.
148 (mips_option_handler): New argument `cpu'.
149 (sim_open): Update call to sim_add_option_table.
151 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
153 * mips.igen (CxC1): Add tracing.
156 Wed Feb 25 13:59:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
158 * r5900.igen (StoreFP): Delete.
159 (r59fp_store, r59fp_overflow, r59fp_op1, r59fp_op2, r59fp_op3):
161 (rsqrt.s, sqrt.s): Implement.
162 (r59cond): New function.
163 (C.COND.S): Call r59cond in assembler line.
164 (cvt.w.s, cvt.s.w): Implement.
166 * mips.igen (rsqrt.fmt, sqrt.fmt, cvt.*.*): Remove from r5900
169 * sim-main.h: Define an enum of r5900 FCSR bit fields.
173 Tue Feb 24 14:44:18 1998 Andrew Cagney <cagney@b1.cygnus.com>
175 * r5900.igen: Add tracing to all p* instructions.
177 Tue Feb 24 02:47:33 1998 Andrew Cagney <cagney@b1.cygnus.com>
179 * interp.c (sim_store_register, sim_fetch_register): Pull swifty
180 to get gdb talking to re-aranged sim_cpu register structure.
183 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
185 * sim-main.h (Max, Min): Declare.
187 * interp.c (Max, Min): New functions.
189 * mips.igen (BC1): Add tracing.
191 start-sanitize-vr5400
192 Fri Feb 20 16:27:17 1998 Andrew Cagney <cagney@b1.cygnus.com>
194 * mdmx.igen: Tag all functions as requiring either with mdmx or
199 Fri Feb 20 15:55:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
201 * configure.in (SIM_AC_OPTION_FLOAT): For r5900, set FP bit size
203 (SIM_AC_OPTION_BITSIZE): For r5900, set nr address bits to 32.
205 * mips.igen (C.cond.fmt, ..): Not part of r5900 insn set.
207 * r5900.igen: Rewrite.
209 * sim-main.h: Move r5900 registers to a separate _sim_r5900_cpu
211 (GPR_SB, GPR_SH, GPR_SW, GPR_SD, GPR_UB, GPR_UH, GPR_UW, GPR_UD):
212 Define in terms of GPR/GPR1 instead of REGISTERS/REGISTERS.1
215 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
217 * interp.c Added memory map for stack in vr4100
219 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
221 * interp.c (load_memory): Add missing "break"'s.
223 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
225 * interp.c (sim_store_register, sim_fetch_register): Pass in
226 length parameter. Return -1.
228 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
230 * interp.c: Added hardware init hook, fixed warnings.
232 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
234 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
236 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
238 * interp.c (ifetch16): New function.
240 * sim-main.h (IMEM32): Rename IMEM.
241 (IMEM16_IMMED): Define.
243 (DELAY_SLOT): Update.
245 * m16run.c (sim_engine_run): New file.
247 * m16.igen: All instructions except LB.
248 (LB): Call do_load_byte.
249 * mips.igen (do_load_byte): New function.
250 (LB): Call do_load_byte.
252 * mips.igen: Move spec for insn bit size and high bit from here.
253 * Makefile.in (tmp-igen, tmp-m16): To here.
255 * m16.dc: New file, decode mips16 instructions.
257 * Makefile.in (SIM_NO_ALL): Define.
258 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
261 * m16.igen: Mark all mips16 insns as being part of the tx19 insn
265 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
267 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
268 point unit to 32 bit registers.
269 * configure: Re-generate.
271 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
273 * configure.in (sim_use_gen): Make IGEN the default simulator
274 generator for generic 32 and 64 bit mips targets.
275 * configure: Re-generate.
277 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
279 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
282 * interp.c (sim_fetch_register, sim_store_register): Read/write
283 FGR from correct location.
284 (sim_open): Set size of FGR's according to
285 WITH_TARGET_FLOATING_POINT_BITSIZE.
287 * sim-main.h (FGR): Store floating point registers in a separate
290 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
292 * configure: Regenerated to track ../common/aclocal.m4 changes.
294 start-sanitize-vr5400
295 * mdmx.igen: Mark all instructions as 64bit/fp specific.
298 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
300 * interp.c (ColdReset): Call PENDING_INVALIDATE.
302 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
304 * interp.c (pending_tick): New function. Deliver pending writes.
306 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
307 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
308 it can handle mixed sized quantites and single bits.
310 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
312 * interp.c (oengine.h): Do not include when building with IGEN.
313 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
314 (sim_info): Ditto for PROCESSOR_64BIT.
315 (sim_monitor): Replace ut_reg with unsigned_word.
316 (*): Ditto for t_reg.
317 (LOADDRMASK): Define.
318 (sim_open): Remove defunct check that host FP is IEEE compliant,
319 using software to emulate floating point.
320 (value_fpr, ...): Always compile, was conditional on HASFPU.
322 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
324 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
327 * interp.c (SD, CPU): Define.
328 (mips_option_handler): Set flags in each CPU.
329 (interrupt_event): Assume CPU 0 is the one being iterrupted.
330 (sim_close): Do not clear STATE, deleted anyway.
331 (sim_write, sim_read): Assume CPU zero's vm should be used for
333 (sim_create_inferior): Set the PC for all processors.
334 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
336 (mips16_entry): Pass correct nr of args to store_word, load_word.
337 (ColdReset): Cold reset all cpu's.
338 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
339 (sim_monitor, load_memory, store_memory, signal_exception): Use
340 `CPU' instead of STATE_CPU.
343 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
346 * sim-main.h (signal_exception): Add sim_cpu arg.
347 (SignalException*): Pass both SD and CPU to signal_exception.
348 * interp.c (signal_exception): Update.
350 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
352 (sync_operation, prefetch, cache_op, store_memory, load_memory,
353 address_translation): Ditto
354 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
356 start-sanitize-vr5400
357 * mdmx.igen (get_scale): Pass CPU_ to semantic_illegal instead of
359 (ByteAlign): Use StoreFPR, pass args in correct order.
363 Sun Feb 1 10:59:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
365 * configure.in (sim_igen_filter): For r5900, configure as SMP.
368 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
370 * configure: Regenerated to track ../common/aclocal.m4 changes.
372 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
375 * configure.in (sim_igen_filter): For r5900, use igen.
376 * configure: Re-generate.
379 * interp.c (sim_engine_run): Add `nr_cpus' argument.
381 * mips.igen (model): Map processor names onto BFD name.
383 * sim-main.h (CPU_CIA): Delete.
384 (SET_CIA, GET_CIA): Define
386 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
388 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
391 * configure.in (default_endian): Configure a big-endian simulator
393 * configure: Re-generate.
395 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
397 * configure: Regenerated to track ../common/aclocal.m4 changes.
399 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
401 * interp.c (sim_monitor): Handle Densan monitor outbyte
402 and inbyte functions.
404 1997-12-29 Felix Lee <flee@cygnus.com>
406 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
408 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
410 * Makefile.in (tmp-igen): Arrange for $zero to always be
411 reset to zero after every instruction.
413 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
415 * configure: Regenerated to track ../common/aclocal.m4 changes.
418 start-sanitize-vr5400
419 Sat Dec 13 15:18:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
421 * vr5400.igen (Low32Bits, High32Bits): Sign extend extracted 32
425 start-sanitize-vr5400
426 Fri Dec 12 12:26:07 1997 Jeffrey A Law (law@cygnus.com)
428 * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or
429 vr5400 with the vr5000 as the default.
432 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
434 * mips.igen (MSUB): Fix to work like MADD.
435 * gencode.c (MSUB): Similarly.
437 start-sanitize-vr5400
438 Tue Dec 9 12:02:12 1997 Andrew Cagney <cagney@b1.cygnus.com>
440 * configure.in (sim_igen_filter): Multi-sim vr5400 - vr5000 or
444 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
446 * configure: Regenerated to track ../common/aclocal.m4 changes.
448 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
450 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
452 start-sanitize-vr5400
453 * mdmx.igen (value_vr): Correct sim_io_eprintf format argument.
454 (value_cc, store_cc): Implement.
456 * sim-main.h: Add 8*3*8 bit accumulator.
458 * vr5400.igen: Move mdmx instructins from here
459 * mdmx.igen: To here - new file. Add/fix missing instructions.
460 * mips.igen: Include mdmx.igen.
461 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
464 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
466 * sim-main.h (sim-fpu.h): Include.
468 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
469 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
470 using host independant sim_fpu module.
472 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
474 * interp.c (signal_exception): Report internal errors with SIGABRT
477 * sim-main.h (C0_CONFIG): New register.
478 (signal.h): No longer include.
480 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
482 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
484 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
486 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
488 * mips.igen: Tag vr5000 instructions.
489 (ANDI): Was missing mipsIV model, fix assembler syntax.
490 (do_c_cond_fmt): New function.
491 (C.cond.fmt): Handle mips I-III which do not support CC field
493 (bc1): Handle mips IV which do not have a delaed FCC separatly.
494 (SDR): Mask paddr when BigEndianMem, not the converse as specified
496 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
497 vr5000 which saves LO in a GPR separatly.
499 * configure.in (enable-sim-igen): For vr5000, select vr5000
500 specific instructions.
501 * configure: Re-generate.
503 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
505 * Makefile.in (SIM_OBJS): Add sim-fpu module.
507 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
508 fmt_uninterpreted_64 bit cases to switch. Convert to
511 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
513 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
514 as specified in IV3.2 spec.
515 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
517 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
519 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
520 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
521 (start-sanitize-r5900):
522 (LWXC1, SWXC1): Delete from r5900 instruction set.
523 (end-sanitize-r5900):
524 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
525 PENDING_FILL versions of instructions. Simplify.
527 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
529 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
531 (MTHI, MFHI): Disable code checking HI-LO.
533 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
535 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
537 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
539 * gencode.c (build_mips16_operands): Replace IPC with cia.
541 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
542 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
544 (UndefinedResult): Replace function with macro/function
546 (sim_engine_run): Don't save PC in IPC.
548 * sim-main.h (IPC): Delete.
550 start-sanitize-vr5400
551 * vr5400.igen (vr): Add missing cia argument to value_fpr.
552 (do_select): Rename function select.
555 * interp.c (signal_exception, store_word, load_word,
556 address_translation, load_memory, store_memory, cache_op,
557 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
558 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
559 current instruction address - cia - argument.
560 (sim_read, sim_write): Call address_translation directly.
561 (sim_engine_run): Rename variable vaddr to cia.
562 (signal_exception): Pass cia to sim_monitor
564 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
565 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
566 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
568 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
569 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
572 * interp.c (signal_exception): Pass restart address to
575 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
576 idecode.o): Add dependency.
578 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
580 (DELAY_SLOT): Update NIA not PC with branch address.
581 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
583 * mips.igen: Use CIA not PC in branch calculations.
584 (illegal): Call SignalException.
585 (BEQ, ADDIU): Fix assembler.
587 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
589 * m16.igen (JALX): Was missing.
591 * configure.in (enable-sim-igen): New configuration option.
592 * configure: Re-generate.
594 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
596 * interp.c (load_memory, store_memory): Delete parameter RAW.
597 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
598 bypassing {load,store}_memory.
600 * sim-main.h (ByteSwapMem): Delete definition.
602 * Makefile.in (SIM_OBJS): Add sim-memopt module.
604 * interp.c (sim_do_command, sim_commands): Delete mips specific
605 commands. Handled by module sim-options.
607 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
608 (WITH_MODULO_MEMORY): Define.
610 * interp.c (sim_info): Delete code printing memory size.
612 * interp.c (mips_size): Nee sim_size, delete function.
614 (monitor, monitor_base, monitor_size): Delete global variables.
615 (sim_open, sim_close): Delete code creating monitor and other
616 memory regions. Use sim-memopts module, via sim_do_commandf, to
617 manage memory regions.
618 (load_memory, store_memory): Use sim-core for memory model.
620 * interp.c (address_translation): Delete all memory map code
621 except line forcing 32 bit addresses.
623 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
625 * sim-main.h (WITH_TRACE): Delete definition. Enables common
628 * interp.c (logfh, logfile): Delete globals.
629 (sim_open, sim_close): Delete code opening & closing log file.
630 (mips_option_handler): Delete -l and -n options.
631 (OPTION mips_options): Ditto.
633 * interp.c (OPTION mips_options): Rename option trace to dinero.
634 (mips_option_handler): Update.
636 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
638 * interp.c (fetch_str): New function.
639 (sim_monitor): Rewrite using sim_read & sim_write.
640 (sim_open): Check magic number.
641 (sim_open): Write monitor vectors into memory using sim_write.
642 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
643 (sim_read, sim_write): Simplify - transfer data one byte at a
645 (load_memory, store_memory): Clarify meaning of parameter RAW.
647 * sim-main.h (isHOST): Defete definition.
648 (isTARGET): Mark as depreciated.
649 (address_translation): Delete parameter HOST.
651 * interp.c (address_translation): Delete parameter HOST.
654 Wed Oct 29 14:21:32 1997 Gavin Koch <gavin@cygnus.com>
656 * gencode.c: Add tx49 configury and insns.
657 * configure.in: Add tx49 configury.
661 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
665 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
666 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
668 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
670 * mips.igen: Add model filter field to records.
672 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
674 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
676 interp.c (sim_engine_run): Do not compile function sim_engine_run
679 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
682 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
683 igen. Replace with configuration variables sim_igen_flags /
687 * r5900.igen: New file. Copy r5900 insns here.
689 start-sanitize-vr5400
690 * vr5400.igen: New file.
692 * m16.igen: New file. Copy mips16 insns here.
693 * mips.igen: From here.
695 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
697 start-sanitize-vr5400
698 * mips.igen: Tag all mipsIV instructions with vr5400 model.
700 * configure.in: Add mips64vr5400 target.
701 * configure: Re-generate.
704 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
706 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
708 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
710 * gencode.c (build_instruction): Follow sim_write's lead in using
711 BigEndianMem instead of !ByteSwapMem.
713 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
715 * configure.in (sim_gen): Dependent on target, select type of
716 generator. Always select old style generator.
718 configure: Re-generate.
720 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
722 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
723 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
724 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
725 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
726 SIM_@sim_gen@_*, set by autoconf.
728 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
730 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
732 * interp.c (ColdReset): Remove #ifdef HASFPU, check
733 CURRENT_FLOATING_POINT instead.
735 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
736 (address_translation): Raise exception InstructionFetch when
737 translation fails and isINSTRUCTION.
739 * interp.c (sim_open, sim_write, sim_monitor, store_word,
740 sim_engine_run): Change type of of vaddr and paddr to
742 (address_translation, prefetch, load_memory, store_memory,
743 cache_op): Change type of vAddr and pAddr to address_word.
745 * gencode.c (build_instruction): Change type of vaddr and paddr to
748 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
750 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
751 macro to obtain result of ALU op.
753 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
755 * interp.c (sim_info): Call profile_print.
757 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
759 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
761 * sim-main.h (WITH_PROFILE): Do not define, defined in
762 common/sim-config.h. Use sim-profile module.
763 (simPROFILE): Delete defintion.
765 * interp.c (PROFILE): Delete definition.
766 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
767 (sim_close): Delete code writing profile histogram.
768 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
770 (sim_engine_run): Delete code profiling the PC.
772 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
774 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
776 * interp.c (sim_monitor): Make register pointers of type
779 * sim-main.h: Make registers of type unsigned_word not
782 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
785 * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
786 ...): Move to sim-main.h
789 * interp.c (sync_operation): Rename from SyncOperation, make
790 global, add SD argument.
791 (prefetch): Rename from Prefetch, make global, add SD argument.
792 (decode_coproc): Make global.
794 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
796 * gencode.c (build_instruction): Generate DecodeCoproc not
799 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
800 (SizeFGR): Move to sim-main.h
801 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
802 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
803 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
805 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
806 FP_RM_TOMINF, GETRM): Move to sim-main.h.
807 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
808 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
809 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
810 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
812 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
814 (sim-alu.h): Include.
815 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
816 (sim_cia): Typedef to instruction_address.
818 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
820 * Makefile.in (interp.o): Rename generated file engine.c to
825 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
827 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
829 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
831 * gencode.c (build_instruction): For "FPSQRT", output correct
832 number of arguments to Recip.
834 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
836 * Makefile.in (interp.o): Depends on sim-main.h
838 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
840 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
841 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
842 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
843 STATE, DSSTATE): Define
844 (GPR, FGRIDX, ..): Define.
846 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
847 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
848 (GPR, FGRIDX, ...): Delete macros.
850 * interp.c: Update names to match defines from sim-main.h
852 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
854 * interp.c (sim_monitor): Add SD argument.
855 (sim_warning): Delete. Replace calls with calls to
857 (sim_error): Delete. Replace calls with sim_io_error.
858 (open_trace, writeout32, writeout16, getnum): Add SD argument.
859 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
860 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
862 (mips_size): Rename from sim_size. Add SD argument.
864 * interp.c (simulator): Delete global variable.
865 (callback): Delete global variable.
866 (mips_option_handler, sim_open, sim_write, sim_read,
867 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
868 sim_size,sim_monitor): Use sim_io_* not callback->*.
869 (sim_open): ZALLOC simulator struct.
870 (PROFILE): Do not define.
872 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
874 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
875 support.h with corresponding code.
877 * sim-main.h (word64, uword64), support.h: Move definition to
879 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
882 * Makefile.in: Update dependencies
883 * interp.c: Do not include.
885 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
887 * interp.c (address_translation, load_memory, store_memory,
888 cache_op): Rename to from AddressTranslation et.al., make global,
891 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
894 * interp.c (SignalException): Rename to signal_exception, make
897 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
899 * sim-main.h (SignalException, SignalExceptionInterrupt,
900 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
901 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
902 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
905 * interp.c, support.h: Use.
907 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
909 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
910 to value_fpr / store_fpr. Add SD argument.
911 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
912 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
914 * sim-main.h (ValueFPR, StoreFPR): Define.
916 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
918 * interp.c (sim_engine_run): Check consistency between configure
919 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
922 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
923 (mips_fpu): Configure WITH_FLOATING_POINT.
924 (mips_endian): Configure WITH_TARGET_ENDIAN.
927 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
929 * configure: Regenerated to track ../common/aclocal.m4 changes.
932 Mon Aug 25 19:11:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
934 * interp.c (MAX_REG): Allow up-to 128 registers.
935 (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
936 (REGISTER_SA): Ditto.
937 (sim_open): Initialize register_widths for r5900 specific
939 (sim_fetch_register, sim_store_register): Check for request of
940 r5900 specific SA register. Check for request for hi 64 bits of
941 r5900 specific registers.
944 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
946 * configure: Regenerated.
948 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
950 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
952 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
954 * gencode.c (print_igen_insn_models): Assume certain architectures
955 include all mips* instructions.
956 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
959 * Makefile.in (tmp.igen): Add target. Generate igen input from
962 * gencode.c (FEATURE_IGEN): Define.
963 (main): Add --igen option. Generate output in igen format.
964 (process_instructions): Format output according to igen option.
965 (print_igen_insn_format): New function.
966 (print_igen_insn_models): New function.
967 (process_instructions): Only issue warnings and ignore
968 instructions when no FEATURE_IGEN.
970 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
972 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
975 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
977 * configure: Regenerated to track ../common/aclocal.m4 changes.
979 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
981 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
982 SIM_RESERVED_BITS): Delete, moved to common.
983 (SIM_EXTRA_CFLAGS): Update.
985 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
987 * configure.in: Configure non-strict memory alignment.
988 * configure: Regenerated to track ../common/aclocal.m4 changes.
990 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
992 * configure: Regenerated to track ../common/aclocal.m4 changes.
994 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
996 * gencode.c (SDBBP,DERET): Added (3900) insns.
997 (RFE): Turn on for 3900.
998 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
999 (dsstate): Made global.
1000 (SUBTARGET_R3900): Added.
1001 (CANCELDELAYSLOT): New.
1002 (SignalException): Ignore SystemCall rather than ignore and
1003 terminate. Add DebugBreakPoint handling.
1004 (decode_coproc): New insns RFE, DERET; and new registers Debug
1005 and DEPC protected by SUBTARGET_R3900.
1006 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
1008 * Makefile.in,configure.in: Add mips subtarget option.
1009 * configure: Update.
1011 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
1013 * gencode.c: Add r3900 (tx39).
1016 * gencode.c: Fix some configuration problems by improving
1017 the relationship between tx19 and tx39.
1020 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
1022 * gencode.c (build_instruction): Don't need to subtract 4 for
1025 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
1027 * interp.c: Correct some HASFPU problems.
1029 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
1031 * configure: Regenerated to track ../common/aclocal.m4 changes.
1033 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
1035 * interp.c (mips_options): Fix samples option short form, should
1038 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
1040 * interp.c (sim_info): Enable info code. Was just returning.
1042 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
1044 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
1047 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
1049 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
1051 (build_instruction): Ditto for LL.
1054 Sun Sep 7 16:05:46 1997 Gavin Koch <gavin@cygnus.com>
1056 * mips/configure.in, mips/gencode: Add tx19/r1900.
1059 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
1061 * configure: Regenerated to track ../common/aclocal.m4 changes.
1063 start-sanitize-r5900
1064 Mon Sep 1 18:43:30 1997 Andrew Cagney <cagney@b1.cygnus.com>
1066 * gencode.c (build_instruction): For "pabsw" and "pabsh", check
1067 for overflow due to ABS of MININT, set result to MAXINT.
1068 (build_instruction): For "psrlvw", signextend bit 31.
1071 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1073 * configure: Regenerated to track ../common/aclocal.m4 changes.
1076 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
1078 * interp.c (sim_open): Add call to sim_analyze_program, update
1081 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
1083 * interp.c (sim_kill): Delete.
1084 (sim_create_inferior): Add ABFD argument. Set PC from same.
1085 (sim_load): Move code initializing trap handlers from here.
1086 (sim_open): To here.
1087 (sim_load): Delete, use sim-hload.c.
1089 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
1091 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1093 * configure: Regenerated to track ../common/aclocal.m4 changes.
1096 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1098 * interp.c (sim_open): Add ABFD argument.
1099 (sim_load): Move call to sim_config from here.
1100 (sim_open): To here. Check return status.
1102 start-sanitize-r5900
1103 * gencode.c (build_instruction): Do not define x8000000000000000,
1104 x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
1107 start-sanitize-r5900
1108 Mon Jul 28 19:49:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
1110 * gencode.c (build_instruction): For "pdivw", "pdivbw" and
1111 "pdivuw" check for overflow due to signed divide by -1.
1114 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
1116 * gencode.c (build_instruction): Two arg MADD should
1117 not assign result to $0.
1119 start-sanitize-r5900
1120 Thu Jul 10 11:58:48 1997 Andrew Cagney <cagney@critters.cygnus.com>
1122 * gencode.c (build_instruction): For "ppac5" use unsigned
1123 arrithmetic so that the sign bit doesn't smear when right shifted.
1124 (build_instruction): For "pdiv" perform sign extension when
1125 storing results in HI and LO.
1126 (build_instructions): For "pdiv" and "pdivbw" check for
1128 (build_instruction): For "pmfhl.slw" update hi part of dest
1129 register as well as low part.
1130 (build_instruction): For "pmfhl" portably handle long long values.
1131 (build_instruction): For "pmfhl.sh" correctly negative values.
1132 Store half words 2 and three in the correct place.
1133 (build_instruction): For "psllvw", sign extend value after shift.
1136 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
1138 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
1139 * sim/mips/configure.in: Regenerate.
1141 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
1143 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
1144 signed8, unsigned8 et.al. types.
1146 start-sanitize-r5900
1147 * gencode.c (build_instruction): For PMULTU* do not sign extend
1148 registers. Make generated code easier to debug.
1151 * interp.c (SUB_REG_FETCH): Handle both little and big endian
1152 hosts when selecting subreg.
1154 start-sanitize-r5900
1155 Tue Jul 8 18:07:20 1997 Andrew Cagney <cagney@andros.cygnus.com>
1157 * gencode.c (type_for_data_len): For 32bit operations concerned
1158 with overflow, perform op using 64bits.
1159 (build_instruction): For PADD, always compute operation using type
1160 returned by type_for_data_len.
1161 (build_instruction): For PSUBU, when overflow, saturate to zero as
1165 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
1167 start-sanitize-r5900
1168 * gencode.c (build_instruction): Handle "pext5" according to
1169 version 1.95 of the r5900 ISA.
1171 * gencode.c (build_instruction): Handle "ppac5" according to
1172 version 1.95 of the r5900 ISA.
1175 * interp.c (sim_engine_run): Reset the ZERO register to zero
1176 regardless of FEATURE_WARN_ZERO.
1177 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
1179 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
1181 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
1182 (SignalException): For BreakPoints ignore any mode bits and just
1184 (SignalException): Always set the CAUSE register.
1186 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
1188 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
1189 exception has been taken.
1191 * interp.c: Implement the ERET and mt/f sr instructions.
1193 start-sanitize-r5900
1194 Mon Jun 2 23:28:19 1997 Andrew Cagney <cagney@b1.cygnus.com>
1196 * gencode.c (build_instruction): For paddu, extract unsigned
1199 * gencode.c (build_instruction): Saturate padds instead of padd
1203 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
1205 * interp.c (SignalException): Don't bother restarting an
1208 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1210 * interp.c (SignalException): Really take an interrupt.
1211 (interrupt_event): Only deliver interrupts when enabled.
1213 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
1215 * interp.c (sim_info): Only print info when verbose.
1216 (sim_info) Use sim_io_printf for output.
1218 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1220 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
1223 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1225 * interp.c (sim_do_command): Check for common commands if a
1226 simulator specific command fails.
1228 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
1230 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
1231 and simBE when DEBUG is defined.
1233 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
1235 * interp.c (interrupt_event): New function. Pass exception event
1236 onto exception handler.
1238 * configure.in: Check for stdlib.h.
1239 * configure: Regenerate.
1241 * gencode.c (build_instruction): Add UNUSED attribute to tempS
1242 variable declaration.
1243 (build_instruction): Initialize memval1.
1244 (build_instruction): Add UNUSED attribute to byte, bigend,
1246 (build_operands): Ditto.
1248 * interp.c: Fix GCC warnings.
1249 (sim_get_quit_code): Delete.
1251 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
1252 * Makefile.in: Ditto.
1253 * configure: Re-generate.
1255 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
1257 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1259 * interp.c (mips_option_handler): New function parse argumes using
1261 (myname): Replace with STATE_MY_NAME.
1262 (sim_open): Delete check for host endianness - performed by
1264 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
1265 (sim_open): Move much of the initialization from here.
1266 (sim_load): To here. After the image has been loaded and
1268 (sim_open): Move ColdReset from here.
1269 (sim_create_inferior): To here.
1270 (sim_open): Make FP check less dependant on host endianness.
1272 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
1274 * interp.c (sim_set_callbacks): Delete.
1276 * interp.c (membank, membank_base, membank_size): Replace with
1277 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
1278 (sim_open): Remove call to callback->init. gdb/run do this.
1282 * sim-main.h (SIM_HAVE_FLATMEM): Define.
1284 * interp.c (big_endian_p): Delete, replaced by
1285 current_target_byte_order.
1287 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
1289 * interp.c (host_read_long, host_read_word, host_swap_word,
1290 host_swap_long): Delete. Using common sim-endian.
1291 (sim_fetch_register, sim_store_register): Use H2T.
1292 (pipeline_ticks): Delete. Handled by sim-events.
1294 (sim_engine_run): Update.
1296 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
1298 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
1300 (SignalException): To here. Signal using sim_engine_halt.
1301 (sim_stop_reason): Delete, moved to common.
1303 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
1305 * interp.c (sim_open): Add callback argument.
1306 (sim_set_callbacks): Delete SIM_DESC argument.
1309 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
1311 * Makefile.in (SIM_OBJS): Add common modules.
1313 * interp.c (sim_set_callbacks): Also set SD callback.
1314 (set_endianness, xfer_*, swap_*): Delete.
1315 (host_read_word, host_read_long, host_swap_word, host_swap_long):
1316 Change to functions using sim-endian macros.
1317 (control_c, sim_stop): Delete, use common version.
1318 (simulate): Convert into.
1319 (sim_engine_run): This function.
1320 (sim_resume): Delete.
1322 * interp.c (simulation): New variable - the simulator object.
1323 (sim_kind): Delete global - merged into simulation.
1324 (sim_load): Cleanup. Move PC assignment from here.
1325 (sim_create_inferior): To here.
1327 * sim-main.h: New file.
1328 * interp.c (sim-main.h): Include.
1330 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
1332 * configure: Regenerated to track ../common/aclocal.m4 changes.
1334 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
1336 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
1338 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
1340 * gencode.c (build_instruction): DIV instructions: check
1341 for division by zero and integer overflow before using
1342 host's division operation.
1344 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
1346 * Makefile.in (SIM_OBJS): Add sim-load.o.
1347 * interp.c: #include bfd.h.
1348 (target_byte_order): Delete.
1349 (sim_kind, myname, big_endian_p): New static locals.
1350 (sim_open): Set sim_kind, myname. Move call to set_endianness to
1351 after argument parsing. Recognize -E arg, set endianness accordingly.
1352 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
1353 load file into simulator. Set PC from bfd.
1354 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
1355 (set_endianness): Use big_endian_p instead of target_byte_order.
1357 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
1359 * interp.c (sim_size): Delete prototype - conflicts with
1360 definition in remote-sim.h. Correct definition.
1362 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1364 * configure: Regenerated to track ../common/aclocal.m4 changes.
1367 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
1369 * interp.c (sim_open): New arg `kind'.
1371 * configure: Regenerated to track ../common/aclocal.m4 changes.
1373 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1375 * configure: Regenerated to track ../common/aclocal.m4 changes.
1377 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
1379 * interp.c (sim_open): Set optind to 0 before calling getopt.
1381 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1383 * configure: Regenerated to track ../common/aclocal.m4 changes.
1385 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
1387 * interp.c : Replace uses of pr_addr with pr_uword64
1388 where the bit length is always 64 independent of SIM_ADDR.
1389 (pr_uword64) : added.
1391 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1393 * configure: Re-generate.
1395 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
1397 * configure: Regenerate to track ../common/aclocal.m4 changes.
1399 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
1401 * interp.c (sim_open): New SIM_DESC result. Argument is now
1403 (other sim_*): New SIM_DESC argument.
1405 start-sanitize-r5900
1406 Wed Feb 26 18:32:21 1997 Gavin Koch <gavin@cygnus.com>
1408 * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
1409 Change values to avoid overloading DOUBLEWORD which is tested
1411 * gencode.c: reinstate "offending code".
1414 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
1416 * interp.c: Fix printing of addresses for non-64-bit targets.
1417 (pr_addr): Add function to print address based on size.
1418 start-sanitize-r5900
1419 * gencode.c: #ifdef out offending code until a permanent fix
1420 can be added. Code is causing build errors for non-5900 mips targets.
1423 start-sanitize-r5900
1424 Thu Feb 20 10:40:24 1997 Gavin Koch <gavin@cetus.cygnus.com>
1426 * gencode.c (process_instructions): Correct test for ISA dependent
1427 architecture bits in isa field of MIPS_DECODE.
1430 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
1432 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
1434 start-sanitize-r5900
1435 Tue Feb 18 17:03:47 1997 Gavin Koch <gavin@cygnus.com>
1437 * gencode.c (MIPS_DECODE): Correct instruction feature flags for
1441 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
1443 * gencode.c (build_mips16_operands): Correct computation of base
1444 address for extended PC relative instruction.
1446 start-sanitize-r5900
1447 Fri Feb 7 11:12:44 1997 Gavin Koch <gavin@cygnus.com>
1449 * Makefile.in, configure, configure.in, gencode.c,
1450 interp.c, support.h: add r5900.
1453 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
1455 * interp.c (mips16_entry): Add support for floating point cases.
1456 (SignalException): Pass floating point cases to mips16_entry.
1457 (ValueFPR): Don't restrict fmt_single and fmt_word to even
1459 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
1461 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1462 and then set the state to fmt_uninterpreted.
1463 (COP_SW): Temporarily set the state to fmt_word while calling
1466 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
1468 * gencode.c (build_instruction): The high order may be set in the
1469 comparison flags at any ISA level, not just ISA 4.
1471 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
1473 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1474 COMMON_{PRE,POST}_CONFIG_FRAG instead.
1475 * configure.in: sinclude ../common/aclocal.m4.
1476 * configure: Regenerated.
1478 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
1480 * configure: Rebuild after change to aclocal.m4.
1482 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
1484 * configure configure.in Makefile.in: Update to new configure
1485 scheme which is more compatible with WinGDB builds.
1486 * configure.in: Improve comment on how to run autoconf.
1487 * configure: Re-run autoconf to get new ../common/aclocal.m4.
1488 * Makefile.in: Use autoconf substitution to install common
1491 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
1493 * gencode.c (build_instruction): Use BigEndianCPU instead of
1496 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
1498 * interp.c (sim_monitor): Make output to stdout visible in
1499 wingdb's I/O log window.
1501 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
1503 * support.h: Undo previous change to SIGTRAP
1506 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
1508 * interp.c (store_word, load_word): New static functions.
1509 (mips16_entry): New static function.
1510 (SignalException): Look for mips16 entry and exit instructions.
1511 (simulate): Use the correct index when setting fpr_state after
1512 doing a pending move.
1514 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
1516 * interp.c: Fix byte-swapping code throughout to work on
1517 both little- and big-endian hosts.
1519 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
1521 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1522 with gdb/config/i386/xm-windows.h.
1524 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
1526 * gencode.c (build_instruction): Work around MSVC++ code gen bug
1527 that messes up arithmetic shifts.
1529 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
1531 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
1532 SIGTRAP and SIGQUIT for _WIN32.
1534 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
1536 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1537 force a 64 bit multiplication.
1538 (build_instruction) [OR]: In mips16 mode, don't do anything if the
1539 destination register is 0, since that is the default mips16 nop
1542 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
1544 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1545 (build_endian_shift): Don't check proc64.
1546 (build_instruction): Always set memval to uword64. Cast op2 to
1547 uword64 when shifting it left in memory instructions. Always use
1548 the same code for stores--don't special case proc64.
1550 * gencode.c (build_mips16_operands): Fix base PC value for PC
1552 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1554 * interp.c (simJALDELAYSLOT): Define.
1555 (JALDELAYSLOT): Define.
1556 (INDELAYSLOT, INJALDELAYSLOT): Define.
1557 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1559 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
1561 * interp.c (sim_open): add flush_cache as a PMON routine
1562 (sim_monitor): handle flush_cache by ignoring it
1564 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
1566 * gencode.c (build_instruction): Use !ByteSwapMem instead of
1568 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1569 (BigEndianMem): Rename to ByteSwapMem and change sense.
1570 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1571 BigEndianMem references to !ByteSwapMem.
1572 (set_endianness): New function, with prototype.
1573 (sim_open): Call set_endianness.
1574 (sim_info): Use simBE instead of BigEndianMem.
1575 (xfer_direct_word, xfer_direct_long, swap_direct_word,
1576 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1577 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1578 ifdefs, keeping the prototype declaration.
1579 (swap_word): Rewrite correctly.
1580 (ColdReset): Delete references to CONFIG. Delete endianness related
1581 code; moved to set_endianness.
1583 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
1585 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1586 * interp.c (CHECKHILO): Define away.
1587 (simSIGINT): New macro.
1588 (membank_size): Increase from 1MB to 2MB.
1589 (control_c): New function.
1590 (sim_resume): Rename parameter signal to signal_number. Add local
1591 variable prev. Call signal before and after simulate.
1592 (sim_stop_reason): Add simSIGINT support.
1593 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1595 (sim_warning): Delete call to SignalException. Do call printf_filtered
1597 (AddressTranslation): Add #ifdef DEBUG around debugging message and
1598 a call to sim_warning.
1600 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
1602 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1603 16 bit instructions.
1605 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
1607 Add support for mips16 (16 bit MIPS implementation):
1608 * gencode.c (inst_type): Add mips16 instruction encoding types.
1609 (GETDATASIZEINSN): Define.
1610 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
1611 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
1613 (MIPS16_DECODE): New table, for mips16 instructions.
1614 (bitmap_val): New static function.
1615 (struct mips16_op): Define.
1616 (mips16_op_table): New table, for mips16 operands.
1617 (build_mips16_operands): New static function.
1618 (process_instructions): If PC is odd, decode a mips16
1619 instruction. Break out instruction handling into new
1620 build_instruction function.
1621 (build_instruction): New static function, broken out of
1622 process_instructions. Check modifiers rather than flags for SHIFT
1623 bit count and m[ft]{hi,lo} direction.
1624 (usage): Pass program name to fprintf.
1625 (main): Remove unused variable this_option_optind. Change
1626 ``*loptarg++'' to ``loptarg++''.
1627 (my_strtoul): Parenthesize && within ||.
1628 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
1629 (simulate): If PC is odd, fetch a 16 bit instruction, and
1630 increment PC by 2 rather than 4.
1631 * configure.in: Add case for mips16*-*-*.
1632 * configure: Rebuild.
1634 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
1636 * interp.c: Allow -t to enable tracing in standalone simulator.
1637 Fix garbage output in trace file and error messages.
1639 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
1641 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
1642 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
1643 * configure.in: Simplify using macros in ../common/aclocal.m4.
1644 * configure: Regenerated.
1645 * tconfig.in: New file.
1647 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
1649 * interp.c: Fix bugs in 64-bit port.
1650 Use ansi function declarations for msvc compiler.
1651 Initialize and test file pointer in trace code.
1652 Prevent duplicate definition of LAST_EMED_REGNUM.
1654 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
1656 * interp.c (xfer_big_long): Prevent unwanted sign extension.
1658 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
1660 * interp.c (SignalException): Check for explicit terminating
1662 * gencode.c: Pass instruction value through SignalException()
1663 calls for Trap, Breakpoint and Syscall.
1665 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
1667 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
1668 only used on those hosts that provide it.
1669 * configure.in: Add sqrt() to list of functions to be checked for.
1670 * config.in: Re-generated.
1671 * configure: Re-generated.
1673 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
1675 * gencode.c (process_instructions): Call build_endian_shift when
1676 expanding STORE RIGHT, to fix swr.
1677 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
1678 clear the high bits.
1679 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
1680 Fix float to int conversions to produce signed values.
1682 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
1684 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
1685 (process_instructions): Correct handling of nor instruction.
1686 Correct shift count for 32 bit shift instructions. Correct sign
1687 extension for arithmetic shifts to not shift the number of bits in
1688 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
1689 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
1691 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
1692 It's OK to have a mult follow a mult. What's not OK is to have a
1693 mult follow an mfhi.
1694 (Convert): Comment out incorrect rounding code.
1696 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
1698 * interp.c (sim_monitor): Improved monitor printf
1699 simulation. Tidied up simulator warnings, and added "--log" option
1700 for directing warning message output.
1701 * gencode.c: Use sim_warning() rather than WARNING macro.
1703 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
1705 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
1706 getopt1.o, rather than on gencode.c. Link objects together.
1707 Don't link against -liberty.
1708 (gencode.o, getopt.o, getopt1.o): New targets.
1709 * gencode.c: Include <ctype.h> and "ansidecl.h".
1710 (AND): Undefine after including "ansidecl.h".
1711 (ULONG_MAX): Define if not defined.
1712 (OP_*): Don't define macros; now defined in opcode/mips.h.
1713 (main): Call my_strtoul rather than strtoul.
1714 (my_strtoul): New static function.
1716 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
1718 * gencode.c (process_instructions): Generate word64 and uword64
1719 instead of `long long' and `unsigned long long' data types.
1720 * interp.c: #include sysdep.h to get signals, and define default
1722 * (Convert): Work around for Visual-C++ compiler bug with type
1724 * support.h: Make things compile under Visual-C++ by using
1725 __int64 instead of `long long'. Change many refs to long long
1726 into word64/uword64 typedefs.
1728 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
1730 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
1731 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
1733 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1734 (AC_PROG_INSTALL): Added.
1735 (AC_PROG_CC): Moved to before configure.host call.
1736 * configure: Rebuilt.
1738 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
1740 * configure.in: Define @SIMCONF@ depending on mips target.
1741 * configure: Rebuild.
1742 * Makefile.in (run): Add @SIMCONF@ to control simulator
1744 * gencode.c: Change LOADDRMASK to 64bit memory model only.
1745 * interp.c: Remove some debugging, provide more detailed error
1746 messages, update memory accesses to use LOADDRMASK.
1748 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
1750 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
1751 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
1753 * configure: Rebuild.
1754 * config.in: New file, generated by autoheader.
1755 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
1756 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
1757 HAVE_ANINT and HAVE_AINT, as appropriate.
1758 * Makefile.in (run): Use @LIBS@ rather than -lm.
1759 (interp.o): Depend upon config.h.
1760 (Makefile): Just rebuild Makefile.
1761 (clean): Remove stamp-h.
1762 (mostlyclean): Make the same as clean, not as distclean.
1763 (config.h, stamp-h): New targets.
1765 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
1767 * interp.c (ColdReset): Fix boolean test. Make all simulator
1770 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
1772 * interp.c (xfer_direct_word, xfer_direct_long,
1773 swap_direct_word, swap_direct_long, xfer_big_word,
1774 xfer_big_long, xfer_little_word, xfer_little_long,
1775 swap_word,swap_long): Added.
1776 * interp.c (ColdReset): Provide function indirection to
1777 host<->simulated_target transfer routines.
1778 * interp.c (sim_store_register, sim_fetch_register): Updated to
1779 make use of indirected transfer routines.
1781 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
1783 * gencode.c (process_instructions): Ensure FP ABS instruction
1785 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
1786 system call support.
1788 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
1790 * interp.c (sim_do_command): Complain if callback structure not
1793 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
1795 * interp.c (Convert): Provide round-to-nearest and round-to-zero
1796 support for Sun hosts.
1797 * Makefile.in (gencode): Ensure the host compiler and libraries
1798 used for cross-hosted build.
1800 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
1802 * interp.c, gencode.c: Some more (TODO) tidying.
1804 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
1806 * gencode.c, interp.c: Replaced explicit long long references with
1807 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
1808 * support.h (SET64LO, SET64HI): Macros added.
1810 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
1812 * configure: Regenerate with autoconf 2.7.
1814 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
1816 * interp.c (LoadMemory): Enclose text following #endif in /* */.
1817 * support.h: Remove superfluous "1" from #if.
1818 * support.h (CHECKSIM): Remove stray 'a' at end of line.
1820 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
1822 * interp.c (StoreFPR): Control UndefinedResult() call on
1823 WARN_RESULT manifest.
1825 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
1827 * gencode.c: Tidied instruction decoding, and added FP instruction
1830 * interp.c: Added dineroIII, and BSD profiling support. Also
1831 run-time FP handling.
1833 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1835 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
1836 gencode.c, interp.c, support.h: created.