sim/mips/ChangeLog

   1 2015-04-01  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * tconfig.h (SIM_HAVE_PROFILE): Delete.
   4
   5 2015-03-31  Mike Frysinger  <vapier@gentoo.org>
   6
   7         * config.in, configure: Regenerate.
   8
   9 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
  10
  11         * interp.c (sim_pc_get): New function.
  12
  13 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
  14
  15         * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
  16         * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
  17
  18 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
  19
  20         * configure: Regenerate.
  21
  22 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
  23
  24         * configure: Regenerate.
  25
  26 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
  27
  28         * configure: Regenerate.
  29         * configure.ac (mips_extra_objs): Delete.
  30         * Makefile.in (MIPS_EXTRA_OBJS): Delete.
  31         (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
  32
  33 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
  34
  35         * configure: Regenerate.
  36         * configure.ac: Delete sim_hw checks for dv-sockser.
  37
  38 2015-03-16  Mike Frysinger  <vapier@gentoo.org>
  39
  40         * config.in, configure: Regenerate.
  41         * tconfig.in: Rename file ...
  42         * tconfig.h: ... here.
  43
  44 2015-03-15  Mike Frysinger  <vapier@gentoo.org>
  45
  46         * tconfig.in: Delete includes.
  47         [HAVE_DV_SOCKSER]: Delete.
  48
  49 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
  50
  51         * Makefile.in (SIM_RUN_OBJS): Delete.
  52
  53 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
  54
  55         * configure.ac (AC_CHECK_HEADERS): Delete.
  56         * aclocal.m4, configure: Regenerate.
  57
  58 2014-08-19  Alan Modra  <amodra@gmail.com>
  59
  60         * configure: Regenerate.
  61
  62 2014-08-15  Roland McGrath  <mcgrathr@google.com>
  63
  64         * configure: Regenerate.
  65         * config.in: Regenerate.
  66
  67 2014-03-04  Mike Frysinger  <vapier@gentoo.org>
  68
  69         * configure: Regenerate.
  70
  71 2013-09-23  Alan Modra  <amodra@gmail.com>
  72
  73         * configure: Regenerate.
  74
  75 2013-06-03  Mike Frysinger  <vapier@gentoo.org>
  76
  77         * aclocal.m4, configure: Regenerate.
  78
  79 2013-05-10  Freddie Chopin  <freddie_chopin@op.pl>
  80
  81         * configure: Rebuild.
  82
  83 2013-03-26  Mike Frysinger  <vapier@gentoo.org>
  84
  85         * configure: Regenerate.
  86
  87 2013-03-23  Joel Sherrill  <joel.sherrill@oarcorp.com>
  88
  89         * configure.ac: Address use of dv-sockser.o.
  90         * tconfig.in: Conditionalize use of dv_sockser_install.
  91         * configure: Regenerated.
  92         * config.in: Regenerated.
  93
  94 2012-10-04  Chao-ying Fu  <fu@mips.com>
  95             Steve Ellcey  <sellcey@mips.com>
  96
  97         * mips/mips3264r2.igen (rdhwr): New.
  98
  99 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
 100
 101         * configure.ac: Always link against dv-sockser.o.
 102         * configure: Regenerate.
 103
 104 2012-06-15  Joel Brobecker  <brobecker@adacore.com>
 105
 106         * config.in, configure: Regenerate.
 107
 108 2012-05-18  Nick Clifton  <nickc@redhat.com>
 109
 110         PR 14072
 111         * interp.c: Include config.h before system header files.
 112
 113 2012-03-24  Mike Frysinger  <vapier@gentoo.org>
 114
 115         * aclocal.m4, config.in, configure: Regenerate.
 116
 117 2011-12-03  Mike Frysinger  <vapier@gentoo.org>
 118
 119         * aclocal.m4: New file.
 120         * configure: Regenerate.
 121
 122 2011-10-19  Mike Frysinger  <vapier@gentoo.org>
 123
 124         * configure: Regenerate after common/acinclude.m4 update.
 125
 126 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 127
 128         * configure.ac: Change include to common/acinclude.m4.
 129
 130 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 131
 132         * configure.ac: Change AC_PREREQ to 2.64.  Delete AC_CONFIG_HEADER
 133         call.  Replace common.m4 include with SIM_AC_COMMON.
 134         * configure: Regenerate.
 135
 136 2011-07-08  Hans-Peter Nilsson  <hp@axis.com>
 137
 138         * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
 139         $(SIM_EXTRA_DEPS).
 140         (tmp-mach-multi): Exit early when igen fails.
 141
 142 2011-07-05  Mike Frysinger  <vapier@gentoo.org>
 143
 144         * interp.c (sim_do_command): Delete.
 145
 146 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 147
 148         * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
 149         (tx3904sio_fifo_reset): Likewise.
 150         * interp.c (sim_monitor): Likewise.
 151
 152 2010-04-14  Mike Frysinger  <vapier@gentoo.org>
 153
 154         * interp.c (sim_write): Add const to buffer arg.
 155
 156 2010-01-18  Masaki Muranaka  <monaka@monami-software.com>  (tiny change)
 157
 158         * interp.c: Don't include sysdep.h
 159
 160 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 161
 162         * configure: Regenerate.
 163
 164 2009-08-22  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 165
 166         * config.in: Regenerate.
 167         * configure: Likewise.
 168
 169         * configure: Regenerate.
 170
 171 2008-07-11  Hans-Peter Nilsson  <hp@axis.com>
 172
 173         * configure: Regenerate to track ../common/common.m4 changes.
 174         * config.in: Ditto.
 175
 176 2008-06-06  Vladimir Prus  <vladimir@codesourcery.com>
 177             Daniel Jacobowitz  <dan@codesourcery.com>
 178             Joseph Myers  <joseph@codesourcery.com>
 179
 180         * configure: Regenerate.
 181
 182 2007-10-22  Richard Sandiford  <rsandifo@nildram.co.uk>
 183
 184         * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
 185         that unconditionally allows fmt_ps.
 186         (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
 187         (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
 188         (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
 189         filter from 64,f to 32,f.
 190         (PREFX): Change filter from 64 to 32.
 191         (LDXC1, LUXC1): Provide separate mips32r2 implementations
 192         that use do_load_double instead of do_load.  Make both LUXC1
 193         versions unpredictable if SizeFGR () != 64.
 194         (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
 195         instead of do_store.  Remove unused variable.  Make both SUXC1
 196         versions unpredictable if SizeFGR () != 64.
 197
 198 2007-10-07  Richard Sandiford  <rsandifo@nildram.co.uk>
 199
 200         * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
 201         (sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
 202         shifts for that case.
 203
 204 2007-09-04  Nick Clifton  <nickc@redhat.com>
 205
 206         * interp.c (options enum): Add OPTION_INFO_MEMORY.
 207         (display_mem_info): New static variable.
 208         (mips_option_handler): Handle OPTION_INFO_MEMORY.
 209         (mips_options): Add info-memory and memory-info.
 210         (sim_open): After processing the command line and board
 211         specification, check display_mem_info.  If it is set then
 212         call the real handler for the --memory-info command line
 213         switch.
 214
 215 2007-08-24  Joel Brobecker  <brobecker@adacore.com>
 216
 217         * configure.ac: Change license of multi-run.c to GPL version 3.
 218         * configure: Regenerate.
 219
 220 2007-06-28  Richard Sandiford  <richard@codesourcery.com>
 221
 222         * configure.ac, configure: Revert last patch.
 223
 224 2007-06-26  Richard Sandiford  <richard@codesourcery.com>
 225
 226         * configure.ac (sim_mipsisa3264_configs): New variable.
 227         (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
 228         every configuration support all four targets, using the triplet to
 229         determine the default.
 230         * configure: Regenerate.
 231
 232 2007-06-25  Richard Sandiford  <richard@codesourcery.com>
 233
 234         * Makefile.in (m16run.o): New rule.
 235
 236 2007-05-15  Thiemo Seufer  <ths@mips.com>
 237
 238         * mips3264r2.igen (DSHD): Fix compile warning.
 239
 240 2007-05-14  Thiemo Seufer  <ths@mips.com>
 241
 242         * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
 243         CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
 244         NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
 245         RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
 246         for mips32r2.
 247
 248 2007-03-01  Thiemo Seufer  <ths@mips.com>
 249
 250         * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
 251         and mips64.
 252
 253 2007-02-20  Thiemo Seufer  <ths@mips.com>
 254
 255         * dsp.igen: Update copyright notice.
 256         * dsp2.igen: Fix copyright notice.
 257
 258 2007-02-20  Thiemo Seufer  <ths@mips.com>
 259             Chao-Ying Fu  <fu@mips.com>
 260
 261         * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
 262         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 263         Add dsp2 to sim_igen_machine.
 264         * configure: Regenerate.
 265         * dsp.igen (do_ph_op): Add MUL support when op = 2.
 266         (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
 267         (mulq_rs.ph): Use do_ph_mulq.
 268         (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
 269         * mips.igen: Add dsp2 model and include dsp2.igen.
 270         (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
 271         for *mips32r2, *mips64r2, *dsp.
 272         (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
 273         for *mips32r2, *mips64r2, *dsp2.
 274         * dsp2.igen: New file for MIPS DSP REV 2 ASE.
 275
 276 2007-02-19  Thiemo Seufer  <ths@mips.com>
 277             Nigel Stephens  <nigel@mips.com>
 278
 279         * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
 280         jumps with hazard barrier.
 281
 282 2007-02-19  Thiemo Seufer  <ths@mips.com>
 283             Nigel Stephens  <nigel@mips.com>
 284
 285         * interp.c (sim_monitor): Flush stdout and stderr file descriptors
 286         after each call to sim_io_write.
 287
 288 2007-02-19  Thiemo Seufer  <ths@mips.com>
 289             Nigel Stephens  <nigel@mips.com>
 290
 291         * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
 292         supported by this simulator.
 293         (decode_coproc): Recognise additional CP0 Config registers
 294         correctly.
 295
 296 2007-02-19  Thiemo Seufer  <ths@mips.com>
 297             Nigel Stephens  <nigel@mips.com>
 298             David Ung  <davidu@mips.com>
 299
 300         * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
 301         uninterpreted formats. If fmt is one of the uninterpreted types
 302         don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
 303         fmt_word, and fmt_uninterpreted_64 like fmt_long.
 304         (store_fpr): When writing an invalid odd register, set the
 305         matching even register to fmt_unknown, not the following register.
 306         * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
 307         the the memory window at offset 0 set by --memory-size command
 308         line option.
 309         (sim_store_register): Handle storing 4 bytes to an 8 byte floating
 310         point register.
 311         (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
 312         register.
 313         (sim_monitor): When returning the memory size to the MIPS
 314         application, use the value in STATE_MEM_SIZE, not an arbitrary
 315         hardcoded value.
 316         (cop_lw): Don' mess around with FPR_STATE, just pass
 317         fmt_uninterpreted_32 to StoreFPR.
 318         (cop_sw): Similarly.
 319         (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
 320         (cop_sd): Similarly.
 321         * mips.igen (not_word_value): Single version for mips32, mips64
 322         and mips16.
 323
 324 2007-02-19  Thiemo Seufer <ths@mips.com>
 325             Nigel Stephens  <nigel@mips.com>
 326
 327         * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
 328         MBytes.
 329
 330 2007-02-17  Thiemo Seufer  <ths@mips.com>
 331
 332         * configure.ac (mips*-sde-elf*): Move in front of generic machine
 333         configuration.
 334         * configure: Regenerate.
 335
 336 2007-02-17  Thiemo Seufer  <ths@mips.com>
 337
 338         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 339         Add mdmx to sim_igen_machine.
 340         (mipsisa64*-*-*): Likewise. Remove dsp.
 341         (mipsisa32*-*-*): Remove dsp.
 342         * configure: Regenerate.
 343
 344 2007-02-13  Thiemo Seufer  <ths@mips.com>
 345
 346         * configure.ac: Add mips*-sde-elf* target.
 347         * configure: Regenerate.
 348
 349 2006-12-21  Hans-Peter Nilsson  <hp@axis.com>
 350
 351         * acconfig.h: Remove.
 352         * config.in, configure: Regenerate.
 353
 354 2006-11-07  Thiemo Seufer  <ths@mips.com>
 355
 356         * dsp.igen (do_w_op): Fix compiler warning.
 357
 358 2006-08-29  Thiemo Seufer  <ths@mips.com>
 359             David Ung  <davidu@mips.com>
 360
 361         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
 362         sim_igen_machine.
 363         * configure: Regenerate.
 364         * mips.igen (model): Add smartmips.
 365         (MADDU): Increment ACX if carry.
 366         (do_mult): Clear ACX.
 367         (ROR,RORV): Add smartmips.
 368         (include): Include smartmips.igen.
 369         * sim-main.h (ACX): Set to REGISTERS[89].
 370         * smartmips.igen: New file.
 371
 372 2006-08-29  Thiemo Seufer  <ths@mips.com>
 373             David Ung  <davidu@mips.com>
 374
 375         * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
 376         mips3264r2.igen. Add missing dependency rules.
 377         * m16e.igen: Support for mips16e save/restore instructions.
 378
 379 2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
 380
 381         * configure: Regenerated.
 382
 383 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 384
 385         * configure: Regenerated.
 386
 387 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 388
 389         * configure: Regenerated.
 390
 391 2006-05-15 Chao-ying Fu  <fu@mips.com>
 392
 393         * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
 394
 395 2006-04-18  Nick Clifton  <nickc@redhat.com>
 396
 397         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
 398         statement.
 399
 400 2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
 401
 402         * configure: Regenerate.
 403
 404 2005-12-14  Chao-ying Fu  <fu@mips.com>
 405
 406         * Makefile.in (SIM_OBJS): Add dsp.o.
 407         (dsp.o): New dependency.
 408         (IGEN_INCLUDE): Add dsp.igen.
 409         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
 410         mipsisa64*-*-*): Add dsp to sim_igen_machine.
 411         * configure: Regenerate.
 412         * mips.igen: Add dsp model and include dsp.igen.
 413         (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
 414         because these instructions are extended in DSP ASE.
 415         * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
 416         adding 6 DSP accumulator registers and 1 DSP control register.
 417         (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
 418         AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
 419         DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
 420         DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
 421         DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
 422         DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
 423         DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
 424         DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
 425         DSPCR_CCOND_SMASK): New define.
 426         (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
 427         * dsp.c, dsp.igen: New files for MIPS DSP ASE.
 428
 429 2005-07-08  Ian Lance Taylor  <ian@airs.com>
 430
 431         * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
 432
 433 2005-06-16  David Ung  <davidu@mips.com>
 434             Nigel Stephens  <nigel@mips.com>
 435
 436         * mips.igen: New mips16e model and include m16e.igen.
 437         (check_u64): Add mips16e tag.
 438         * m16e.igen: New file for MIPS16e instructions.
 439         * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
 440         mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
 441         models.
 442         * configure: Regenerate.
 443
 444 2005-05-26  David Ung  <davidu@mips.com>
 445
 446         * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
 447         tags to all instructions which are applicable to the new ISAs.
 448         (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
 449         vr.igen.
 450         * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
 451         instructions.
 452         * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
 453         to mips.igen.
 454         * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
 455         * configure: Regenerate.
 456
 457 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
 458
 459         * configure: Regenerate.
 460
 461 2005-01-14  Andrew Cagney  <cagney@gnu.org>
 462
 463         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
 464         explicit call to AC_CONFIG_HEADER.
 465         * configure: Regenerate.
 466
 467 2005-01-12  Andrew Cagney  <cagney@gnu.org>
 468
 469         * configure.ac: Update to use ../common/common.m4.
 470         * configure: Re-generate.
 471
 472 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
 473
 474         * configure: Regenerated to track ../common/aclocal.m4 changes.
 475
 476 2005-01-07  Andrew Cagney  <cagney@gnu.org>
 477
 478         * configure.ac: Rename configure.in, require autoconf 2.59.
 479         * configure: Re-generate.
 480
 481 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
 482
 483         * configure: Regenerate for ../common/aclocal.m4 update.
 484
 485 2004-09-24  Monika Chaddha  <monika@acmet.com>
 486
 487         Committed by Andrew Cagney.
 488         * m16.igen (CMP, CMPI): Fix assembler.
 489
 490 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
 491
 492         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
 493         * configure: Regenerate.
 494
 495 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
 496
 497         * configure.in (sim_m16_machine): Include mipsIII.
 498         * configure: Regenerate.
 499
 500 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 501
 502         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
 503         from COP0_BADVADDR.
 504         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
 505
 506 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
 507
 508         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
 509
 510 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 511
 512         * mips.igen (check_fmt): Remove.
 513         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
 514         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
 515         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
 516         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
 517         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
 518         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
 519         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 520         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
 521         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
 522         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
 523
 524 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 525
 526         * sb1.igen (check_sbx): New function.
 527         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
 528
 529 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
 530             Richard Sandiford  <rsandifo@redhat.com>
 531
 532         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
 533         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
 534         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
 535         separate implementations for mipsIV and mipsV.  Use new macros to
 536         determine whether the restrictions apply.
 537
 538 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
 539
 540         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
 541         (check_mult_hilo): Improve comments.
 542         (check_div_hilo): Likewise.  Also, fork off a new version
 543         to handle mips32/mips64 (since there are no hazards to check
 544         in MIPS32/MIPS64).
 545
 546 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
 547
 548         * mips.igen (do_dmultx): Fix check for negative operands.
 549
 550 2003-05-16  Ian Lance Taylor  <ian@airs.com>
 551
 552         * Makefile.in (SHELL): Make sure this is defined.
 553         (various): Use $(SHELL) whenever we invoke move-if-change.
 554
 555 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
 556
 557         * cp1.c: Tweak attribution slightly.
 558         * cp1.h: Likewise.
 559         * mdmx.c: Likewise.
 560         * mdmx.igen: Likewise.
 561         * mips3d.igen: Likewise.
 562         * sb1.igen: Likewise.
 563
 564 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
 565
 566         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
 567         unsigned operands.
 568
 569 2003-02-27  Andrew Cagney  <cagney@redhat.com>
 570
 571         * interp.c (sim_open): Rename _bfd to bfd.
 572         (sim_create_inferior): Ditto.
 573
 574 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 575
 576         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
 577
 578 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 579
 580         * mips.igen (EI, DI): Remove.
 581
 582 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
 583
 584         * Makefile.in (tmp-run-multi): Fix mips16 filter.
 585
 586 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
 587             Andrew Cagney  <ac131313@redhat.com>
 588             Gavin Romig-Koch  <gavin@redhat.com>
 589             Graydon Hoare  <graydon@redhat.com>
 590             Aldy Hernandez  <aldyh@redhat.com>
 591             Dave Brolley  <brolley@redhat.com>
 592             Chris Demetriou  <cgd@broadcom.com>
 593
 594         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
 595         (sim_mach_default): New variable.
 596         (mips64vr-*-*, mips64vrel-*-*): New configurations.
 597         Add a new simulator generator, MULTI.
 598         * configure: Regenerate.
 599         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
 600         (multi-run.o): New dependency.
 601         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
 602         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
 603         (tmp-multi): Combine them.
 604         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
 605         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
 606         (distclean-extra): New rule.
 607         * sim-main.h: Include bfd.h.
 608         (MIPS_MACH): New macro.
 609         * mips.igen (vr4120, vr5400, vr5500): New models.
 610         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
 611         * vr.igen: Replace with new version.
 612
 613 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
 614
 615         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
 616         * configure: Regenerate.
 617
 618 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
 619
 620         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
 621         * mips.igen: Remove all invocations of check_branch_bug and
 622         mark_branch_bug.
 623
 624 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
 625
 626         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
 627
 628 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
 629
 630         * mips.igen (do_load_double, do_store_double): New functions.
 631         (LDC1, SDC1): Rename to...
 632         (LDC1b, SDC1b): respectively.
 633         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
 634
 635 2002-07-29  Michael Snyder  <msnyder@redhat.com>
 636
 637         * cp1.c (fp_recip2): Modify initialization expression so that
 638         GCC will recognize it as constant.
 639
 640 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
 641
 642         * mdmx.c (SD_): Delete.
 643         (Unpredictable): Re-define, for now, to directly invoke
 644         unpredictable_action().
 645         (mdmx_acc_op): Fix error in .ob immediate handling.
 646
 647 2002-06-18  Andrew Cagney  <cagney@redhat.com>
 648
 649         * interp.c (sim_firmware_command): Initialize `address'.
 650
 651 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
 652
 653         * configure: Regenerated to track ../common/aclocal.m4 changes.
 654
 655 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
 656             Ed Satterthwaite  <ehs@broadcom.com>
 657
 658         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
 659         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
 660         * mips.igen: Include mips3d.igen.
 661         (mips3d): New model name for MIPS-3D ASE instructions.
 662         (CVT.W.fmt): Don't use this instruction for word (source) format
 663         instructions.
 664         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
 665         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
 666         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
 667         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
 668         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
 669         (RSquareRoot1, RSquareRoot2): New macros.
 670         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
 671         (fp_rsqrt2): New functions.
 672         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
 673         * configure: Regenerate.
 674
 675 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
 676             Ed Satterthwaite  <ehs@broadcom.com>
 677
 678         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
 679         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
 680         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
 681         (convert): Note that this function is not used for paired-single
 682         format conversions.
 683         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
 684         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
 685         (check_fmt_p): Enable paired-single support.
 686         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
 687         (PUU.PS): New instructions.
 688         (CVT.S.fmt): Don't use this instruction for paired-single format
 689         destinations.
 690         * sim-main.h (FP_formats): New value 'fmt_ps.'
 691         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
 692         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
 693
 694 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 695
 696         * mips.igen: Fix formatting of function calls in
 697         many FP operations.
 698
 699 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 700
 701         * mips.igen (MOVN, MOVZ): Trace result.
 702         (TNEI): Print "tnei" as the opcode name in traces.
 703         (CEIL.W): Add disassembly string for traces.
 704         (RSQRT.fmt): Make location of disassembly string consistent
 705         with other instructions.
 706
 707 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 708
 709         * mips.igen (X): Delete unused function.
 710
 711 2002-06-08  Andrew Cagney  <cagney@redhat.com>
 712
 713         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
 714
 715 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 716             Ed Satterthwaite  <ehs@broadcom.com>
 717
 718         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
 719         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
 720         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
 721         (fp_nmsub): New prototypes.
 722         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
 723         (NegMultiplySub): New defines.
 724         * mips.igen (RSQRT.fmt): Use RSquareRoot().
 725         (MADD.D, MADD.S): Replace with...
 726         (MADD.fmt): New instruction.
 727         (MSUB.D, MSUB.S): Replace with...
 728         (MSUB.fmt): New instruction.
 729         (NMADD.D, NMADD.S): Replace with...
 730         (NMADD.fmt): New instruction.
 731         (NMSUB.D, MSUB.S): Replace with...
 732         (NMSUB.fmt): New instruction.
 733
 734 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 735             Ed Satterthwaite  <ehs@broadcom.com>
 736
 737         * cp1.c: Fix more comment spelling and formatting.
 738         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
 739         (denorm_mode): New function.
 740         (fpu_unary, fpu_binary): Round results after operation, collect
 741         status from rounding operations, and update the FCSR.
 742         (convert): Collect status from integer conversions and rounding
 743         operations, and update the FCSR.  Adjust NaN values that result
 744         from conversions.  Convert to use sim_io_eprintf rather than
 745         fprintf, and remove some debugging code.
 746         * cp1.h (fenr_FS): New define.
 747
 748 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 749
 750         * cp1.c (convert): Remove unusable debugging code, and move MIPS
 751         rounding mode to sim FP rounding mode flag conversion code into...
 752         (rounding_mode): New function.
 753
 754 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 755
 756         * cp1.c: Clean up formatting of a few comments.
 757         (value_fpr): Reformat switch statement.
 758
 759 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
 760             Ed Satterthwaite  <ehs@broadcom.com>
 761
 762         * cp1.h: New file.
 763         * sim-main.h: Include cp1.h.
 764         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
 765         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
 766         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
 767         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
 768         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
 769         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
 770         * cp1.c: Don't include sim-fpu.h; already included by
 771         sim-main.h.  Clean up formatting of some comments.
 772         (NaN, Equal, Less): Remove.
 773         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
 774         (fp_cmp): New functions.
 775         * mips.igen (do_c_cond_fmt): Remove.
 776         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
 777         Compare.  Add result tracing.
 778         (CxC1): Remove, replace with...
 779         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
 780         (DMxC1): Remove, replace with...
 781         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
 782         (MxC1): Remove, replace with...
 783         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
 784
 785 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 786
 787         * sim-main.h (FGRIDX): Remove, replace all uses with...
 788         (FGR_BASE): New macro.
 789         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
 790         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
 791         (NR_FGR, FGR): Likewise.
 792         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
 793         * mips.igen: Likewise.
 794
 795 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 796
 797         * cp1.c: Add an FSF Copyright notice to this file.
 798
 799 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 800             Ed Satterthwaite  <ehs@broadcom.com>
 801
 802         * cp1.c (Infinity): Remove.
 803         * sim-main.h (Infinity): Likewise.
 804
 805         * cp1.c (fp_unary, fp_binary): New functions.
 806         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
 807         (fp_sqrt): New functions, implemented in terms of the above.
 808         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
 809         (Recip, SquareRoot): Remove (replaced by functions above).
 810         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
 811         (fp_recip, fp_sqrt): New prototypes.
 812         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
 813         (Recip, SquareRoot): Replace prototypes with #defines which
 814         invoke the functions above.
 815
 816 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 817
 818         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
 819         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
 820         file, remove PARAMS from prototypes.
 821         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
 822         simulator state arguments.
 823         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
 824         pass simulator state arguments.
 825         * cp1.c (SD): Redefine as CPU_STATE(cpu).
 826         (store_fpr, convert): Remove 'sd' argument.
 827         (value_fpr): Likewise.  Convert to use 'SD' instead.
 828
 829 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 830
 831         * cp1.c (Min, Max): Remove #if 0'd functions.
 832         * sim-main.h (Min, Max): Remove.
 833
 834 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 835
 836         * cp1.c: fix formatting of switch case and default labels.
 837         * interp.c: Likewise.
 838         * sim-main.c: Likewise.
 839
 840 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 841
 842         * cp1.c: Clean up comments which describe FP formats.
 843          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
 844
 845 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 846             Ed Satterthwaite  <ehs@broadcom.com>
 847
 848         * configure.in (mipsisa64sb1*-*-*): New target for supporting
 849         Broadcom SiByte SB-1 processor configurations.
 850         * configure: Regenerate.
 851         * sb1.igen: New file.
 852         * mips.igen: Include sb1.igen.
 853         (sb1): New model.
 854         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
 855         * mdmx.igen: Add "sb1" model to all appropriate functions and
 856         instructions.
 857         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
 858         (ob_func, ob_acc): Reference the above.
 859         (qh_acc): Adjust to keep the same size as ob_acc.
 860         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
 861         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
 862
 863 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 864
 865         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
 866
 867 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
 868             Ed Satterthwaite  <ehs@broadcom.com>
 869
 870         * mips.igen (mdmx): New (pseudo-)model.
 871         * mdmx.c, mdmx.igen: New files.
 872         * Makefile.in (SIM_OBJS): Add mdmx.o.
 873         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
 874         New typedefs.
 875         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
 876         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
 877         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
 878         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
 879         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
 880         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
 881         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
 882         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
 883         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
 884         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
 885         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
 886         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
 887         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
 888         (qh_fmtsel): New macros.
 889         (_sim_cpu): New member "acc".
 890         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
 891         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
 892
 893 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
 894
 895         * interp.c: Use 'deprecated' rather than 'depreciated.'
 896         * sim-main.h: Likewise.
 897
 898 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
 899
 900         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
 901         which wouldn't compile anyway.
 902         * sim-main.h (unpredictable_action): New function prototype.
 903         (Unpredictable): Define to call igen function unpredictable().
 904         (NotWordValue): New macro to call igen function not_word_value().
 905         (UndefinedResult): Remove.
 906         * interp.c (undefined_result): Remove.
 907         (unpredictable_action): New function.
 908         * mips.igen (not_word_value, unpredictable): New functions.
 909         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
 910         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
 911         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
 912         NotWordValue() to check for unpredictable inputs, then
 913         Unpredictable() to handle them.
 914
 915 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
 916
 917         * mips.igen: Fix formatting of calls to Unpredictable().
 918
 919 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
 920
 921         * interp.c (sim_open): Revert previous change.
 922
 923 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
 924
 925         * interp.c (sim_open): Disable chunk of code that wrote code in
 926         vector table entries.
 927
 928 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
 929
 930         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
 931         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
 932         unused definitions.
 933
 934 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
 935
 936         * cp1.c: Fix many formatting issues.
 937
 938 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
 939
 940         * cp1.c (fpu_format_name): New function to replace...
 941         (DOFMT): This.  Delete, and update all callers.
 942         (fpu_rounding_mode_name): New function to replace...
 943         (RMMODE): This.  Delete, and update all callers.
 944
 945 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
 946
 947         * interp.c: Move FPU support routines from here to...
 948         * cp1.c: Here.  New file.
 949         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
 950         (cp1.o): New target.
 951
 952 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
 953
 954         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
 955         * mips.igen (mips32, mips64): New models, add to all instructions
 956         and functions as appropriate.
 957         (loadstore_ea, check_u64): New variant for model mips64.
 958         (check_fmt_p): New variant for models mipsV and mips64, remove
 959         mipsV model marking fro other variant.
 960         (SLL) Rename to...
 961         (SLLa) this.
 962         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
 963         for mips32 and mips64.
 964         (DCLO, DCLZ): New instructions for mips64.
 965
 966 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
 967
 968         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
 969         immediate or code as a hex value with the "%#lx" format.
 970         (ANDI): Likewise, and fix printed instruction name.
 971
 972 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 973
 974         * sim-main.h (UndefinedResult, Unpredictable): New macros
 975         which currently do nothing.
 976
 977 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 978
 979         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
 980         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
 981         (status_CU3): New definitions.
 982
 983         * sim-main.h (ExceptionCause): Add new values for MIPS32
 984         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
 985         for DebugBreakPoint and NMIReset to note their status in
 986         MIPS32 and MIPS64.
 987         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
 988         (SignalExceptionCacheErr): New exception macros.
 989
 990 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 991
 992         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
 993         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
 994         is always enabled.
 995         (SignalExceptionCoProcessorUnusable): Take as argument the
 996         unusable coprocessor number.
 997
 998 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 999
1000         * mips.igen: Fix formatting of all SignalException calls.
1001
1002 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1003
1004         * sim-main.h (SIGNEXTEND): Remove.
1005
1006 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1007
1008         * mips.igen: Remove gencode comment from top of file, fix
1009         spelling in another comment.
1010
1011 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1012
1013         * mips.igen (check_fmt, check_fmt_p): New functions to check
1014         whether specific floating point formats are usable.
1015         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1016         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1017         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1018         Use the new functions.
1019         (do_c_cond_fmt): Remove format checks...
1020         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1021
1022 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1023
1024         * mips.igen: Fix formatting of check_fpu calls.
1025
1026 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1027
1028         * mips.igen (FLOOR.L.fmt): Store correct destination register.
1029
1030 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1031
1032         * mips.igen: Remove whitespace at end of lines.
1033
1034 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1035
1036         * mips.igen (loadstore_ea): New function to do effective
1037         address calculations.
1038         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1039         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1040         CACHE): Use loadstore_ea to do effective address computations.
1041
1042 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1043
1044         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1045         * mips.igen (LL, CxC1, MxC1): Likewise.
1046
1047 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1048
1049         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1050         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1051         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1052         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1053         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1054         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1055         Don't split opcode fields by hand, use the opcode field values
1056         provided by igen.
1057
1058 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1059
1060         * mips.igen (do_divu): Fix spacing.
1061
1062         * mips.igen (do_dsllv): Move to be right before DSLLV,
1063         to match the rest of the do_<shift> functions.
1064
1065 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1066
1067         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1068         DSRL32, do_dsrlv): Trace inputs and results.
1069
1070 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1071
1072         * mips.igen (CACHE): Provide instruction-printing string.
1073
1074         * interp.c (signal_exception): Comment tokens after #endif.
1075
1076 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1077
1078         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1079         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1080         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1081         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1082         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1083         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1084         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1085         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1086
1087 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1088
1089         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1090         instruction-printing string.
1091         (LWU): Use '64' as the filter flag.
1092
1093 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1094
1095         * mips.igen (SDXC1): Fix instruction-printing string.
1096
1097 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1098
1099         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1100         filter flags "32,f".
1101
1102 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1103
1104         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1105         as the filter flag.
1106
1107 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1108
1109         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1110         add a comma) so that it more closely match the MIPS ISA
1111         documentation opcode partitioning.
1112         (PREF): Put useful names on opcode fields, and include
1113         instruction-printing string.
1114
1115 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1116
1117         * mips.igen (check_u64): New function which in the future will
1118         check whether 64-bit instructions are usable and signal an
1119         exception if not.  Currently a no-op.
1120         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1121         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1122         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1123         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1124
1125         * mips.igen (check_fpu): New function which in the future will
1126         check whether FPU instructions are usable and signal an exception
1127         if not.  Currently a no-op.
1128         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1129         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1130         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1131         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1132         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1133         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1134         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1135         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1136
1137 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1138
1139         * mips.igen (do_load_left, do_load_right): Move to be immediately
1140         following do_load.
1141         (do_store_left, do_store_right): Move to be immediately following
1142         do_store.
1143
1144 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1145
1146         * mips.igen (mipsV): New model name.  Also, add it to
1147         all instructions and functions where it is appropriate.
1148
1149 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
1150
1151         * mips.igen: For all functions and instructions, list model
1152         names that support that instruction one per line.
1153
1154 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1155
1156         * mips.igen: Add some additional comments about supported
1157         models, and about which instructions go where.
1158         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1159         order as is used in the rest of the file.
1160
1161 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1162
1163         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1164         indicating that ALU32_END or ALU64_END are there to check
1165         for overflow.
1166         (DADD): Likewise, but also remove previous comment about
1167         overflow checking.
1168
1169 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1170
1171         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1172         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1173         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1174         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1175         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1176         fields (i.e., add and move commas) so that they more closely
1177         match the MIPS ISA documentation opcode partitioning.
1178
1179 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1180
1181         * mips.igen (ADDI): Print immediate value.
1182         (BREAK): Print code.
1183         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1184         (SLL): Print "nop" specially, and don't run the code
1185         that does the shift for the "nop" case.
1186
1187 2001-11-17  Fred Fish  <fnf@redhat.com>
1188
1189         * sim-main.h (float_operation): Move enum declaration outside
1190         of _sim_cpu struct declaration.
1191
1192 2001-04-12  Jim Blandy  <jimb@redhat.com>
1193
1194         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1195         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
1196         set of the FCSR.
1197         * sim-main.h (COCIDX): Remove definition; this isn't supported by
1198         PENDING_FILL, and you can get the intended effect gracefully by
1199         calling PENDING_SCHED directly.
1200
1201 2001-02-23  Ben Elliston  <bje@redhat.com>
1202
1203         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1204         already defined elsewhere.
1205
1206 2001-02-19  Ben Elliston  <bje@redhat.com>
1207
1208         * sim-main.h (sim_monitor): Return an int.
1209         * interp.c (sim_monitor): Add return values.
1210         (signal_exception): Handle error conditions from sim_monitor.
1211
1212 2001-02-08  Ben Elliston  <bje@redhat.com>
1213
1214         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1215         (store_memory): Likewise, pass cia to sim_core_write*.
1216
1217 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
1218
1219         On advice from Chris G. Demetriou <cgd@sibyte.com>:
1220         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1221
1222 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1223
1224         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1225         * Makefile.in: Don't delete *.igen when cleaning directory.
1226
1227 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1228
1229         * m16.igen (break): Call SignalException not sim_engine_halt.
1230
1231 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1232
1233         From Jason Eckhardt:
1234         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1235
1236 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1237
1238         * mips.igen (MxC1, DMxC1): Fix printf formatting.
1239
1240 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
1241
1242         * mips.igen (do_dmultx): Fix typo.
1243
1244 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1245
1246         * configure: Regenerated to track ../common/aclocal.m4 changes.
1247
1248 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1249
1250         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1251
1252 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
1253
1254         * sim-main.h (GPR_CLEAR): Define macro.
1255
1256 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1257
1258         * interp.c (decode_coproc): Output long using %lx and not %s.
1259
1260 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
1261
1262         * interp.c (sim_open): Sort & extend dummy memory regions for
1263         --board=jmr3904 for eCos.
1264
1265 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
1266
1267         * configure: Regenerated.
1268
1269 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
1270
1271         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1272         calls, conditional on the simulator being in verbose mode.
1273
1274 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
1275
1276         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1277         cache don't get ReservedInstruction traps.
1278
1279 1999-11-29  Mark Salter  <msalter@cygnus.com>
1280
1281         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1282         to clear status bits in sdisr register. This is how the hardware works.
1283
1284         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1285         being used by cygmon.
1286
1287 1999-11-11  Andrew Haley  <aph@cygnus.com>
1288
1289         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1290         instructions.
1291
1292 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
1293
1294         * mips.igen (MULT): Correct previous mis-applied patch.
1295
1296 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
1297
1298         * mips.igen (delayslot32): Handle sequence like
1299         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1300         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1301         (MULT): Actually pass the third register...
1302
1303 1999-09-03  Mark Salter  <msalter@cygnus.com>
1304
1305         * interp.c (sim_open): Added more memory aliases for additional
1306         hardware being touched by cygmon on jmr3904 board.
1307
1308 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1309
1310         * configure: Regenerated to track ../common/aclocal.m4 changes.
1311
1312 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1313
1314         * interp.c (sim_store_register): Handle case where client - GDB -
1315         specifies that a 4 byte register is 8 bytes in size.
1316         (sim_fetch_register): Ditto.
1317
1318 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
1319
1320         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1321         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1322         (idt_monitor_base): Base address for IDT monitor traps.
1323         (pmon_monitor_base): Ditto for PMON.
1324         (lsipmon_monitor_base): Ditto for LSI PMON.
1325         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1326         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1327         (sim_firmware_command): New function.
1328         (mips_option_handler): Call it for OPTION_FIRMWARE.
1329         (sim_open): Allocate memory for idt_monitor region.  If "--board"
1330         option was given, add no monitor by default.  Add BREAK hooks only if
1331         monitors are also there.
1332
1333 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1334
1335         * interp.c (sim_monitor): Flush output before reading input.
1336
1337 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1338
1339         * tconfig.in (SIM_HANDLES_LMA): Always define.
1340
1341 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1342
1343         From Mark Salter <msalter@cygnus.com>:
1344         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
1345         (sim_open): Add setup for BSP board.
1346
1347 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1348
1349         * mips.igen (MULT, MULTU): Add syntax for two operand version.
1350         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
1351         them as unimplemented.
1352
1353 1999-05-08  Felix Lee  <flee@cygnus.com>
1354
1355         * configure: Regenerated to track ../common/aclocal.m4 changes.
1356
1357 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
1358
1359         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1360
1361 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1362
1363         * configure.in: Any mips64vr5*-*-* target should have
1364         -DTARGET_ENABLE_FR=1.
1365         (default_endian): Any mips64vr*el-*-* target should default to
1366         LITTLE_ENDIAN.
1367         * configure: Re-generate.
1368
1369 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
1370
1371         * mips.igen (ldl): Extend from _16_, not 32.
1372
1373 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
1374
1375         * interp.c (sim_store_register): Force registers written to by GDB
1376         into an un-interpreted state.
1377
1378 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
1379
1380         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1381         CPU, start periodic background I/O polls.
1382         (tx3904sio_poll): New function: periodic I/O poller.
1383
1384 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
1385
1386         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1387
1388 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
1389
1390         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1391         case statement.
1392
1393 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
1394
1395         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1396         (load_word): Call SIM_CORE_SIGNAL hook on error.
1397         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1398         starting.  For exception dispatching, pass PC instead of NULL_CIA.
1399         (decode_coproc): Use COP0_BADVADDR to store faulting address.
1400         * sim-main.h (COP0_BADVADDR): Define.
1401         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1402         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1403         (_sim_cpu): Add exc_* fields to store register value snapshots.
1404         * mips.igen (*): Replace memory-related SignalException* calls
1405         with references to SIM_CORE_SIGNAL hook.
1406
1407         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1408         fix.
1409         * sim-main.c (*): Minor warning cleanups.
1410
1411 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
1412
1413         * m16.igen (DADDIU5): Correct type-o.
1414
1415 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
1416
1417         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1418         variables.
1419
1420 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
1421
1422         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1423         to include path.
1424         (interp.o): Add dependency on itable.h
1425         (oengine.c, gencode): Delete remaining references.
1426         (BUILT_SRC_FROM_GEN): Clean up.
1427
1428 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
1429
1430         * vr4run.c: New.
1431         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1432         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1433         tmp-run-hack) : New.
1434         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1435         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1436         Drop the "64" qualifier to get the HACK generator working.
1437         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
1438         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1439         qualifier to get the hack generator working.
1440         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1441         (DSLL): Use do_dsll.
1442         (DSLLV): Use do_dsllv.
1443         (DSRA): Use do_dsra.
1444         (DSRL): Use do_dsrl.
1445         (DSRLV): Use do_dsrlv.
1446         (BC1): Move *vr4100 to get the HACK generator working.
1447         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1448         get the HACK generator working.
1449         (MACC) Rename to get the HACK generator working.
1450         (DMACC,MACCS,DMACCS): Add the 64.
1451
1452 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
1453
1454         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1455         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1456
1457 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
1458
1459     * mips/interp.c (DEBUG): Cleanups.
1460
1461 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
1462
1463         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1464         (tx3904sio_tickle): fflush after a stdout character output.
1465
1466 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
1467
1468         * interp.c (sim_close): Uninstall modules.
1469
1470 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1471
1472         * sim-main.h, interp.c (sim_monitor): Change to global
1473         function.
1474
1475 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1476
1477         * configure.in (vr4100): Only include vr4100 instructions in
1478         simulator.
1479         * configure: Re-generate.
1480         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1481
1482 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1483
1484         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1485         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1486         true alternative.
1487
1488         * configure.in (sim_default_gen, sim_use_gen): Replace with
1489         sim_gen.
1490         (--enable-sim-igen): Delete config option. Always using IGEN.
1491         * configure: Re-generate.
1492
1493         * Makefile.in (gencode): Kill, kill, kill.
1494         * gencode.c: Ditto.
1495
1496 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1497
1498         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1499         bit mips16 igen simulator.
1500         * configure: Re-generate.
1501
1502         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1503         as part of vr4100 ISA.
1504         * vr.igen: Mark all instructions as 64 bit only.
1505
1506 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1507
1508         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1509         Pacify GCC.
1510
1511 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1512
1513         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1514         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
1515         * configure: Re-generate.
1516
1517         * m16.igen (BREAK): Define breakpoint instruction.
1518         (JALX32): Mark instruction as mips16 and not r3900.
1519         * mips.igen (C.cond.fmt): Fix typo in instruction format.
1520
1521         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1522
1523 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1524
1525         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1526         insn as a debug breakpoint.
1527
1528         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1529         pending.slot_size.
1530         (PENDING_SCHED): Clean up trace statement.
1531         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1532         (PENDING_FILL): Delay write by only one cycle.
1533         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1534
1535         * sim-main.c (pending_tick): Clean up trace statements. Add trace
1536         of pending writes.
1537         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1538         32 & 64.
1539         (pending_tick): Move incrementing of index to FOR statement.
1540         (pending_tick): Only update PENDING_OUT after a write has occured.
1541
1542         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
1543         build simulator.
1544         * configure: Re-generate.
1545
1546         * interp.c (sim_engine_run OLD): Delete explicit call to
1547         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1548
1549 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
1550
1551         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1552         interrupt level number to match changed SignalExceptionInterrupt
1553         macro.
1554
1555 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
1556
1557         * interp.c: #include "itable.h" if WITH_IGEN.
1558         (get_insn_name): New function.
1559         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1560         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1561
1562 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
1563
1564         * configure: Rebuilt to inhale new common/aclocal.m4.
1565
1566 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
1567
1568         * dv-tx3904sio.c: Include sim-assert.h.
1569
1570 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
1571
1572         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1573         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1574         Reorganize target-specific sim-hardware checks.
1575         * configure: rebuilt.
1576         * interp.c (sim_open): For tx39 target boards, set
1577         OPERATING_ENVIRONMENT, add tx3904sio devices.
1578         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1579         ROM executables.  Install dv-sockser into sim-modules list.
1580
1581         * dv-tx3904irc.c: Compiler warning clean-up.
1582         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
1583         frequent hw-trace messages.
1584
1585 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1586
1587         * vr.igen (MulAcc): Identify as a vr4100 specific function.
1588
1589 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1590
1591         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1592
1593         * vr.igen: New file.
1594         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1595         * mips.igen: Define vr4100 model. Include vr.igen.
1596 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
1597
1598         * mips.igen (check_mf_hilo): Correct check.
1599
1600 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1601
1602         * sim-main.h (interrupt_event): Add prototype.
1603
1604         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1605         register_ptr, register_value.
1606         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1607
1608         * sim-main.h (tracefh): Make extern.
1609
1610 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
1611
1612         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1613         Reduce unnecessarily high timer event frequency.
1614         * dv-tx3904cpu.c: Ditto for interrupt event.
1615
1616 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
1617
1618         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1619         to allay warnings.
1620         (interrupt_event): Made non-static.
1621
1622         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1623         interchange of configuration values for external vs. internal
1624         clock dividers.
1625
1626 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
1627
1628         * mips.igen (BREAK): Moved code to here for
1629         simulator-reserved break instructions.
1630         * gencode.c (build_instruction): Ditto.
1631         * interp.c (signal_exception): Code moved from here.  Non-
1632         reserved instructions now use exception vector, rather
1633         than halting sim.
1634         * sim-main.h: Moved magic constants to here.
1635
1636 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
1637
1638         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1639         register upon non-zero interrupt event level, clear upon zero
1640         event value.
1641         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1642         by passing zero event value.
1643         (*_io_{read,write}_buffer): Endianness fixes.
1644         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1645         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1646
1647         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1648         serial I/O and timer module at base address 0xFFFF0000.
1649
1650 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
1651
1652         * mips.igen (SWC1) : Correct the handling of ReverseEndian
1653         and BigEndianCPU.
1654
1655 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
1656
1657         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1658         parts.
1659         * configure: Update.
1660
1661 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
1662
1663         * dv-tx3904tmr.c: New file - implements tx3904 timer.
1664         * dv-tx3904{irc,cpu}.c: Mild reformatting.
1665         * configure.in: Include tx3904tmr in hw_device list.
1666         * configure: Rebuilt.
1667         * interp.c (sim_open): Instantiate three timer instances.
1668         Fix address typo of tx3904irc instance.
1669
1670 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
1671
1672         * interp.c (signal_exception): SystemCall exception now uses
1673         the exception vector.
1674
1675 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
1676
1677         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1678         to allay warnings.
1679
1680 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1681
1682         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1683
1684 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1685
1686         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1687
1688         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1689         sim-main.h. Declare a struct hw_descriptor instead of struct
1690         hw_device_descriptor.
1691
1692 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1693
1694         * mips.igen (do_store_left, do_load_left): Compute nr of left and
1695         right bits and then re-align left hand bytes to correct byte
1696         lanes.  Fix incorrect computation in do_store_left when loading
1697         bytes from second word.
1698
1699 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1700
1701         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1702         * interp.c (sim_open): Only create a device tree when HW is
1703         enabled.
1704
1705         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1706         * interp.c (signal_exception): Ditto.
1707
1708 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
1709
1710         * gencode.c: Mark BEGEZALL as LIKELY.
1711
1712 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1713
1714         * sim-main.h (ALU32_END): Sign extend 32 bit results.
1715         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1716
1717 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
1718
1719         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1720         modules.  Recognize TX39 target with "mips*tx39" pattern.
1721         * configure: Rebuilt.
1722         * sim-main.h (*): Added many macros defining bits in
1723         TX39 control registers.
1724         (SignalInterrupt): Send actual PC instead of NULL.
1725         (SignalNMIReset): New exception type.
1726         * interp.c (board): New variable for future use to identify
1727         a particular board being simulated.
1728         (mips_option_handler,mips_options): Added "--board" option.
1729         (interrupt_event): Send actual PC.
1730         (sim_open): Make memory layout conditional on board setting.
1731         (signal_exception): Initial implementation of hardware interrupt
1732         handling.  Accept another break instruction variant for simulator
1733         exit.
1734         (decode_coproc): Implement RFE instruction for TX39.
1735         (mips.igen): Decode RFE instruction as such.
1736         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1737         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1738         bbegin to implement memory map.
1739         * dv-tx3904cpu.c: New file.
1740         * dv-tx3904irc.c: New file.
1741
1742 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
1743
1744         * mips.igen (check_mt_hilo): Create a separate r3900 version.
1745
1746 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
1747
1748         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
1749         with calls to check_div_hilo.
1750
1751 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
1752
1753         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1754         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1755         Add special r3900 version of do_mult_hilo.
1756         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1757         with calls to check_mult_hilo.
1758         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1759         with calls to check_div_hilo.
1760
1761 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1762
1763         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1764         Document a replacement.
1765
1766 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
1767
1768         * interp.c (sim_monitor): Make mon_printf work.
1769
1770 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
1771
1772         * sim-main.h (INSN_NAME): New arg `cpu'.
1773
1774 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
1775
1776         * configure: Regenerated to track ../common/aclocal.m4 changes.
1777
1778 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
1779
1780         * configure: Regenerated to track ../common/aclocal.m4 changes.
1781         * config.in: Ditto.
1782
1783 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
1784
1785         * acconfig.h: New file.
1786         * configure.in: Reverted change of Apr 24; use sinclude again.
1787
1788 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
1789
1790         * configure: Regenerated to track ../common/aclocal.m4 changes.
1791         * config.in: Ditto.
1792
1793 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
1794
1795         * configure.in: Don't call sinclude.
1796
1797 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
1798
1799         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1800
1801 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1802
1803         * mips.igen (ERET): Implement.
1804
1805         * interp.c (decode_coproc): Return sign-extended EPC.
1806
1807         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1808
1809         * interp.c (signal_exception): Do not ignore Trap.
1810         (signal_exception): On TRAP, restart at exception address.
1811         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1812         (signal_exception): Update.
1813         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1814         so that TRAP instructions are caught.
1815
1816 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1817
1818         * sim-main.h (struct hilo_access, struct hilo_history): Define,
1819         contains HI/LO access history.
1820         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1821         (HIACCESS, LOACCESS): Delete, replace with
1822         (HIHISTORY, LOHISTORY): New macros.
1823         (CHECKHILO): Delete all, moved to mips.igen
1824
1825         * gencode.c (build_instruction): Do not generate checks for
1826         correct HI/LO register usage.
1827
1828         * interp.c (old_engine_run): Delete checks for correct HI/LO
1829         register usage.
1830
1831         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1832         check_mf_cycles): New functions.
1833         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1834         do_divu, domultx, do_mult, do_multu): Use.
1835
1836         * tx.igen ("madd", "maddu"): Use.
1837
1838 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1839
1840         * mips.igen (DSRAV): Use function do_dsrav.
1841         (SRAV): Use new function do_srav.
1842
1843         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1844         (B): Sign extend 11 bit immediate.
1845         (EXT-B*): Shift 16 bit immediate left by 1.
1846         (ADDIU*): Don't sign extend immediate value.
1847
1848 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1849
1850         * m16run.c (sim_engine_run): Restore CIA after handling an event.
1851
1852         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1853         functions.
1854
1855         * mips.igen (delayslot32, nullify_next_insn): New functions.
1856         (m16.igen): Always include.
1857         (do_*): Add more tracing.
1858
1859         * m16.igen (delayslot16): Add NIA argument, could be called by a
1860         32 bit MIPS16 instruction.
1861
1862         * interp.c (ifetch16): Move function from here.
1863         * sim-main.c (ifetch16): To here.
1864
1865         * sim-main.c (ifetch16, ifetch32): Update to match current
1866         implementations of LH, LW.
1867         (signal_exception): Don't print out incorrect hex value of illegal
1868         instruction.
1869
1870 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1871
1872         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1873         instruction.
1874
1875         * m16.igen: Implement MIPS16 instructions.
1876
1877         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1878         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1879         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1880         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1881         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
1882         bodies of corresponding code from 32 bit insn to these.  Also used
1883         by MIPS16 versions of functions.
1884
1885         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1886         (IMEM16): Drop NR argument from macro.
1887
1888 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1889
1890         * Makefile.in (SIM_OBJS): Add sim-main.o.
1891
1892         * sim-main.h (address_translation, load_memory, store_memory,
1893         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1894         as INLINE_SIM_MAIN.
1895         (pr_addr, pr_uword64): Declare.
1896         (sim-main.c): Include when H_REVEALS_MODULE_P.
1897
1898         * interp.c (address_translation, load_memory, store_memory,
1899         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1900         from here.
1901         * sim-main.c: To here. Fix compilation problems.
1902
1903         * configure.in: Enable inlining.
1904         * configure: Re-config.
1905
1906 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1907
1908         * configure: Regenerated to track ../common/aclocal.m4 changes.
1909
1910 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1911
1912         * mips.igen: Include tx.igen.
1913         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1914         * tx.igen: New file, contains MADD and MADDU.
1915
1916         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1917         the hardwired constant `7'.
1918         (store_memory): Ditto.
1919         (LOADDRMASK): Move definition to sim-main.h.
1920
1921         mips.igen (MTC0): Enable for r3900.
1922         (ADDU): Add trace.
1923
1924         mips.igen (do_load_byte): Delete.
1925         (do_load, do_store, do_load_left, do_load_write, do_store_left,
1926         do_store_right): New functions.
1927         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1928
1929         configure.in: Let the tx39 use igen again.
1930         configure: Update.
1931
1932 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1933
1934         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1935         not an address sized quantity.  Return zero for cache sizes.
1936
1937 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1938
1939         * mips.igen (r3900): r3900 does not support 64 bit integer
1940         operations.
1941
1942 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
1943
1944         * configure.in (mipstx39*-*-*): Use gencode simulator rather
1945         than igen one.
1946         * configure : Rebuild.
1947
1948 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1949
1950         * configure: Regenerated to track ../common/aclocal.m4 changes.
1951
1952 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1953
1954         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1955
1956 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
1957
1958         * configure: Regenerated to track ../common/aclocal.m4 changes.
1959         * config.in: Regenerated to track ../common/aclocal.m4 changes.
1960
1961 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1962
1963         * configure: Regenerated to track ../common/aclocal.m4 changes.
1964
1965 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1966
1967         * interp.c (Max, Min): Comment out functions. Not yet used.
1968
1969 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1970
1971         * configure: Regenerated to track ../common/aclocal.m4 changes.
1972
1973 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
1974
1975         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
1976         configurable settings for stand-alone simulator.
1977
1978         * configure.in: Added X11 search, just in case.
1979
1980         * configure: Regenerated.
1981
1982 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1983
1984         * interp.c (sim_write, sim_read, load_memory, store_memory):
1985         Replace sim_core_*_map with read_map, write_map, exec_map resp.
1986
1987 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1988
1989         * sim-main.h (GETFCC): Return an unsigned value.
1990
1991 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1992
1993         * mips.igen (DIV): Fix check for -1 / MIN_INT.
1994         (DADD): Result destination is RD not RT.
1995
1996 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1997
1998         * sim-main.h (HIACCESS, LOACCESS): Always define.
1999
2000         * mdmx.igen (Maxi, Mini): Rename Max, Min.
2001
2002         * interp.c (sim_info): Delete.
2003
2004 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
2005
2006         * interp.c (DECLARE_OPTION_HANDLER): Use it.
2007         (mips_option_handler): New argument `cpu'.
2008         (sim_open): Update call to sim_add_option_table.
2009
2010 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2011
2012         * mips.igen (CxC1): Add tracing.
2013
2014 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2015
2016         * sim-main.h (Max, Min): Declare.
2017
2018         * interp.c (Max, Min): New functions.
2019
2020         * mips.igen (BC1): Add tracing.
2021
2022 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
2023
2024         * interp.c Added memory map for stack in vr4100
2025
2026 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
2027
2028         * interp.c (load_memory): Add missing "break"'s.
2029
2030 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2031
2032         * interp.c (sim_store_register, sim_fetch_register): Pass in
2033         length parameter.  Return -1.
2034
2035 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
2036
2037         * interp.c: Added hardware init hook, fixed warnings.
2038
2039 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2040
2041         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2042
2043 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2044
2045         * interp.c (ifetch16): New function.
2046
2047         * sim-main.h (IMEM32): Rename IMEM.
2048         (IMEM16_IMMED): Define.
2049         (IMEM16): Define.
2050         (DELAY_SLOT): Update.
2051
2052         * m16run.c (sim_engine_run): New file.
2053
2054         * m16.igen: All instructions except LB.
2055         (LB): Call do_load_byte.
2056         * mips.igen (do_load_byte): New function.
2057         (LB): Call do_load_byte.
2058
2059         * mips.igen: Move spec for insn bit size and high bit from here.
2060         * Makefile.in (tmp-igen, tmp-m16): To here.
2061
2062         * m16.dc: New file, decode mips16 instructions.
2063
2064         * Makefile.in (SIM_NO_ALL): Define.
2065         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2066
2067 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2068
2069         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2070         point unit to 32 bit registers.
2071         * configure: Re-generate.
2072
2073 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2074
2075         * configure.in (sim_use_gen): Make IGEN the default simulator
2076         generator for generic 32 and 64 bit mips targets.
2077         * configure: Re-generate.
2078
2079 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2080
2081         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2082         bitsize.
2083
2084         * interp.c (sim_fetch_register, sim_store_register): Read/write
2085         FGR from correct location.
2086         (sim_open): Set size of FGR's according to
2087         WITH_TARGET_FLOATING_POINT_BITSIZE.
2088
2089         * sim-main.h (FGR): Store floating point registers in a separate
2090         array.
2091
2092 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2093
2094         * configure: Regenerated to track ../common/aclocal.m4 changes.
2095
2096 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2097
2098         * interp.c (ColdReset): Call PENDING_INVALIDATE.
2099
2100         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2101
2102         * interp.c (pending_tick): New function.  Deliver pending writes.
2103
2104         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2105         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2106         it can handle mixed sized quantites and single bits.
2107
2108 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2109
2110         * interp.c (oengine.h): Do not include when building with IGEN.
2111         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2112         (sim_info): Ditto for PROCESSOR_64BIT.
2113         (sim_monitor): Replace ut_reg with unsigned_word.
2114         (*): Ditto for t_reg.
2115         (LOADDRMASK): Define.
2116         (sim_open): Remove defunct check that host FP is IEEE compliant,
2117         using software to emulate floating point.
2118         (value_fpr, ...): Always compile, was conditional on HASFPU.
2119
2120 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2121
2122         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2123         size.
2124
2125         * interp.c (SD, CPU): Define.
2126         (mips_option_handler): Set flags in each CPU.
2127         (interrupt_event): Assume CPU 0 is the one being iterrupted.
2128         (sim_close): Do not clear STATE, deleted anyway.
2129         (sim_write, sim_read): Assume CPU zero's vm should be used for
2130         data transfers.
2131         (sim_create_inferior): Set the PC for all processors.
2132         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2133         argument.
2134         (mips16_entry): Pass correct nr of args to store_word, load_word.
2135         (ColdReset): Cold reset all cpu's.
2136         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2137         (sim_monitor, load_memory, store_memory, signal_exception): Use
2138         `CPU' instead of STATE_CPU.
2139
2140
2141         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2142         SD or CPU_.
2143
2144         * sim-main.h (signal_exception): Add sim_cpu arg.
2145         (SignalException*): Pass both SD and CPU to signal_exception.
2146         * interp.c (signal_exception): Update.
2147
2148         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2149         Ditto
2150         (sync_operation, prefetch, cache_op, store_memory, load_memory,
2151         address_translation): Ditto
2152         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2153
2154 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2155
2156         * configure: Regenerated to track ../common/aclocal.m4 changes.
2157
2158 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2159
2160         * interp.c (sim_engine_run): Add `nr_cpus' argument.
2161
2162         * mips.igen (model): Map processor names onto BFD name.
2163
2164         * sim-main.h (CPU_CIA): Delete.
2165         (SET_CIA, GET_CIA): Define
2166
2167 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2168
2169         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2170         regiser.
2171
2172         * configure.in (default_endian): Configure a big-endian simulator
2173         by default.
2174         * configure: Re-generate.
2175
2176 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
2177
2178         * configure: Regenerated to track ../common/aclocal.m4 changes.
2179
2180 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
2181
2182         * interp.c (sim_monitor): Handle Densan monitor outbyte
2183         and inbyte functions.
2184
2185 1997-12-29  Felix Lee  <flee@cygnus.com>
2186
2187         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2188
2189 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
2190
2191         * Makefile.in (tmp-igen): Arrange for $zero to always be
2192         reset to zero after every instruction.
2193
2194 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2195
2196         * configure: Regenerated to track ../common/aclocal.m4 changes.
2197         * config.in: Ditto.
2198
2199 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
2200
2201         * mips.igen (MSUB): Fix to work like MADD.
2202         * gencode.c (MSUB): Similarly.
2203
2204 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
2205
2206         * configure: Regenerated to track ../common/aclocal.m4 changes.
2207
2208 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2209
2210         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2211
2212 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2213
2214         * sim-main.h (sim-fpu.h): Include.
2215
2216         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2217         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2218         using host independant sim_fpu module.
2219
2220 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2221
2222         * interp.c (signal_exception): Report internal errors with SIGABRT
2223         not SIGQUIT.
2224
2225         * sim-main.h (C0_CONFIG): New register.
2226         (signal.h): No longer include.
2227
2228         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2229
2230 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
2231
2232         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2233
2234 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2235
2236         * mips.igen: Tag vr5000 instructions.
2237         (ANDI): Was missing mipsIV model, fix assembler syntax.
2238         (do_c_cond_fmt): New function.
2239         (C.cond.fmt): Handle mips I-III which do not support CC field
2240         separatly.
2241         (bc1): Handle mips IV which do not have a delaed FCC separatly.
2242         (SDR): Mask paddr when BigEndianMem, not the converse as specified
2243         in IV3.2 spec.
2244         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
2245         vr5000 which saves LO in a GPR separatly.
2246
2247         * configure.in (enable-sim-igen): For vr5000, select vr5000
2248         specific instructions.
2249         * configure: Re-generate.
2250
2251 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2252
2253         * Makefile.in (SIM_OBJS): Add sim-fpu module.
2254
2255         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2256         fmt_uninterpreted_64 bit cases to switch.  Convert to
2257         fmt_formatted,
2258
2259         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2260
2261         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2262         as specified in IV3.2 spec.
2263         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2264
2265 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2266
2267         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2268         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2269         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2270         PENDING_FILL versions of instructions.  Simplify.
2271         (X): New function.
2272         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2273         instructions.
2274         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2275         a signed value.
2276         (MTHI, MFHI): Disable code checking HI-LO.
2277
2278         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2279         global.
2280         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2281
2282 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2283
2284         * gencode.c (build_mips16_operands): Replace IPC with cia.
2285
2286         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2287         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2288         IPC to `cia'.
2289         (UndefinedResult): Replace function with macro/function
2290         combination.
2291         (sim_engine_run): Don't save PC in IPC.
2292
2293         * sim-main.h (IPC): Delete.
2294
2295
2296         * interp.c (signal_exception, store_word, load_word,
2297         address_translation, load_memory, store_memory, cache_op,
2298         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2299         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2300         current instruction address - cia - argument.
2301         (sim_read, sim_write): Call address_translation directly.
2302         (sim_engine_run): Rename variable vaddr to cia.
2303         (signal_exception): Pass cia to sim_monitor
2304
2305         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2306         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2307         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2308
2309         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2310         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2311         SIM_ASSERT.
2312
2313         * interp.c (signal_exception): Pass restart address to
2314         sim_engine_restart.
2315
2316         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2317         idecode.o): Add dependency.
2318
2319         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2320         Delete definitions
2321         (DELAY_SLOT): Update NIA not PC with branch address.
2322         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2323
2324         * mips.igen: Use CIA not PC in branch calculations.
2325         (illegal): Call SignalException.
2326         (BEQ, ADDIU): Fix assembler.
2327
2328 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2329
2330         * m16.igen (JALX): Was missing.
2331
2332         * configure.in (enable-sim-igen): New configuration option.
2333         * configure: Re-generate.
2334
2335         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2336
2337         * interp.c (load_memory, store_memory): Delete parameter RAW.
2338         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2339         bypassing {load,store}_memory.
2340
2341         * sim-main.h (ByteSwapMem): Delete definition.
2342
2343         * Makefile.in (SIM_OBJS): Add sim-memopt module.
2344
2345         * interp.c (sim_do_command, sim_commands): Delete mips specific
2346         commands.  Handled by module sim-options.
2347
2348         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2349         (WITH_MODULO_MEMORY): Define.
2350
2351         * interp.c (sim_info): Delete code printing memory size.
2352
2353         * interp.c (mips_size): Nee sim_size, delete function.
2354         (power2): Delete.
2355         (monitor, monitor_base, monitor_size): Delete global variables.
2356         (sim_open, sim_close): Delete code creating monitor and other
2357         memory regions.  Use sim-memopts module, via sim_do_commandf, to
2358         manage memory regions.
2359         (load_memory, store_memory): Use sim-core for memory model.
2360
2361         * interp.c (address_translation): Delete all memory map code
2362         except line forcing 32 bit addresses.
2363
2364 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2365
2366         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
2367         trace options.
2368
2369         * interp.c (logfh, logfile): Delete globals.
2370         (sim_open, sim_close): Delete code opening & closing log file.
2371         (mips_option_handler): Delete -l and -n options.
2372         (OPTION mips_options): Ditto.
2373
2374         * interp.c (OPTION mips_options): Rename option trace to dinero.
2375         (mips_option_handler): Update.
2376
2377 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2378
2379         * interp.c (fetch_str): New function.
2380         (sim_monitor): Rewrite using sim_read & sim_write.
2381         (sim_open): Check magic number.
2382         (sim_open): Write monitor vectors into memory using sim_write.
2383         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2384         (sim_read, sim_write): Simplify - transfer data one byte at a
2385         time.
2386         (load_memory, store_memory): Clarify meaning of parameter RAW.
2387
2388         * sim-main.h (isHOST): Defete definition.
2389         (isTARGET): Mark as depreciated.
2390         (address_translation): Delete parameter HOST.
2391
2392         * interp.c (address_translation): Delete parameter HOST.
2393
2394 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2395
2396         * mips.igen:
2397
2398         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2399         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2400
2401 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2402
2403         * mips.igen: Add model filter field to records.
2404
2405 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2406
2407         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
2408
2409         interp.c (sim_engine_run): Do not compile function sim_engine_run
2410         when WITH_IGEN == 1.
2411
2412         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2413         target architecture.
2414
2415         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2416         igen. Replace with configuration variables sim_igen_flags /
2417         sim_m16_flags.
2418
2419         * m16.igen: New file.  Copy mips16 insns here.
2420         * mips.igen: From here.
2421
2422 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2423
2424         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2425         to top.
2426         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2427
2428 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
2429
2430         * gencode.c (build_instruction): Follow sim_write's lead in using
2431         BigEndianMem instead of !ByteSwapMem.
2432
2433 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2434
2435         * configure.in (sim_gen): Dependent on target, select type of
2436         generator.  Always select old style generator.
2437
2438         configure: Re-generate.
2439
2440         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2441         targets.
2442         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2443         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2444         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2445         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2446         SIM_@sim_gen@_*, set by autoconf.
2447
2448 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2449
2450         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2451
2452         * interp.c (ColdReset): Remove #ifdef HASFPU, check
2453         CURRENT_FLOATING_POINT instead.
2454
2455         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2456         (address_translation): Raise exception InstructionFetch when
2457         translation fails and isINSTRUCTION.
2458
2459         * interp.c (sim_open, sim_write, sim_monitor, store_word,
2460         sim_engine_run): Change type of of vaddr and paddr to
2461         address_word.
2462         (address_translation, prefetch, load_memory, store_memory,
2463         cache_op): Change type of vAddr and pAddr to address_word.
2464
2465         * gencode.c (build_instruction): Change type of vaddr and paddr to
2466         address_word.
2467
2468 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2469
2470         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2471         macro to obtain result of ALU op.
2472
2473 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2474
2475         * interp.c (sim_info): Call profile_print.
2476
2477 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2478
2479         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2480
2481         * sim-main.h (WITH_PROFILE): Do not define, defined in
2482         common/sim-config.h.  Use sim-profile module.
2483         (simPROFILE): Delete defintion.
2484
2485         * interp.c (PROFILE): Delete definition.
2486         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2487         (sim_close): Delete code writing profile histogram.
2488         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2489         Delete.
2490         (sim_engine_run): Delete code profiling the PC.
2491
2492 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2493
2494         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2495
2496         * interp.c (sim_monitor): Make register pointers of type
2497         unsigned_word*.
2498
2499         * sim-main.h: Make registers of type unsigned_word not
2500         signed_word.
2501
2502 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2503
2504         * interp.c (sync_operation): Rename from SyncOperation, make
2505         global, add SD argument.
2506         (prefetch): Rename from Prefetch, make global, add SD argument.
2507         (decode_coproc): Make global.
2508
2509         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2510
2511         * gencode.c (build_instruction): Generate DecodeCoproc not
2512         decode_coproc calls.
2513
2514         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2515         (SizeFGR): Move to sim-main.h
2516         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2517         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2518         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2519         sim-main.h.
2520         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2521         FP_RM_TOMINF, GETRM): Move to sim-main.h.
2522         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2523         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2524         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2525         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2526
2527         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2528         exception.
2529         (sim-alu.h): Include.
2530         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2531         (sim_cia): Typedef to instruction_address.
2532
2533 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2534
2535         * Makefile.in (interp.o): Rename generated file engine.c to
2536         oengine.c.
2537
2538         * interp.c: Update.
2539
2540 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2541
2542         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2543
2544 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2545
2546         * gencode.c (build_instruction): For "FPSQRT", output correct
2547         number of arguments to Recip.
2548
2549 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2550
2551         * Makefile.in (interp.o): Depends on sim-main.h
2552
2553         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2554
2555         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2556         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2557         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2558         STATE, DSSTATE): Define
2559         (GPR, FGRIDX, ..): Define.
2560
2561         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2562         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2563         (GPR, FGRIDX, ...): Delete macros.
2564
2565         * interp.c: Update names to match defines from sim-main.h
2566
2567 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2568
2569         * interp.c (sim_monitor): Add SD argument.
2570         (sim_warning): Delete.  Replace calls with calls to
2571         sim_io_eprintf.
2572         (sim_error): Delete. Replace calls with sim_io_error.
2573         (open_trace, writeout32, writeout16, getnum): Add SD argument.
2574         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2575         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2576         argument.
2577         (mips_size): Rename from sim_size. Add SD argument.
2578
2579         * interp.c (simulator): Delete global variable.
2580         (callback): Delete global variable.
2581         (mips_option_handler, sim_open, sim_write, sim_read,
2582         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2583         sim_size,sim_monitor): Use sim_io_* not callback->*.
2584         (sim_open): ZALLOC simulator struct.
2585         (PROFILE): Do not define.
2586
2587 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2588
2589         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2590         support.h with corresponding code.
2591
2592         * sim-main.h (word64, uword64), support.h: Move definition to
2593         sim-main.h.
2594         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2595
2596         * support.h: Delete
2597         * Makefile.in: Update dependencies
2598         * interp.c: Do not include.
2599
2600 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2601
2602         * interp.c (address_translation, load_memory, store_memory,
2603         cache_op): Rename to from AddressTranslation et.al., make global,
2604         add SD argument
2605
2606         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2607         CacheOp): Define.
2608
2609         * interp.c (SignalException): Rename to signal_exception, make
2610         global.
2611
2612         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2613
2614         * sim-main.h (SignalException, SignalExceptionInterrupt,
2615         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2616         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2617         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2618         Define.
2619
2620         * interp.c, support.h: Use.
2621
2622 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2623
2624         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2625         to value_fpr / store_fpr. Add SD argument.
2626         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2627         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2628
2629         * sim-main.h (ValueFPR, StoreFPR): Define.
2630
2631 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2632
2633         * interp.c (sim_engine_run): Check consistency between configure
2634         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2635         and HASFPU.
2636
2637         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2638         (mips_fpu): Configure WITH_FLOATING_POINT.
2639         (mips_endian): Configure WITH_TARGET_ENDIAN.
2640         * configure: Update.
2641
2642 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2643
2644         * configure: Regenerated to track ../common/aclocal.m4 changes.
2645
2646 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
2647
2648         * configure: Regenerated.
2649
2650 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
2651
2652         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2653
2654 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2655
2656         * gencode.c (print_igen_insn_models): Assume certain architectures
2657         include all mips* instructions.
2658         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2659         instruction.
2660
2661         * Makefile.in (tmp.igen): Add target. Generate igen input from
2662         gencode file.
2663
2664         * gencode.c (FEATURE_IGEN): Define.
2665         (main): Add --igen option.  Generate output in igen format.
2666         (process_instructions): Format output according to igen option.
2667         (print_igen_insn_format): New function.
2668         (print_igen_insn_models): New function.
2669         (process_instructions): Only issue warnings and ignore
2670         instructions when no FEATURE_IGEN.
2671
2672 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2673
2674         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2675         MIPS targets.
2676
2677 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2678
2679         * configure: Regenerated to track ../common/aclocal.m4 changes.
2680
2681 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2682
2683         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2684         SIM_RESERVED_BITS): Delete, moved to common.
2685         (SIM_EXTRA_CFLAGS): Update.
2686
2687 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2688
2689         * configure.in: Configure non-strict memory alignment.
2690         * configure: Regenerated to track ../common/aclocal.m4 changes.
2691
2692 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2693
2694         * configure: Regenerated to track ../common/aclocal.m4 changes.
2695
2696 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
2697
2698         * gencode.c (SDBBP,DERET): Added (3900) insns.
2699         (RFE): Turn on for 3900.
2700         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2701         (dsstate): Made global.
2702         (SUBTARGET_R3900): Added.
2703         (CANCELDELAYSLOT): New.
2704         (SignalException): Ignore SystemCall rather than ignore and
2705         terminate.  Add DebugBreakPoint handling.
2706         (decode_coproc): New insns RFE, DERET; and new registers Debug
2707         and DEPC protected by SUBTARGET_R3900.
2708         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2709         bits explicitly.
2710         * Makefile.in,configure.in: Add mips subtarget option.
2711         * configure: Update.
2712
2713 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
2714
2715         * gencode.c: Add r3900 (tx39).
2716
2717
2718 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
2719
2720         * gencode.c (build_instruction): Don't need to subtract 4 for
2721         JALR, just 2.
2722
2723 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
2724
2725         * interp.c: Correct some HASFPU problems.
2726
2727 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2728
2729         * configure: Regenerated to track ../common/aclocal.m4 changes.
2730
2731 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2732
2733         * interp.c (mips_options): Fix samples option short form, should
2734         be `x'.
2735
2736 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2737
2738         * interp.c (sim_info): Enable info code.  Was just returning.
2739
2740 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2741
2742         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2743         MFC0.
2744
2745 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2746
2747         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2748         constants.
2749         (build_instruction): Ditto for LL.
2750
2751 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
2752
2753         * configure: Regenerated to track ../common/aclocal.m4 changes.
2754
2755 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2756
2757         * configure: Regenerated to track ../common/aclocal.m4 changes.
2758         * config.in: Ditto.
2759
2760 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2761
2762         * interp.c (sim_open): Add call to sim_analyze_program, update
2763         call to sim_config.
2764
2765 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2766
2767         * interp.c (sim_kill): Delete.
2768         (sim_create_inferior): Add ABFD argument. Set PC from same.
2769         (sim_load): Move code initializing trap handlers from here.
2770         (sim_open): To here.
2771         (sim_load): Delete, use sim-hload.c.
2772
2773         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2774
2775 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2776
2777         * configure: Regenerated to track ../common/aclocal.m4 changes.
2778         * config.in: Ditto.
2779
2780 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2781
2782         * interp.c (sim_open): Add ABFD argument.
2783         (sim_load): Move call to sim_config from here.
2784         (sim_open): To here.  Check return status.
2785
2786 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
2787
2788         * gencode.c (build_instruction): Two arg MADD should
2789         not assign result to $0.
2790
2791 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
2792
2793         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2794         * sim/mips/configure.in: Regenerate.
2795
2796 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
2797
2798         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2799         signed8, unsigned8 et.al. types.
2800
2801         * interp.c (SUB_REG_FETCH): Handle both little and big endian
2802         hosts when selecting subreg.
2803
2804 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
2805
2806         * interp.c (sim_engine_run): Reset the ZERO register to zero
2807         regardless of FEATURE_WARN_ZERO.
2808         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2809
2810 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2811
2812         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2813         (SignalException): For BreakPoints ignore any mode bits and just
2814         save the PC.
2815         (SignalException): Always set the CAUSE register.
2816
2817 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2818
2819         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2820         exception has been taken.
2821
2822         * interp.c: Implement the ERET and mt/f sr instructions.
2823
2824 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2825
2826         * interp.c (SignalException): Don't bother restarting an
2827         interrupt.
2828
2829 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2830
2831         * interp.c (SignalException): Really take an interrupt.
2832         (interrupt_event): Only deliver interrupts when enabled.
2833
2834 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2835
2836         * interp.c (sim_info): Only print info when verbose.
2837         (sim_info) Use sim_io_printf for output.
2838
2839 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2840
2841         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2842         mips architectures.
2843
2844 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2845
2846         * interp.c (sim_do_command): Check for common commands if a
2847         simulator specific command fails.
2848
2849 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
2850
2851         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2852         and simBE when DEBUG is defined.
2853
2854 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2855
2856         * interp.c (interrupt_event): New function.  Pass exception event
2857         onto exception handler.
2858
2859         * configure.in: Check for stdlib.h.
2860         * configure: Regenerate.
2861
2862         * gencode.c (build_instruction): Add UNUSED attribute to tempS
2863         variable declaration.
2864         (build_instruction): Initialize memval1.
2865         (build_instruction): Add UNUSED attribute to byte, bigend,
2866         reverse.
2867         (build_operands): Ditto.
2868
2869         * interp.c: Fix GCC warnings.
2870         (sim_get_quit_code): Delete.
2871
2872         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2873         * Makefile.in: Ditto.
2874         * configure: Re-generate.
2875
2876         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2877
2878 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2879
2880         * interp.c (mips_option_handler): New function parse argumes using
2881         sim-options.
2882         (myname): Replace with STATE_MY_NAME.
2883         (sim_open): Delete check for host endianness - performed by
2884         sim_config.
2885         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2886         (sim_open): Move much of the initialization from here.
2887         (sim_load): To here.  After the image has been loaded and
2888         endianness set.
2889         (sim_open): Move ColdReset from here.
2890         (sim_create_inferior): To here.
2891         (sim_open): Make FP check less dependant on host endianness.
2892
2893         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2894         run.
2895         * interp.c (sim_set_callbacks): Delete.
2896
2897         * interp.c (membank, membank_base, membank_size): Replace with
2898         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2899         (sim_open): Remove call to callback->init. gdb/run do this.
2900
2901         * interp.c: Update
2902
2903         * sim-main.h (SIM_HAVE_FLATMEM): Define.
2904
2905         * interp.c (big_endian_p): Delete, replaced by
2906         current_target_byte_order.
2907
2908 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2909
2910         * interp.c (host_read_long, host_read_word, host_swap_word,
2911         host_swap_long): Delete. Using common sim-endian.
2912         (sim_fetch_register, sim_store_register): Use H2T.
2913         (pipeline_ticks): Delete.  Handled by sim-events.
2914         (sim_info): Update.
2915         (sim_engine_run): Update.
2916
2917 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2918
2919         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2920         reason from here.
2921         (SignalException): To here. Signal using sim_engine_halt.
2922         (sim_stop_reason): Delete, moved to common.
2923
2924 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
2925
2926         * interp.c (sim_open): Add callback argument.
2927         (sim_set_callbacks): Delete SIM_DESC argument.
2928         (sim_size): Ditto.
2929
2930 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2931
2932         * Makefile.in (SIM_OBJS): Add common modules.
2933
2934         * interp.c (sim_set_callbacks): Also set SD callback.
2935         (set_endianness, xfer_*, swap_*): Delete.
2936         (host_read_word, host_read_long, host_swap_word, host_swap_long):
2937         Change to functions using sim-endian macros.
2938         (control_c, sim_stop): Delete, use common version.
2939         (simulate): Convert into.
2940         (sim_engine_run): This function.
2941         (sim_resume): Delete.
2942
2943         * interp.c (simulation): New variable - the simulator object.
2944         (sim_kind): Delete global - merged into simulation.
2945         (sim_load): Cleanup.  Move PC assignment from here.
2946         (sim_create_inferior): To here.
2947
2948         * sim-main.h: New file.
2949         * interp.c (sim-main.h): Include.
2950
2951 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
2952
2953         * configure: Regenerated to track ../common/aclocal.m4 changes.
2954
2955 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
2956
2957         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2958
2959 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
2960
2961         * gencode.c (build_instruction): DIV instructions: check
2962         for division by zero and integer overflow before using
2963         host's division operation.
2964
2965 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
2966
2967         * Makefile.in (SIM_OBJS): Add sim-load.o.
2968         * interp.c: #include bfd.h.
2969         (target_byte_order): Delete.
2970         (sim_kind, myname, big_endian_p): New static locals.
2971         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
2972         after argument parsing.  Recognize -E arg, set endianness accordingly.
2973         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
2974         load file into simulator.  Set PC from bfd.
2975         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
2976         (set_endianness): Use big_endian_p instead of target_byte_order.
2977
2978 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2979
2980         * interp.c (sim_size): Delete prototype - conflicts with
2981         definition in remote-sim.h.  Correct definition.
2982
2983 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2984
2985         * configure: Regenerated to track ../common/aclocal.m4 changes.
2986         * config.in: Ditto.
2987
2988 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
2989
2990         * interp.c (sim_open): New arg `kind'.
2991
2992         * configure: Regenerated to track ../common/aclocal.m4 changes.
2993
2994 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2995
2996         * configure: Regenerated to track ../common/aclocal.m4 changes.
2997
2998 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
2999
3000         * interp.c (sim_open): Set optind to 0 before calling getopt.
3001
3002 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3003
3004         * configure: Regenerated to track ../common/aclocal.m4 changes.
3005
3006 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
3007
3008         * interp.c : Replace uses of pr_addr with pr_uword64
3009         where the bit length is always 64 independent of SIM_ADDR.
3010         (pr_uword64) : added.
3011
3012 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3013
3014         * configure: Re-generate.
3015
3016 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
3017
3018         * configure: Regenerate to track ../common/aclocal.m4 changes.
3019
3020 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
3021
3022         * interp.c (sim_open): New SIM_DESC result.  Argument is now
3023         in argv form.
3024         (other sim_*): New SIM_DESC argument.
3025
3026 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
3027
3028         * interp.c: Fix printing of addresses for non-64-bit targets.
3029         (pr_addr): Add function to print address based on size.
3030
3031 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
3032
3033         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3034
3035 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
3036
3037         * gencode.c (build_mips16_operands): Correct computation of base
3038         address for extended PC relative instruction.
3039
3040 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
3041
3042         * interp.c (mips16_entry): Add support for floating point cases.
3043         (SignalException): Pass floating point cases to mips16_entry.
3044         (ValueFPR): Don't restrict fmt_single and fmt_word to even
3045         registers.
3046         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
3047         or fmt_word.
3048         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3049         and then set the state to fmt_uninterpreted.
3050         (COP_SW): Temporarily set the state to fmt_word while calling
3051         ValueFPR.
3052
3053 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
3054
3055         * gencode.c (build_instruction): The high order may be set in the
3056         comparison flags at any ISA level, not just ISA 4.
3057
3058 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
3059
3060         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3061         COMMON_{PRE,POST}_CONFIG_FRAG instead.
3062         * configure.in: sinclude ../common/aclocal.m4.
3063         * configure: Regenerated.
3064
3065 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
3066
3067         * configure: Rebuild after change to aclocal.m4.
3068
3069 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
3070
3071         * configure configure.in Makefile.in:  Update to new configure
3072         scheme which is more compatible with WinGDB builds.
3073         * configure.in:  Improve comment on how to run autoconf.
3074         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
3075         * Makefile.in:  Use autoconf substitution to install common
3076         makefile fragment.
3077
3078 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
3079
3080         * gencode.c (build_instruction): Use BigEndianCPU instead of
3081         ByteSwapMem.
3082
3083 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
3084
3085         * interp.c (sim_monitor): Make output to stdout visible in
3086         wingdb's I/O log window.
3087
3088 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
3089
3090         * support.h: Undo previous change to SIGTRAP
3091         and SIGQUIT values.
3092
3093 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
3094
3095         * interp.c (store_word, load_word): New static functions.
3096         (mips16_entry): New static function.
3097         (SignalException): Look for mips16 entry and exit instructions.
3098         (simulate): Use the correct index when setting fpr_state after
3099         doing a pending move.
3100
3101 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
3102
3103         * interp.c: Fix byte-swapping code throughout to work on
3104         both little- and big-endian hosts.
3105
3106 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
3107
3108         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3109         with gdb/config/i386/xm-windows.h.
3110
3111 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
3112
3113         * gencode.c (build_instruction): Work around MSVC++ code gen bug
3114         that messes up arithmetic shifts.
3115
3116 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
3117
3118         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
3119         SIGTRAP and SIGQUIT for _WIN32.
3120
3121 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
3122
3123         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3124         force a 64 bit multiplication.
3125         (build_instruction) [OR]: In mips16 mode, don't do anything if the
3126         destination register is 0, since that is the default mips16 nop
3127         instruction.
3128
3129 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
3130
3131         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3132         (build_endian_shift): Don't check proc64.
3133         (build_instruction): Always set memval to uword64.  Cast op2 to
3134         uword64 when shifting it left in memory instructions.  Always use
3135         the same code for stores--don't special case proc64.
3136
3137         * gencode.c (build_mips16_operands): Fix base PC value for PC
3138         relative operands.
3139         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3140         jal instruction.
3141         * interp.c (simJALDELAYSLOT): Define.
3142         (JALDELAYSLOT): Define.
3143         (INDELAYSLOT, INJALDELAYSLOT): Define.
3144         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3145
3146 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
3147
3148         * interp.c (sim_open): add flush_cache as a PMON routine
3149         (sim_monitor): handle flush_cache by ignoring it
3150
3151 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
3152
3153         * gencode.c (build_instruction): Use !ByteSwapMem instead of
3154         BigEndianMem.
3155         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3156         (BigEndianMem): Rename to ByteSwapMem and change sense.
3157         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3158         BigEndianMem references to !ByteSwapMem.
3159         (set_endianness): New function, with prototype.
3160         (sim_open): Call set_endianness.
3161         (sim_info): Use simBE instead of BigEndianMem.
3162         (xfer_direct_word, xfer_direct_long, swap_direct_word,
3163         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3164         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3165         ifdefs, keeping the prototype declaration.
3166         (swap_word): Rewrite correctly.
3167         (ColdReset): Delete references to CONFIG.  Delete endianness related
3168         code; moved to set_endianness.
3169
3170 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
3171
3172         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3173         * interp.c (CHECKHILO): Define away.
3174         (simSIGINT): New macro.
3175         (membank_size): Increase from 1MB to 2MB.
3176         (control_c): New function.
3177         (sim_resume): Rename parameter signal to signal_number.  Add local
3178         variable prev.  Call signal before and after simulate.
3179         (sim_stop_reason): Add simSIGINT support.
3180         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3181         functions always.
3182         (sim_warning): Delete call to SignalException.  Do call printf_filtered
3183         if logfh is NULL.
3184         (AddressTranslation): Add #ifdef DEBUG around debugging message and
3185         a call to sim_warning.
3186
3187 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
3188
3189         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3190         16 bit instructions.
3191
3192 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3193
3194         Add support for mips16 (16 bit MIPS implementation):
3195         * gencode.c (inst_type): Add mips16 instruction encoding types.
3196         (GETDATASIZEINSN): Define.
3197         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
3198         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
3199         mtlo.
3200         (MIPS16_DECODE): New table, for mips16 instructions.
3201         (bitmap_val): New static function.
3202         (struct mips16_op): Define.
3203         (mips16_op_table): New table, for mips16 operands.
3204         (build_mips16_operands): New static function.
3205         (process_instructions): If PC is odd, decode a mips16
3206         instruction.  Break out instruction handling into new
3207         build_instruction function.
3208         (build_instruction): New static function, broken out of
3209         process_instructions.  Check modifiers rather than flags for SHIFT
3210         bit count and m[ft]{hi,lo} direction.
3211         (usage): Pass program name to fprintf.
3212         (main): Remove unused variable this_option_optind.  Change
3213         ``*loptarg++'' to ``loptarg++''.
3214         (my_strtoul): Parenthesize && within ||.
3215         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3216         (simulate): If PC is odd, fetch a 16 bit instruction, and
3217         increment PC by 2 rather than 4.
3218         * configure.in: Add case for mips16*-*-*.
3219         * configure: Rebuild.
3220
3221 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
3222
3223         * interp.c: Allow -t to enable tracing in standalone simulator.
3224         Fix garbage output in trace file and error messages.
3225
3226 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
3227
3228         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3229         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3230         * configure.in: Simplify using macros in ../common/aclocal.m4.
3231         * configure: Regenerated.
3232         * tconfig.in: New file.
3233
3234 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
3235
3236         * interp.c: Fix bugs in 64-bit port.
3237         Use ansi function declarations for msvc compiler.
3238         Initialize and test file pointer in trace code.
3239         Prevent duplicate definition of LAST_EMED_REGNUM.
3240
3241 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
3242
3243         * interp.c (xfer_big_long): Prevent unwanted sign extension.
3244
3245 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
3246
3247         * interp.c (SignalException): Check for explicit terminating
3248         breakpoint value.
3249         * gencode.c: Pass instruction value through SignalException()
3250         calls for Trap, Breakpoint and Syscall.
3251
3252 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3253
3254         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3255         only used on those hosts that provide it.
3256         * configure.in: Add sqrt() to list of functions to be checked for.
3257         * config.in: Re-generated.
3258         * configure: Re-generated.
3259
3260 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3261
3262         * gencode.c (process_instructions): Call build_endian_shift when
3263         expanding STORE RIGHT, to fix swr.
3264         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3265         clear the high bits.
3266         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3267         Fix float to int conversions to produce signed values.
3268
3269 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
3270
3271         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3272         (process_instructions): Correct handling of nor instruction.
3273         Correct shift count for 32 bit shift instructions. Correct sign
3274         extension for arithmetic shifts to not shift the number of bits in
3275         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
3276         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
3277         Fix madd.
3278         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3279         It's OK to have a mult follow a mult.  What's not OK is to have a
3280         mult follow an mfhi.
3281         (Convert): Comment out incorrect rounding code.
3282
3283 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
3284
3285         * interp.c (sim_monitor): Improved monitor printf
3286         simulation. Tidied up simulator warnings, and added "--log" option
3287         for directing warning message output.
3288         * gencode.c: Use sim_warning() rather than WARNING macro.
3289
3290 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3291
3292         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3293         getopt1.o, rather than on gencode.c.  Link objects together.
3294         Don't link against -liberty.
3295         (gencode.o, getopt.o, getopt1.o): New targets.
3296         * gencode.c: Include <ctype.h> and "ansidecl.h".
3297         (AND): Undefine after including "ansidecl.h".
3298         (ULONG_MAX): Define if not defined.
3299         (OP_*): Don't define macros; now defined in opcode/mips.h.
3300         (main): Call my_strtoul rather than strtoul.
3301         (my_strtoul): New static function.
3302
3303 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
3304
3305         * gencode.c (process_instructions):  Generate word64 and uword64
3306         instead of `long long' and `unsigned long long' data types.
3307         * interp.c:  #include sysdep.h to get signals, and define default
3308         for SIGBUS.
3309         * (Convert):  Work around for Visual-C++ compiler bug with type
3310         conversion.
3311         * support.h:  Make things compile under Visual-C++ by using
3312         __int64 instead of `long long'.  Change many refs to long long
3313         into word64/uword64 typedefs.
3314
3315 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
3316
3317         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3318         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3319         (docdir): Removed.
3320         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3321         (AC_PROG_INSTALL): Added.
3322         (AC_PROG_CC): Moved to before configure.host call.
3323         * configure: Rebuilt.
3324
3325 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
3326
3327         * configure.in: Define @SIMCONF@ depending on mips target.
3328         * configure: Rebuild.
3329         * Makefile.in (run): Add @SIMCONF@ to control simulator
3330         construction.
3331         * gencode.c: Change LOADDRMASK to 64bit memory model only.
3332         * interp.c: Remove some debugging, provide more detailed error
3333         messages, update memory accesses to use LOADDRMASK.
3334
3335 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
3336
3337         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3338         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
3339         stamp-h.
3340         * configure: Rebuild.
3341         * config.in: New file, generated by autoheader.
3342         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
3343         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
3344         HAVE_ANINT and HAVE_AINT, as appropriate.
3345         * Makefile.in (run): Use @LIBS@ rather than -lm.
3346         (interp.o): Depend upon config.h.
3347         (Makefile): Just rebuild Makefile.
3348         (clean): Remove stamp-h.
3349         (mostlyclean): Make the same as clean, not as distclean.
3350         (config.h, stamp-h): New targets.
3351
3352 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3353
3354         * interp.c (ColdReset): Fix boolean test. Make all simulator
3355         globals static.
3356
3357 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
3358
3359         * interp.c (xfer_direct_word, xfer_direct_long,
3360         swap_direct_word, swap_direct_long, xfer_big_word,
3361         xfer_big_long, xfer_little_word, xfer_little_long,
3362         swap_word,swap_long): Added.
3363         * interp.c (ColdReset): Provide function indirection to
3364         host<->simulated_target transfer routines.
3365         * interp.c (sim_store_register, sim_fetch_register): Updated to
3366         make use of indirected transfer routines.
3367
3368 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
3369
3370         * gencode.c (process_instructions): Ensure FP ABS instruction
3371         recognised.
3372         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3373         system call support.
3374
3375 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
3376
3377         * interp.c (sim_do_command): Complain if callback structure not
3378         initialised.
3379
3380 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
3381
3382         * interp.c (Convert): Provide round-to-nearest and round-to-zero
3383         support for Sun hosts.
3384         * Makefile.in (gencode): Ensure the host compiler and libraries
3385         used for cross-hosted build.
3386
3387 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
3388
3389         * interp.c, gencode.c: Some more (TODO) tidying.
3390
3391 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
3392
3393         * gencode.c, interp.c: Replaced explicit long long references with
3394         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3395         * support.h (SET64LO, SET64HI): Macros added.
3396
3397 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
3398
3399         * configure: Regenerate with autoconf 2.7.
3400
3401 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
3402
3403         * interp.c (LoadMemory): Enclose text following #endif in /* */.
3404         * support.h: Remove superfluous "1" from #if.
3405         * support.h (CHECKSIM): Remove stray 'a' at end of line.
3406
3407 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
3408
3409         * interp.c (StoreFPR): Control UndefinedResult() call on
3410         WARN_RESULT manifest.
3411
3412 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
3413
3414         * gencode.c: Tidied instruction decoding, and added FP instruction
3415         support.
3416
3417         * interp.c: Added dineroIII, and BSD profiling support. Also
3418         run-time FP handling.
3419
3420 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
3421
3422         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3423         gencode.c, interp.c, support.h: created.