sim/mips/ChangeLog

   1 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
   4
   5 2015-12-15  Dominik Vogt  <vogt@linux.vnet.ibm.com>
   6
   7         * micromips.igen (process_isa_mode): Fix left shift of negative
   8         value.
   9
  10 2015-11-17  Mike Frysinger  <vapier@gentoo.org>
  11
  12         * sim-main.h (WITH_MODULO_MEMORY): Delete.
  13
  14 2015-11-15  Mike Frysinger  <vapier@gentoo.org>
  15
  16         * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
  17
  18 2015-11-14  Mike Frysinger  <vapier@gentoo.org>
  19
  20         * interp.c (sim_close): Rename to ...
  21         (mips_sim_close): ... this.  Delete calls to sim_module_uninstall and
  22         sim_io_shutdown.
  23         * sim-main.h (mips_sim_close): Declare.
  24         (SIM_CLOSE_HOOK): Define.
  25
  26 2015-09-25  Andrew Bennett  <andrew.bennett@imgtec.com>
  27             Ali Lown  <ali.lown@imgtec.com>
  28
  29         * Makefile.in (tmp-micromips): New rule.
  30         (tmp-mach-multi): Add support for micromips.
  31         * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
  32         that works for both mips64 and micromips64.
  33         (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
  34         micromips32.
  35         Add build support for micromips.
  36         * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
  37         do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
  38         do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
  39         do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
  40         do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
  41         do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
  42         do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
  43         do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
  44         Refactored instruction code to use these functions.
  45         * dsp2.igen: Refactored instruction code to use the new functions.
  46         * interp.c (decode_coproc): Refactored to work with any instruction
  47         encoding.
  48         (isa_mode): New variable
  49         (RSVD_INSTRUCTION): Changed to 0x00000039.
  50         * m16.igen (BREAK16): Refactored instruction to use do_break16.
  51         (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
  52         * micromips.dc: New file.
  53         * micromips.igen: New file.
  54         * micromips16.dc: New file.
  55         * micromipsdsp.igen: New file.
  56         * micromipsrun.c: New file.
  57         * mips.igen (do_swc1): Changed to work with any instruction encoding.
  58         (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
  59         do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
  60         do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
  61         do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
  62         do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
  63         do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
  64         do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
  65         do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
  66         do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
  67         do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
  68         do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
  69         do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
  70         do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
  71         do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
  72         do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
  73         do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
  74         do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
  75         do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
  76         instructions.
  77         Refactored instruction code to use these functions.
  78         (RSVD): Changed to use new reserved instruction.
  79         (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
  80         check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
  81         do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
  82         do_store_double):  Added micromips32 and micromips64 models.
  83         Added include for micromips.igen and micromipsdsp.igen
  84         Add micromips32 and micromips64 models.
  85         (DecodeCoproc): Updated to use new macro definition.
  86         * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
  87         do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
  88         do_seb, do_seh do_rdhwr, do_wsbh): New functions.
  89         Refactored instruction code to use these functions.
  90         * sim-main.h (CP0_operation): New enum.
  91         (DecodeCoproc): Updated macro.
  92         (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
  93         MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
  94         MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
  95         ISA_MODE_MICROMIPS): New defines.
  96         (sim_state): Add isa_mode field.
  97
  98 2015-06-23  Mike Frysinger  <vapier@gentoo.org>
  99
 100         * configure: Regenerate.
 101
 102 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 103
 104         * configure.ac: Change configure.in to configure.ac.
 105         * configure: Regenerate.
 106
 107 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 108
 109         * configure: Regenerate.
 110
 111 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 112
 113         * interp.c [TRACE]: Delete.
 114         (TRACE): Change to WITH_TRACE_ANY_P.
 115         [!WITH_TRACE_ANY_P] (open_trace): Define.
 116         (mips_option_handler, open_trace, sim_close, dotrace):
 117         Change defined(TRACE) to WITH_TRACE_ANY_P.
 118         (sim_open): Delete TRACE ifdef check.
 119         * sim-main.c (load_memory): Delete TRACE ifdef check.
 120         (store_memory): Likewise.
 121         * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
 122         [!WITH_TRACE_ANY_P] (dotrace): Define.
 123
 124 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 125
 126         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
 127         comments.
 128
 129 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 130
 131         * sim-main.h (SIM_CPU): Delete.
 132
 133 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 134
 135         * sim-main.h (sim_cia): Delete.
 136
 137 2015-04-17  Mike Frysinger  <vapier@gentoo.org>
 138
 139         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
 140         PU_PC_GET.
 141         * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
 142         (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
 143         * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
 144         CIA_SET to CPU_PC_SET.
 145         * sim-main.h (CIA_GET, CIA_SET): Delete.
 146
 147 2015-04-15  Mike Frysinger  <vapier@gentoo.org>
 148
 149         * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
 150         * sim-main.h (STATE_CPU): Delete.
 151
 152 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 153
 154         * configure: Regenerate.
 155
 156 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 157
 158         * Makefile.in (SIM_OBJS): Add sim-cpu.o.
 159         * interp.c (mips_pc_get, mips_pc_set): New functions.
 160         (sim_open): Declare new local var i.  Call sim_cpu_alloc_all.
 161         Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
 162         (sim_pc_get): Delete.
 163         * sim-main.h (SIM_CPU): Define.
 164         (struct sim_state): Change cpu to an array of pointers.
 165         (STATE_CPU): Drop &.
 166
 167 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 168
 169         * interp.c (mips_option_handler, open_trace, sim_close,
 170         sim_write, sim_read, sim_store_register, sim_fetch_register,
 171         sim_create_inferior, pr_addr, pr_uword64): Convert old style
 172         prototypes.
 173         (sim_open): Convert old style prototype.  Change casts with
 174         sim_write to unsigned char *.
 175         (fetch_str): Change null to unsigned char, and change cast to
 176         unsigned char *.
 177         (sim_monitor): Change c & ch to unsigned char.  Change cast to
 178         unsigned char *.
 179
 180 2015-04-12  Mike Frysinger  <vapier@gentoo.org>
 181
 182         * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
 183
 184 2015-04-06  Mike Frysinger  <vapier@gentoo.org>
 185
 186         * Makefile.in (SIM_OBJS): Delete sim-engine.o.
 187
 188 2015-04-01  Mike Frysinger  <vapier@gentoo.org>
 189
 190         * tconfig.h (SIM_HAVE_PROFILE): Delete.
 191
 192 2015-03-31  Mike Frysinger  <vapier@gentoo.org>
 193
 194         * config.in, configure: Regenerate.
 195
 196 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 197
 198         * interp.c (sim_pc_get): New function.
 199
 200 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 201
 202         * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
 203         * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
 204
 205 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 206
 207         * configure: Regenerate.
 208
 209 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 210
 211         * configure: Regenerate.
 212
 213 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 214
 215         * configure: Regenerate.
 216         * configure.ac (mips_extra_objs): Delete.
 217         * Makefile.in (MIPS_EXTRA_OBJS): Delete.
 218         (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
 219
 220 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 221
 222         * configure: Regenerate.
 223         * configure.ac: Delete sim_hw checks for dv-sockser.
 224
 225 2015-03-16  Mike Frysinger  <vapier@gentoo.org>
 226
 227         * config.in, configure: Regenerate.
 228         * tconfig.in: Rename file ...
 229         * tconfig.h: ... here.
 230
 231 2015-03-15  Mike Frysinger  <vapier@gentoo.org>
 232
 233         * tconfig.in: Delete includes.
 234         [HAVE_DV_SOCKSER]: Delete.
 235
 236 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 237
 238         * Makefile.in (SIM_RUN_OBJS): Delete.
 239
 240 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 241
 242         * configure.ac (AC_CHECK_HEADERS): Delete.
 243         * aclocal.m4, configure: Regenerate.
 244
 245 2014-08-19  Alan Modra  <amodra@gmail.com>
 246
 247         * configure: Regenerate.
 248
 249 2014-08-15  Roland McGrath  <mcgrathr@google.com>
 250
 251         * configure: Regenerate.
 252         * config.in: Regenerate.
 253
 254 2014-03-04  Mike Frysinger  <vapier@gentoo.org>
 255
 256         * configure: Regenerate.
 257
 258 2013-09-23  Alan Modra  <amodra@gmail.com>
 259
 260         * configure: Regenerate.
 261
 262 2013-06-03  Mike Frysinger  <vapier@gentoo.org>
 263
 264         * aclocal.m4, configure: Regenerate.
 265
 266 2013-05-10  Freddie Chopin  <freddie_chopin@op.pl>
 267
 268         * configure: Rebuild.
 269
 270 2013-03-26  Mike Frysinger  <vapier@gentoo.org>
 271
 272         * configure: Regenerate.
 273
 274 2013-03-23  Joel Sherrill  <joel.sherrill@oarcorp.com>
 275
 276         * configure.ac: Address use of dv-sockser.o.
 277         * tconfig.in: Conditionalize use of dv_sockser_install.
 278         * configure: Regenerated.
 279         * config.in: Regenerated.
 280
 281 2012-10-04  Chao-ying Fu  <fu@mips.com>
 282             Steve Ellcey  <sellcey@mips.com>
 283
 284         * mips/mips3264r2.igen (rdhwr): New.
 285
 286 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
 287
 288         * configure.ac: Always link against dv-sockser.o.
 289         * configure: Regenerate.
 290
 291 2012-06-15  Joel Brobecker  <brobecker@adacore.com>
 292
 293         * config.in, configure: Regenerate.
 294
 295 2012-05-18  Nick Clifton  <nickc@redhat.com>
 296
 297         PR 14072
 298         * interp.c: Include config.h before system header files.
 299
 300 2012-03-24  Mike Frysinger  <vapier@gentoo.org>
 301
 302         * aclocal.m4, config.in, configure: Regenerate.
 303
 304 2011-12-03  Mike Frysinger  <vapier@gentoo.org>
 305
 306         * aclocal.m4: New file.
 307         * configure: Regenerate.
 308
 309 2011-10-19  Mike Frysinger  <vapier@gentoo.org>
 310
 311         * configure: Regenerate after common/acinclude.m4 update.
 312
 313 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 314
 315         * configure.ac: Change include to common/acinclude.m4.
 316
 317 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 318
 319         * configure.ac: Change AC_PREREQ to 2.64.  Delete AC_CONFIG_HEADER
 320         call.  Replace common.m4 include with SIM_AC_COMMON.
 321         * configure: Regenerate.
 322
 323 2011-07-08  Hans-Peter Nilsson  <hp@axis.com>
 324
 325         * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
 326         $(SIM_EXTRA_DEPS).
 327         (tmp-mach-multi): Exit early when igen fails.
 328
 329 2011-07-05  Mike Frysinger  <vapier@gentoo.org>
 330
 331         * interp.c (sim_do_command): Delete.
 332
 333 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 334
 335         * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
 336         (tx3904sio_fifo_reset): Likewise.
 337         * interp.c (sim_monitor): Likewise.
 338
 339 2010-04-14  Mike Frysinger  <vapier@gentoo.org>
 340
 341         * interp.c (sim_write): Add const to buffer arg.
 342
 343 2010-01-18  Masaki Muranaka  <monaka@monami-software.com>  (tiny change)
 344
 345         * interp.c: Don't include sysdep.h
 346
 347 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 348
 349         * configure: Regenerate.
 350
 351 2009-08-22  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 352
 353         * config.in: Regenerate.
 354         * configure: Likewise.
 355
 356         * configure: Regenerate.
 357
 358 2008-07-11  Hans-Peter Nilsson  <hp@axis.com>
 359
 360         * configure: Regenerate to track ../common/common.m4 changes.
 361         * config.in: Ditto.
 362
 363 2008-06-06  Vladimir Prus  <vladimir@codesourcery.com>
 364             Daniel Jacobowitz  <dan@codesourcery.com>
 365             Joseph Myers  <joseph@codesourcery.com>
 366
 367         * configure: Regenerate.
 368
 369 2007-10-22  Richard Sandiford  <rsandifo@nildram.co.uk>
 370
 371         * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
 372         that unconditionally allows fmt_ps.
 373         (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
 374         (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
 375         (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
 376         filter from 64,f to 32,f.
 377         (PREFX): Change filter from 64 to 32.
 378         (LDXC1, LUXC1): Provide separate mips32r2 implementations
 379         that use do_load_double instead of do_load.  Make both LUXC1
 380         versions unpredictable if SizeFGR () != 64.
 381         (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
 382         instead of do_store.  Remove unused variable.  Make both SUXC1
 383         versions unpredictable if SizeFGR () != 64.
 384
 385 2007-10-07  Richard Sandiford  <rsandifo@nildram.co.uk>
 386
 387         * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
 388         (sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
 389         shifts for that case.
 390
 391 2007-09-04  Nick Clifton  <nickc@redhat.com>
 392
 393         * interp.c (options enum): Add OPTION_INFO_MEMORY.
 394         (display_mem_info): New static variable.
 395         (mips_option_handler): Handle OPTION_INFO_MEMORY.
 396         (mips_options): Add info-memory and memory-info.
 397         (sim_open): After processing the command line and board
 398         specification, check display_mem_info.  If it is set then
 399         call the real handler for the --memory-info command line
 400         switch.
 401
 402 2007-08-24  Joel Brobecker  <brobecker@adacore.com>
 403
 404         * configure.ac: Change license of multi-run.c to GPL version 3.
 405         * configure: Regenerate.
 406
 407 2007-06-28  Richard Sandiford  <richard@codesourcery.com>
 408
 409         * configure.ac, configure: Revert last patch.
 410
 411 2007-06-26  Richard Sandiford  <richard@codesourcery.com>
 412
 413         * configure.ac (sim_mipsisa3264_configs): New variable.
 414         (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
 415         every configuration support all four targets, using the triplet to
 416         determine the default.
 417         * configure: Regenerate.
 418
 419 2007-06-25  Richard Sandiford  <richard@codesourcery.com>
 420
 421         * Makefile.in (m16run.o): New rule.
 422
 423 2007-05-15  Thiemo Seufer  <ths@mips.com>
 424
 425         * mips3264r2.igen (DSHD): Fix compile warning.
 426
 427 2007-05-14  Thiemo Seufer  <ths@mips.com>
 428
 429         * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
 430         CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
 431         NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
 432         RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
 433         for mips32r2.
 434
 435 2007-03-01  Thiemo Seufer  <ths@mips.com>
 436
 437         * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
 438         and mips64.
 439
 440 2007-02-20  Thiemo Seufer  <ths@mips.com>
 441
 442         * dsp.igen: Update copyright notice.
 443         * dsp2.igen: Fix copyright notice.
 444
 445 2007-02-20  Thiemo Seufer  <ths@mips.com>
 446             Chao-Ying Fu  <fu@mips.com>
 447
 448         * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
 449         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 450         Add dsp2 to sim_igen_machine.
 451         * configure: Regenerate.
 452         * dsp.igen (do_ph_op): Add MUL support when op = 2.
 453         (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
 454         (mulq_rs.ph): Use do_ph_mulq.
 455         (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
 456         * mips.igen: Add dsp2 model and include dsp2.igen.
 457         (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
 458         for *mips32r2, *mips64r2, *dsp.
 459         (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
 460         for *mips32r2, *mips64r2, *dsp2.
 461         * dsp2.igen: New file for MIPS DSP REV 2 ASE.
 462
 463 2007-02-19  Thiemo Seufer  <ths@mips.com>
 464             Nigel Stephens  <nigel@mips.com>
 465
 466         * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
 467         jumps with hazard barrier.
 468
 469 2007-02-19  Thiemo Seufer  <ths@mips.com>
 470             Nigel Stephens  <nigel@mips.com>
 471
 472         * interp.c (sim_monitor): Flush stdout and stderr file descriptors
 473         after each call to sim_io_write.
 474
 475 2007-02-19  Thiemo Seufer  <ths@mips.com>
 476             Nigel Stephens  <nigel@mips.com>
 477
 478         * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
 479         supported by this simulator.
 480         (decode_coproc): Recognise additional CP0 Config registers
 481         correctly.
 482
 483 2007-02-19  Thiemo Seufer  <ths@mips.com>
 484             Nigel Stephens  <nigel@mips.com>
 485             David Ung  <davidu@mips.com>
 486
 487         * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
 488         uninterpreted formats. If fmt is one of the uninterpreted types
 489         don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
 490         fmt_word, and fmt_uninterpreted_64 like fmt_long.
 491         (store_fpr): When writing an invalid odd register, set the
 492         matching even register to fmt_unknown, not the following register.
 493         * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
 494         the the memory window at offset 0 set by --memory-size command
 495         line option.
 496         (sim_store_register): Handle storing 4 bytes to an 8 byte floating
 497         point register.
 498         (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
 499         register.
 500         (sim_monitor): When returning the memory size to the MIPS
 501         application, use the value in STATE_MEM_SIZE, not an arbitrary
 502         hardcoded value.
 503         (cop_lw): Don' mess around with FPR_STATE, just pass
 504         fmt_uninterpreted_32 to StoreFPR.
 505         (cop_sw): Similarly.
 506         (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
 507         (cop_sd): Similarly.
 508         * mips.igen (not_word_value): Single version for mips32, mips64
 509         and mips16.
 510
 511 2007-02-19  Thiemo Seufer <ths@mips.com>
 512             Nigel Stephens  <nigel@mips.com>
 513
 514         * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
 515         MBytes.
 516
 517 2007-02-17  Thiemo Seufer  <ths@mips.com>
 518
 519         * configure.ac (mips*-sde-elf*): Move in front of generic machine
 520         configuration.
 521         * configure: Regenerate.
 522
 523 2007-02-17  Thiemo Seufer  <ths@mips.com>
 524
 525         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 526         Add mdmx to sim_igen_machine.
 527         (mipsisa64*-*-*): Likewise. Remove dsp.
 528         (mipsisa32*-*-*): Remove dsp.
 529         * configure: Regenerate.
 530
 531 2007-02-13  Thiemo Seufer  <ths@mips.com>
 532
 533         * configure.ac: Add mips*-sde-elf* target.
 534         * configure: Regenerate.
 535
 536 2006-12-21  Hans-Peter Nilsson  <hp@axis.com>
 537
 538         * acconfig.h: Remove.
 539         * config.in, configure: Regenerate.
 540
 541 2006-11-07  Thiemo Seufer  <ths@mips.com>
 542
 543         * dsp.igen (do_w_op): Fix compiler warning.
 544
 545 2006-08-29  Thiemo Seufer  <ths@mips.com>
 546             David Ung  <davidu@mips.com>
 547
 548         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
 549         sim_igen_machine.
 550         * configure: Regenerate.
 551         * mips.igen (model): Add smartmips.
 552         (MADDU): Increment ACX if carry.
 553         (do_mult): Clear ACX.
 554         (ROR,RORV): Add smartmips.
 555         (include): Include smartmips.igen.
 556         * sim-main.h (ACX): Set to REGISTERS[89].
 557         * smartmips.igen: New file.
 558
 559 2006-08-29  Thiemo Seufer  <ths@mips.com>
 560             David Ung  <davidu@mips.com>
 561
 562         * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
 563         mips3264r2.igen. Add missing dependency rules.
 564         * m16e.igen: Support for mips16e save/restore instructions.
 565
 566 2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
 567
 568         * configure: Regenerated.
 569
 570 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 571
 572         * configure: Regenerated.
 573
 574 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 575
 576         * configure: Regenerated.
 577
 578 2006-05-15 Chao-ying Fu  <fu@mips.com>
 579
 580         * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
 581
 582 2006-04-18  Nick Clifton  <nickc@redhat.com>
 583
 584         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
 585         statement.
 586
 587 2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
 588
 589         * configure: Regenerate.
 590
 591 2005-12-14  Chao-ying Fu  <fu@mips.com>
 592
 593         * Makefile.in (SIM_OBJS): Add dsp.o.
 594         (dsp.o): New dependency.
 595         (IGEN_INCLUDE): Add dsp.igen.
 596         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
 597         mipsisa64*-*-*): Add dsp to sim_igen_machine.
 598         * configure: Regenerate.
 599         * mips.igen: Add dsp model and include dsp.igen.
 600         (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
 601         because these instructions are extended in DSP ASE.
 602         * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
 603         adding 6 DSP accumulator registers and 1 DSP control register.
 604         (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
 605         AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
 606         DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
 607         DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
 608         DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
 609         DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
 610         DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
 611         DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
 612         DSPCR_CCOND_SMASK): New define.
 613         (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
 614         * dsp.c, dsp.igen: New files for MIPS DSP ASE.
 615
 616 2005-07-08  Ian Lance Taylor  <ian@airs.com>
 617
 618         * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
 619
 620 2005-06-16  David Ung  <davidu@mips.com>
 621             Nigel Stephens  <nigel@mips.com>
 622
 623         * mips.igen: New mips16e model and include m16e.igen.
 624         (check_u64): Add mips16e tag.
 625         * m16e.igen: New file for MIPS16e instructions.
 626         * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
 627         mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
 628         models.
 629         * configure: Regenerate.
 630
 631 2005-05-26  David Ung  <davidu@mips.com>
 632
 633         * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
 634         tags to all instructions which are applicable to the new ISAs.
 635         (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
 636         vr.igen.
 637         * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
 638         instructions.
 639         * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
 640         to mips.igen.
 641         * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
 642         * configure: Regenerate.
 643
 644 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
 645
 646         * configure: Regenerate.
 647
 648 2005-01-14  Andrew Cagney  <cagney@gnu.org>
 649
 650         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
 651         explicit call to AC_CONFIG_HEADER.
 652         * configure: Regenerate.
 653
 654 2005-01-12  Andrew Cagney  <cagney@gnu.org>
 655
 656         * configure.ac: Update to use ../common/common.m4.
 657         * configure: Re-generate.
 658
 659 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
 660
 661         * configure: Regenerated to track ../common/aclocal.m4 changes.
 662
 663 2005-01-07  Andrew Cagney  <cagney@gnu.org>
 664
 665         * configure.ac: Rename configure.in, require autoconf 2.59.
 666         * configure: Re-generate.
 667
 668 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
 669
 670         * configure: Regenerate for ../common/aclocal.m4 update.
 671
 672 2004-09-24  Monika Chaddha  <monika@acmet.com>
 673
 674         Committed by Andrew Cagney.
 675         * m16.igen (CMP, CMPI): Fix assembler.
 676
 677 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
 678
 679         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
 680         * configure: Regenerate.
 681
 682 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
 683
 684         * configure.in (sim_m16_machine): Include mipsIII.
 685         * configure: Regenerate.
 686
 687 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 688
 689         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
 690         from COP0_BADVADDR.
 691         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
 692
 693 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
 694
 695         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
 696
 697 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 698
 699         * mips.igen (check_fmt): Remove.
 700         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
 701         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
 702         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
 703         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
 704         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
 705         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
 706         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 707         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
 708         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
 709         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
 710
 711 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 712
 713         * sb1.igen (check_sbx): New function.
 714         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
 715
 716 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
 717             Richard Sandiford  <rsandifo@redhat.com>
 718
 719         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
 720         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
 721         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
 722         separate implementations for mipsIV and mipsV.  Use new macros to
 723         determine whether the restrictions apply.
 724
 725 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
 726
 727         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
 728         (check_mult_hilo): Improve comments.
 729         (check_div_hilo): Likewise.  Also, fork off a new version
 730         to handle mips32/mips64 (since there are no hazards to check
 731         in MIPS32/MIPS64).
 732
 733 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
 734
 735         * mips.igen (do_dmultx): Fix check for negative operands.
 736
 737 2003-05-16  Ian Lance Taylor  <ian@airs.com>
 738
 739         * Makefile.in (SHELL): Make sure this is defined.
 740         (various): Use $(SHELL) whenever we invoke move-if-change.
 741
 742 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
 743
 744         * cp1.c: Tweak attribution slightly.
 745         * cp1.h: Likewise.
 746         * mdmx.c: Likewise.
 747         * mdmx.igen: Likewise.
 748         * mips3d.igen: Likewise.
 749         * sb1.igen: Likewise.
 750
 751 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
 752
 753         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
 754         unsigned operands.
 755
 756 2003-02-27  Andrew Cagney  <cagney@redhat.com>
 757
 758         * interp.c (sim_open): Rename _bfd to bfd.
 759         (sim_create_inferior): Ditto.
 760
 761 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 762
 763         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
 764
 765 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 766
 767         * mips.igen (EI, DI): Remove.
 768
 769 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
 770
 771         * Makefile.in (tmp-run-multi): Fix mips16 filter.
 772
 773 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
 774             Andrew Cagney  <ac131313@redhat.com>
 775             Gavin Romig-Koch  <gavin@redhat.com>
 776             Graydon Hoare  <graydon@redhat.com>
 777             Aldy Hernandez  <aldyh@redhat.com>
 778             Dave Brolley  <brolley@redhat.com>
 779             Chris Demetriou  <cgd@broadcom.com>
 780
 781         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
 782         (sim_mach_default): New variable.
 783         (mips64vr-*-*, mips64vrel-*-*): New configurations.
 784         Add a new simulator generator, MULTI.
 785         * configure: Regenerate.
 786         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
 787         (multi-run.o): New dependency.
 788         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
 789         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
 790         (tmp-multi): Combine them.
 791         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
 792         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
 793         (distclean-extra): New rule.
 794         * sim-main.h: Include bfd.h.
 795         (MIPS_MACH): New macro.
 796         * mips.igen (vr4120, vr5400, vr5500): New models.
 797         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
 798         * vr.igen: Replace with new version.
 799
 800 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
 801
 802         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
 803         * configure: Regenerate.
 804
 805 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
 806
 807         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
 808         * mips.igen: Remove all invocations of check_branch_bug and
 809         mark_branch_bug.
 810
 811 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
 812
 813         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
 814
 815 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
 816
 817         * mips.igen (do_load_double, do_store_double): New functions.
 818         (LDC1, SDC1): Rename to...
 819         (LDC1b, SDC1b): respectively.
 820         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
 821
 822 2002-07-29  Michael Snyder  <msnyder@redhat.com>
 823
 824         * cp1.c (fp_recip2): Modify initialization expression so that
 825         GCC will recognize it as constant.
 826
 827 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
 828
 829         * mdmx.c (SD_): Delete.
 830         (Unpredictable): Re-define, for now, to directly invoke
 831         unpredictable_action().
 832         (mdmx_acc_op): Fix error in .ob immediate handling.
 833
 834 2002-06-18  Andrew Cagney  <cagney@redhat.com>
 835
 836         * interp.c (sim_firmware_command): Initialize `address'.
 837
 838 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
 839
 840         * configure: Regenerated to track ../common/aclocal.m4 changes.
 841
 842 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
 843             Ed Satterthwaite  <ehs@broadcom.com>
 844
 845         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
 846         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
 847         * mips.igen: Include mips3d.igen.
 848         (mips3d): New model name for MIPS-3D ASE instructions.
 849         (CVT.W.fmt): Don't use this instruction for word (source) format
 850         instructions.
 851         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
 852         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
 853         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
 854         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
 855         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
 856         (RSquareRoot1, RSquareRoot2): New macros.
 857         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
 858         (fp_rsqrt2): New functions.
 859         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
 860         * configure: Regenerate.
 861
 862 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
 863             Ed Satterthwaite  <ehs@broadcom.com>
 864
 865         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
 866         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
 867         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
 868         (convert): Note that this function is not used for paired-single
 869         format conversions.
 870         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
 871         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
 872         (check_fmt_p): Enable paired-single support.
 873         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
 874         (PUU.PS): New instructions.
 875         (CVT.S.fmt): Don't use this instruction for paired-single format
 876         destinations.
 877         * sim-main.h (FP_formats): New value 'fmt_ps.'
 878         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
 879         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
 880
 881 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 882
 883         * mips.igen: Fix formatting of function calls in
 884         many FP operations.
 885
 886 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 887
 888         * mips.igen (MOVN, MOVZ): Trace result.
 889         (TNEI): Print "tnei" as the opcode name in traces.
 890         (CEIL.W): Add disassembly string for traces.
 891         (RSQRT.fmt): Make location of disassembly string consistent
 892         with other instructions.
 893
 894 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 895
 896         * mips.igen (X): Delete unused function.
 897
 898 2002-06-08  Andrew Cagney  <cagney@redhat.com>
 899
 900         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
 901
 902 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 903             Ed Satterthwaite  <ehs@broadcom.com>
 904
 905         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
 906         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
 907         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
 908         (fp_nmsub): New prototypes.
 909         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
 910         (NegMultiplySub): New defines.
 911         * mips.igen (RSQRT.fmt): Use RSquareRoot().
 912         (MADD.D, MADD.S): Replace with...
 913         (MADD.fmt): New instruction.
 914         (MSUB.D, MSUB.S): Replace with...
 915         (MSUB.fmt): New instruction.
 916         (NMADD.D, NMADD.S): Replace with...
 917         (NMADD.fmt): New instruction.
 918         (NMSUB.D, MSUB.S): Replace with...
 919         (NMSUB.fmt): New instruction.
 920
 921 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 922             Ed Satterthwaite  <ehs@broadcom.com>
 923
 924         * cp1.c: Fix more comment spelling and formatting.
 925         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
 926         (denorm_mode): New function.
 927         (fpu_unary, fpu_binary): Round results after operation, collect
 928         status from rounding operations, and update the FCSR.
 929         (convert): Collect status from integer conversions and rounding
 930         operations, and update the FCSR.  Adjust NaN values that result
 931         from conversions.  Convert to use sim_io_eprintf rather than
 932         fprintf, and remove some debugging code.
 933         * cp1.h (fenr_FS): New define.
 934
 935 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 936
 937         * cp1.c (convert): Remove unusable debugging code, and move MIPS
 938         rounding mode to sim FP rounding mode flag conversion code into...
 939         (rounding_mode): New function.
 940
 941 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 942
 943         * cp1.c: Clean up formatting of a few comments.
 944         (value_fpr): Reformat switch statement.
 945
 946 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
 947             Ed Satterthwaite  <ehs@broadcom.com>
 948
 949         * cp1.h: New file.
 950         * sim-main.h: Include cp1.h.
 951         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
 952         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
 953         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
 954         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
 955         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
 956         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
 957         * cp1.c: Don't include sim-fpu.h; already included by
 958         sim-main.h.  Clean up formatting of some comments.
 959         (NaN, Equal, Less): Remove.
 960         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
 961         (fp_cmp): New functions.
 962         * mips.igen (do_c_cond_fmt): Remove.
 963         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
 964         Compare.  Add result tracing.
 965         (CxC1): Remove, replace with...
 966         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
 967         (DMxC1): Remove, replace with...
 968         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
 969         (MxC1): Remove, replace with...
 970         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
 971
 972 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 973
 974         * sim-main.h (FGRIDX): Remove, replace all uses with...
 975         (FGR_BASE): New macro.
 976         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
 977         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
 978         (NR_FGR, FGR): Likewise.
 979         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
 980         * mips.igen: Likewise.
 981
 982 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 983
 984         * cp1.c: Add an FSF Copyright notice to this file.
 985
 986 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 987             Ed Satterthwaite  <ehs@broadcom.com>
 988
 989         * cp1.c (Infinity): Remove.
 990         * sim-main.h (Infinity): Likewise.
 991
 992         * cp1.c (fp_unary, fp_binary): New functions.
 993         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
 994         (fp_sqrt): New functions, implemented in terms of the above.
 995         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
 996         (Recip, SquareRoot): Remove (replaced by functions above).
 997         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
 998         (fp_recip, fp_sqrt): New prototypes.
 999         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1000         (Recip, SquareRoot): Replace prototypes with #defines which
1001         invoke the functions above.
1002
1003 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1004
1005         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1006         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1007         file, remove PARAMS from prototypes.
1008         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
1009         simulator state arguments.
1010         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
1011         pass simulator state arguments.
1012         * cp1.c (SD): Redefine as CPU_STATE(cpu).
1013         (store_fpr, convert): Remove 'sd' argument.
1014         (value_fpr): Likewise.  Convert to use 'SD' instead.
1015
1016 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1017
1018         * cp1.c (Min, Max): Remove #if 0'd functions.
1019         * sim-main.h (Min, Max): Remove.
1020
1021 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1022
1023         * cp1.c: fix formatting of switch case and default labels.
1024         * interp.c: Likewise.
1025         * sim-main.c: Likewise.
1026
1027 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1028
1029         * cp1.c: Clean up comments which describe FP formats.
1030          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1031
1032 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1033             Ed Satterthwaite  <ehs@broadcom.com>
1034
1035         * configure.in (mipsisa64sb1*-*-*): New target for supporting
1036         Broadcom SiByte SB-1 processor configurations.
1037         * configure: Regenerate.
1038         * sb1.igen: New file.
1039         * mips.igen: Include sb1.igen.
1040         (sb1): New model.
1041         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1042         * mdmx.igen: Add "sb1" model to all appropriate functions and
1043         instructions.
1044         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1045         (ob_func, ob_acc): Reference the above.
1046         (qh_acc): Adjust to keep the same size as ob_acc.
1047         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1048         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1049
1050 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1051
1052         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1053
1054 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
1055             Ed Satterthwaite  <ehs@broadcom.com>
1056
1057         * mips.igen (mdmx): New (pseudo-)model.
1058         * mdmx.c, mdmx.igen: New files.
1059         * Makefile.in (SIM_OBJS): Add mdmx.o.
1060         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1061         New typedefs.
1062         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1063         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1064         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1065         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1066         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1067         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1068         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1069         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1070         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1071         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1072         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1073         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1074         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1075         (qh_fmtsel): New macros.
1076         (_sim_cpu): New member "acc".
1077         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1078         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1079
1080 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1081
1082         * interp.c: Use 'deprecated' rather than 'depreciated.'
1083         * sim-main.h: Likewise.
1084
1085 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1086
1087         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1088         which wouldn't compile anyway.
1089         * sim-main.h (unpredictable_action): New function prototype.
1090         (Unpredictable): Define to call igen function unpredictable().
1091         (NotWordValue): New macro to call igen function not_word_value().
1092         (UndefinedResult): Remove.
1093         * interp.c (undefined_result): Remove.
1094         (unpredictable_action): New function.
1095         * mips.igen (not_word_value, unpredictable): New functions.
1096         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1097         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1098         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1099         NotWordValue() to check for unpredictable inputs, then
1100         Unpredictable() to handle them.
1101
1102 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
1103
1104         * mips.igen: Fix formatting of calls to Unpredictable().
1105
1106 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
1107
1108         * interp.c (sim_open): Revert previous change.
1109
1110 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
1111
1112         * interp.c (sim_open): Disable chunk of code that wrote code in
1113         vector table entries.
1114
1115 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1116
1117         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1118         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1119         unused definitions.
1120
1121 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1122
1123         * cp1.c: Fix many formatting issues.
1124
1125 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1126
1127         * cp1.c (fpu_format_name): New function to replace...
1128         (DOFMT): This.  Delete, and update all callers.
1129         (fpu_rounding_mode_name): New function to replace...
1130         (RMMODE): This.  Delete, and update all callers.
1131
1132 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1133
1134         * interp.c: Move FPU support routines from here to...
1135         * cp1.c: Here.  New file.
1136         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1137         (cp1.o): New target.
1138
1139 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
1140
1141         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1142         * mips.igen (mips32, mips64): New models, add to all instructions
1143         and functions as appropriate.
1144         (loadstore_ea, check_u64): New variant for model mips64.
1145         (check_fmt_p): New variant for models mipsV and mips64, remove
1146         mipsV model marking fro other variant.
1147         (SLL) Rename to...
1148         (SLLa) this.
1149         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1150         for mips32 and mips64.
1151         (DCLO, DCLZ): New instructions for mips64.
1152
1153 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
1154
1155         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1156         immediate or code as a hex value with the "%#lx" format.
1157         (ANDI): Likewise, and fix printed instruction name.
1158
1159 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1160
1161         * sim-main.h (UndefinedResult, Unpredictable): New macros
1162         which currently do nothing.
1163
1164 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1165
1166         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1167         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1168         (status_CU3): New definitions.
1169
1170         * sim-main.h (ExceptionCause): Add new values for MIPS32
1171         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
1172         for DebugBreakPoint and NMIReset to note their status in
1173         MIPS32 and MIPS64.
1174         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1175         (SignalExceptionCacheErr): New exception macros.
1176
1177 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1178
1179         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1180         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1181         is always enabled.
1182         (SignalExceptionCoProcessorUnusable): Take as argument the
1183         unusable coprocessor number.
1184
1185 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1186
1187         * mips.igen: Fix formatting of all SignalException calls.
1188
1189 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1190
1191         * sim-main.h (SIGNEXTEND): Remove.
1192
1193 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1194
1195         * mips.igen: Remove gencode comment from top of file, fix
1196         spelling in another comment.
1197
1198 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1199
1200         * mips.igen (check_fmt, check_fmt_p): New functions to check
1201         whether specific floating point formats are usable.
1202         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1203         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1204         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1205         Use the new functions.
1206         (do_c_cond_fmt): Remove format checks...
1207         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1208
1209 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1210
1211         * mips.igen: Fix formatting of check_fpu calls.
1212
1213 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1214
1215         * mips.igen (FLOOR.L.fmt): Store correct destination register.
1216
1217 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1218
1219         * mips.igen: Remove whitespace at end of lines.
1220
1221 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1222
1223         * mips.igen (loadstore_ea): New function to do effective
1224         address calculations.
1225         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1226         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1227         CACHE): Use loadstore_ea to do effective address computations.
1228
1229 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1230
1231         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1232         * mips.igen (LL, CxC1, MxC1): Likewise.
1233
1234 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1235
1236         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1237         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1238         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1239         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1240         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1241         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1242         Don't split opcode fields by hand, use the opcode field values
1243         provided by igen.
1244
1245 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1246
1247         * mips.igen (do_divu): Fix spacing.
1248
1249         * mips.igen (do_dsllv): Move to be right before DSLLV,
1250         to match the rest of the do_<shift> functions.
1251
1252 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1253
1254         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1255         DSRL32, do_dsrlv): Trace inputs and results.
1256
1257 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1258
1259         * mips.igen (CACHE): Provide instruction-printing string.
1260
1261         * interp.c (signal_exception): Comment tokens after #endif.
1262
1263 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1264
1265         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1266         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1267         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1268         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1269         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1270         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1271         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1272         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1273
1274 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1275
1276         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1277         instruction-printing string.
1278         (LWU): Use '64' as the filter flag.
1279
1280 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1281
1282         * mips.igen (SDXC1): Fix instruction-printing string.
1283
1284 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1285
1286         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1287         filter flags "32,f".
1288
1289 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1290
1291         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1292         as the filter flag.
1293
1294 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1295
1296         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1297         add a comma) so that it more closely match the MIPS ISA
1298         documentation opcode partitioning.
1299         (PREF): Put useful names on opcode fields, and include
1300         instruction-printing string.
1301
1302 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1303
1304         * mips.igen (check_u64): New function which in the future will
1305         check whether 64-bit instructions are usable and signal an
1306         exception if not.  Currently a no-op.
1307         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1308         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1309         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1310         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1311
1312         * mips.igen (check_fpu): New function which in the future will
1313         check whether FPU instructions are usable and signal an exception
1314         if not.  Currently a no-op.
1315         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1316         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1317         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1318         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1319         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1320         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1321         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1322         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1323
1324 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1325
1326         * mips.igen (do_load_left, do_load_right): Move to be immediately
1327         following do_load.
1328         (do_store_left, do_store_right): Move to be immediately following
1329         do_store.
1330
1331 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1332
1333         * mips.igen (mipsV): New model name.  Also, add it to
1334         all instructions and functions where it is appropriate.
1335
1336 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
1337
1338         * mips.igen: For all functions and instructions, list model
1339         names that support that instruction one per line.
1340
1341 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1342
1343         * mips.igen: Add some additional comments about supported
1344         models, and about which instructions go where.
1345         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1346         order as is used in the rest of the file.
1347
1348 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1349
1350         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1351         indicating that ALU32_END or ALU64_END are there to check
1352         for overflow.
1353         (DADD): Likewise, but also remove previous comment about
1354         overflow checking.
1355
1356 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1357
1358         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1359         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1360         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1361         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1362         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1363         fields (i.e., add and move commas) so that they more closely
1364         match the MIPS ISA documentation opcode partitioning.
1365
1366 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1367
1368         * mips.igen (ADDI): Print immediate value.
1369         (BREAK): Print code.
1370         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1371         (SLL): Print "nop" specially, and don't run the code
1372         that does the shift for the "nop" case.
1373
1374 2001-11-17  Fred Fish  <fnf@redhat.com>
1375
1376         * sim-main.h (float_operation): Move enum declaration outside
1377         of _sim_cpu struct declaration.
1378
1379 2001-04-12  Jim Blandy  <jimb@redhat.com>
1380
1381         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1382         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
1383         set of the FCSR.
1384         * sim-main.h (COCIDX): Remove definition; this isn't supported by
1385         PENDING_FILL, and you can get the intended effect gracefully by
1386         calling PENDING_SCHED directly.
1387
1388 2001-02-23  Ben Elliston  <bje@redhat.com>
1389
1390         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1391         already defined elsewhere.
1392
1393 2001-02-19  Ben Elliston  <bje@redhat.com>
1394
1395         * sim-main.h (sim_monitor): Return an int.
1396         * interp.c (sim_monitor): Add return values.
1397         (signal_exception): Handle error conditions from sim_monitor.
1398
1399 2001-02-08  Ben Elliston  <bje@redhat.com>
1400
1401         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1402         (store_memory): Likewise, pass cia to sim_core_write*.
1403
1404 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
1405
1406         On advice from Chris G. Demetriou <cgd@sibyte.com>:
1407         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1408
1409 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1410
1411         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1412         * Makefile.in: Don't delete *.igen when cleaning directory.
1413
1414 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1415
1416         * m16.igen (break): Call SignalException not sim_engine_halt.
1417
1418 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1419
1420         From Jason Eckhardt:
1421         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1422
1423 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1424
1425         * mips.igen (MxC1, DMxC1): Fix printf formatting.
1426
1427 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
1428
1429         * mips.igen (do_dmultx): Fix typo.
1430
1431 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1432
1433         * configure: Regenerated to track ../common/aclocal.m4 changes.
1434
1435 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1436
1437         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1438
1439 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
1440
1441         * sim-main.h (GPR_CLEAR): Define macro.
1442
1443 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1444
1445         * interp.c (decode_coproc): Output long using %lx and not %s.
1446
1447 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
1448
1449         * interp.c (sim_open): Sort & extend dummy memory regions for
1450         --board=jmr3904 for eCos.
1451
1452 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
1453
1454         * configure: Regenerated.
1455
1456 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
1457
1458         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1459         calls, conditional on the simulator being in verbose mode.
1460
1461 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
1462
1463         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1464         cache don't get ReservedInstruction traps.
1465
1466 1999-11-29  Mark Salter  <msalter@cygnus.com>
1467
1468         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1469         to clear status bits in sdisr register. This is how the hardware works.
1470
1471         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1472         being used by cygmon.
1473
1474 1999-11-11  Andrew Haley  <aph@cygnus.com>
1475
1476         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1477         instructions.
1478
1479 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
1480
1481         * mips.igen (MULT): Correct previous mis-applied patch.
1482
1483 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
1484
1485         * mips.igen (delayslot32): Handle sequence like
1486         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1487         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1488         (MULT): Actually pass the third register...
1489
1490 1999-09-03  Mark Salter  <msalter@cygnus.com>
1491
1492         * interp.c (sim_open): Added more memory aliases for additional
1493         hardware being touched by cygmon on jmr3904 board.
1494
1495 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1496
1497         * configure: Regenerated to track ../common/aclocal.m4 changes.
1498
1499 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1500
1501         * interp.c (sim_store_register): Handle case where client - GDB -
1502         specifies that a 4 byte register is 8 bytes in size.
1503         (sim_fetch_register): Ditto.
1504
1505 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
1506
1507         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1508         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1509         (idt_monitor_base): Base address for IDT monitor traps.
1510         (pmon_monitor_base): Ditto for PMON.
1511         (lsipmon_monitor_base): Ditto for LSI PMON.
1512         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1513         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1514         (sim_firmware_command): New function.
1515         (mips_option_handler): Call it for OPTION_FIRMWARE.
1516         (sim_open): Allocate memory for idt_monitor region.  If "--board"
1517         option was given, add no monitor by default.  Add BREAK hooks only if
1518         monitors are also there.
1519
1520 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1521
1522         * interp.c (sim_monitor): Flush output before reading input.
1523
1524 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1525
1526         * tconfig.in (SIM_HANDLES_LMA): Always define.
1527
1528 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1529
1530         From Mark Salter <msalter@cygnus.com>:
1531         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
1532         (sim_open): Add setup for BSP board.
1533
1534 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1535
1536         * mips.igen (MULT, MULTU): Add syntax for two operand version.
1537         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
1538         them as unimplemented.
1539
1540 1999-05-08  Felix Lee  <flee@cygnus.com>
1541
1542         * configure: Regenerated to track ../common/aclocal.m4 changes.
1543
1544 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
1545
1546         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1547
1548 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1549
1550         * configure.in: Any mips64vr5*-*-* target should have
1551         -DTARGET_ENABLE_FR=1.
1552         (default_endian): Any mips64vr*el-*-* target should default to
1553         LITTLE_ENDIAN.
1554         * configure: Re-generate.
1555
1556 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
1557
1558         * mips.igen (ldl): Extend from _16_, not 32.
1559
1560 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
1561
1562         * interp.c (sim_store_register): Force registers written to by GDB
1563         into an un-interpreted state.
1564
1565 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
1566
1567         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1568         CPU, start periodic background I/O polls.
1569         (tx3904sio_poll): New function: periodic I/O poller.
1570
1571 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
1572
1573         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1574
1575 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
1576
1577         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1578         case statement.
1579
1580 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
1581
1582         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1583         (load_word): Call SIM_CORE_SIGNAL hook on error.
1584         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1585         starting.  For exception dispatching, pass PC instead of NULL_CIA.
1586         (decode_coproc): Use COP0_BADVADDR to store faulting address.
1587         * sim-main.h (COP0_BADVADDR): Define.
1588         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1589         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1590         (_sim_cpu): Add exc_* fields to store register value snapshots.
1591         * mips.igen (*): Replace memory-related SignalException* calls
1592         with references to SIM_CORE_SIGNAL hook.
1593
1594         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1595         fix.
1596         * sim-main.c (*): Minor warning cleanups.
1597
1598 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
1599
1600         * m16.igen (DADDIU5): Correct type-o.
1601
1602 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
1603
1604         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1605         variables.
1606
1607 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
1608
1609         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1610         to include path.
1611         (interp.o): Add dependency on itable.h
1612         (oengine.c, gencode): Delete remaining references.
1613         (BUILT_SRC_FROM_GEN): Clean up.
1614
1615 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
1616
1617         * vr4run.c: New.
1618         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1619         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1620         tmp-run-hack) : New.
1621         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1622         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1623         Drop the "64" qualifier to get the HACK generator working.
1624         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
1625         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1626         qualifier to get the hack generator working.
1627         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1628         (DSLL): Use do_dsll.
1629         (DSLLV): Use do_dsllv.
1630         (DSRA): Use do_dsra.
1631         (DSRL): Use do_dsrl.
1632         (DSRLV): Use do_dsrlv.
1633         (BC1): Move *vr4100 to get the HACK generator working.
1634         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1635         get the HACK generator working.
1636         (MACC) Rename to get the HACK generator working.
1637         (DMACC,MACCS,DMACCS): Add the 64.
1638
1639 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
1640
1641         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1642         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1643
1644 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
1645
1646     * mips/interp.c (DEBUG): Cleanups.
1647
1648 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
1649
1650         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1651         (tx3904sio_tickle): fflush after a stdout character output.
1652
1653 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
1654
1655         * interp.c (sim_close): Uninstall modules.
1656
1657 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1658
1659         * sim-main.h, interp.c (sim_monitor): Change to global
1660         function.
1661
1662 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1663
1664         * configure.in (vr4100): Only include vr4100 instructions in
1665         simulator.
1666         * configure: Re-generate.
1667         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1668
1669 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1670
1671         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1672         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1673         true alternative.
1674
1675         * configure.in (sim_default_gen, sim_use_gen): Replace with
1676         sim_gen.
1677         (--enable-sim-igen): Delete config option. Always using IGEN.
1678         * configure: Re-generate.
1679
1680         * Makefile.in (gencode): Kill, kill, kill.
1681         * gencode.c: Ditto.
1682
1683 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1684
1685         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1686         bit mips16 igen simulator.
1687         * configure: Re-generate.
1688
1689         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1690         as part of vr4100 ISA.
1691         * vr.igen: Mark all instructions as 64 bit only.
1692
1693 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1694
1695         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1696         Pacify GCC.
1697
1698 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1699
1700         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1701         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
1702         * configure: Re-generate.
1703
1704         * m16.igen (BREAK): Define breakpoint instruction.
1705         (JALX32): Mark instruction as mips16 and not r3900.
1706         * mips.igen (C.cond.fmt): Fix typo in instruction format.
1707
1708         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1709
1710 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1711
1712         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1713         insn as a debug breakpoint.
1714
1715         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1716         pending.slot_size.
1717         (PENDING_SCHED): Clean up trace statement.
1718         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1719         (PENDING_FILL): Delay write by only one cycle.
1720         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1721
1722         * sim-main.c (pending_tick): Clean up trace statements. Add trace
1723         of pending writes.
1724         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1725         32 & 64.
1726         (pending_tick): Move incrementing of index to FOR statement.
1727         (pending_tick): Only update PENDING_OUT after a write has occured.
1728
1729         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
1730         build simulator.
1731         * configure: Re-generate.
1732
1733         * interp.c (sim_engine_run OLD): Delete explicit call to
1734         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1735
1736 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
1737
1738         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1739         interrupt level number to match changed SignalExceptionInterrupt
1740         macro.
1741
1742 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
1743
1744         * interp.c: #include "itable.h" if WITH_IGEN.
1745         (get_insn_name): New function.
1746         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1747         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1748
1749 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
1750
1751         * configure: Rebuilt to inhale new common/aclocal.m4.
1752
1753 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
1754
1755         * dv-tx3904sio.c: Include sim-assert.h.
1756
1757 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
1758
1759         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1760         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1761         Reorganize target-specific sim-hardware checks.
1762         * configure: rebuilt.
1763         * interp.c (sim_open): For tx39 target boards, set
1764         OPERATING_ENVIRONMENT, add tx3904sio devices.
1765         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1766         ROM executables.  Install dv-sockser into sim-modules list.
1767
1768         * dv-tx3904irc.c: Compiler warning clean-up.
1769         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
1770         frequent hw-trace messages.
1771
1772 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1773
1774         * vr.igen (MulAcc): Identify as a vr4100 specific function.
1775
1776 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1777
1778         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1779
1780         * vr.igen: New file.
1781         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1782         * mips.igen: Define vr4100 model. Include vr.igen.
1783 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
1784
1785         * mips.igen (check_mf_hilo): Correct check.
1786
1787 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1788
1789         * sim-main.h (interrupt_event): Add prototype.
1790
1791         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1792         register_ptr, register_value.
1793         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1794
1795         * sim-main.h (tracefh): Make extern.
1796
1797 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
1798
1799         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1800         Reduce unnecessarily high timer event frequency.
1801         * dv-tx3904cpu.c: Ditto for interrupt event.
1802
1803 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
1804
1805         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1806         to allay warnings.
1807         (interrupt_event): Made non-static.
1808
1809         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1810         interchange of configuration values for external vs. internal
1811         clock dividers.
1812
1813 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
1814
1815         * mips.igen (BREAK): Moved code to here for
1816         simulator-reserved break instructions.
1817         * gencode.c (build_instruction): Ditto.
1818         * interp.c (signal_exception): Code moved from here.  Non-
1819         reserved instructions now use exception vector, rather
1820         than halting sim.
1821         * sim-main.h: Moved magic constants to here.
1822
1823 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
1824
1825         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1826         register upon non-zero interrupt event level, clear upon zero
1827         event value.
1828         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1829         by passing zero event value.
1830         (*_io_{read,write}_buffer): Endianness fixes.
1831         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1832         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1833
1834         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1835         serial I/O and timer module at base address 0xFFFF0000.
1836
1837 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
1838
1839         * mips.igen (SWC1) : Correct the handling of ReverseEndian
1840         and BigEndianCPU.
1841
1842 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
1843
1844         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1845         parts.
1846         * configure: Update.
1847
1848 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
1849
1850         * dv-tx3904tmr.c: New file - implements tx3904 timer.
1851         * dv-tx3904{irc,cpu}.c: Mild reformatting.
1852         * configure.in: Include tx3904tmr in hw_device list.
1853         * configure: Rebuilt.
1854         * interp.c (sim_open): Instantiate three timer instances.
1855         Fix address typo of tx3904irc instance.
1856
1857 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
1858
1859         * interp.c (signal_exception): SystemCall exception now uses
1860         the exception vector.
1861
1862 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
1863
1864         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1865         to allay warnings.
1866
1867 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1868
1869         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1870
1871 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1872
1873         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1874
1875         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1876         sim-main.h. Declare a struct hw_descriptor instead of struct
1877         hw_device_descriptor.
1878
1879 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1880
1881         * mips.igen (do_store_left, do_load_left): Compute nr of left and
1882         right bits and then re-align left hand bytes to correct byte
1883         lanes.  Fix incorrect computation in do_store_left when loading
1884         bytes from second word.
1885
1886 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1887
1888         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1889         * interp.c (sim_open): Only create a device tree when HW is
1890         enabled.
1891
1892         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1893         * interp.c (signal_exception): Ditto.
1894
1895 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
1896
1897         * gencode.c: Mark BEGEZALL as LIKELY.
1898
1899 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1900
1901         * sim-main.h (ALU32_END): Sign extend 32 bit results.
1902         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1903
1904 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
1905
1906         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1907         modules.  Recognize TX39 target with "mips*tx39" pattern.
1908         * configure: Rebuilt.
1909         * sim-main.h (*): Added many macros defining bits in
1910         TX39 control registers.
1911         (SignalInterrupt): Send actual PC instead of NULL.
1912         (SignalNMIReset): New exception type.
1913         * interp.c (board): New variable for future use to identify
1914         a particular board being simulated.
1915         (mips_option_handler,mips_options): Added "--board" option.
1916         (interrupt_event): Send actual PC.
1917         (sim_open): Make memory layout conditional on board setting.
1918         (signal_exception): Initial implementation of hardware interrupt
1919         handling.  Accept another break instruction variant for simulator
1920         exit.
1921         (decode_coproc): Implement RFE instruction for TX39.
1922         (mips.igen): Decode RFE instruction as such.
1923         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1924         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1925         bbegin to implement memory map.
1926         * dv-tx3904cpu.c: New file.
1927         * dv-tx3904irc.c: New file.
1928
1929 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
1930
1931         * mips.igen (check_mt_hilo): Create a separate r3900 version.
1932
1933 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
1934
1935         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
1936         with calls to check_div_hilo.
1937
1938 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
1939
1940         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1941         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1942         Add special r3900 version of do_mult_hilo.
1943         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1944         with calls to check_mult_hilo.
1945         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1946         with calls to check_div_hilo.
1947
1948 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1949
1950         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1951         Document a replacement.
1952
1953 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
1954
1955         * interp.c (sim_monitor): Make mon_printf work.
1956
1957 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
1958
1959         * sim-main.h (INSN_NAME): New arg `cpu'.
1960
1961 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
1962
1963         * configure: Regenerated to track ../common/aclocal.m4 changes.
1964
1965 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
1966
1967         * configure: Regenerated to track ../common/aclocal.m4 changes.
1968         * config.in: Ditto.
1969
1970 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
1971
1972         * acconfig.h: New file.
1973         * configure.in: Reverted change of Apr 24; use sinclude again.
1974
1975 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
1976
1977         * configure: Regenerated to track ../common/aclocal.m4 changes.
1978         * config.in: Ditto.
1979
1980 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
1981
1982         * configure.in: Don't call sinclude.
1983
1984 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
1985
1986         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1987
1988 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1989
1990         * mips.igen (ERET): Implement.
1991
1992         * interp.c (decode_coproc): Return sign-extended EPC.
1993
1994         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1995
1996         * interp.c (signal_exception): Do not ignore Trap.
1997         (signal_exception): On TRAP, restart at exception address.
1998         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1999         (signal_exception): Update.
2000         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2001         so that TRAP instructions are caught.
2002
2003 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2004
2005         * sim-main.h (struct hilo_access, struct hilo_history): Define,
2006         contains HI/LO access history.
2007         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2008         (HIACCESS, LOACCESS): Delete, replace with
2009         (HIHISTORY, LOHISTORY): New macros.
2010         (CHECKHILO): Delete all, moved to mips.igen
2011
2012         * gencode.c (build_instruction): Do not generate checks for
2013         correct HI/LO register usage.
2014
2015         * interp.c (old_engine_run): Delete checks for correct HI/LO
2016         register usage.
2017
2018         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2019         check_mf_cycles): New functions.
2020         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2021         do_divu, domultx, do_mult, do_multu): Use.
2022
2023         * tx.igen ("madd", "maddu"): Use.
2024
2025 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2026
2027         * mips.igen (DSRAV): Use function do_dsrav.
2028         (SRAV): Use new function do_srav.
2029
2030         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2031         (B): Sign extend 11 bit immediate.
2032         (EXT-B*): Shift 16 bit immediate left by 1.
2033         (ADDIU*): Don't sign extend immediate value.
2034
2035 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2036
2037         * m16run.c (sim_engine_run): Restore CIA after handling an event.
2038
2039         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2040         functions.
2041
2042         * mips.igen (delayslot32, nullify_next_insn): New functions.
2043         (m16.igen): Always include.
2044         (do_*): Add more tracing.
2045
2046         * m16.igen (delayslot16): Add NIA argument, could be called by a
2047         32 bit MIPS16 instruction.
2048
2049         * interp.c (ifetch16): Move function from here.
2050         * sim-main.c (ifetch16): To here.
2051
2052         * sim-main.c (ifetch16, ifetch32): Update to match current
2053         implementations of LH, LW.
2054         (signal_exception): Don't print out incorrect hex value of illegal
2055         instruction.
2056
2057 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2058
2059         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2060         instruction.
2061
2062         * m16.igen: Implement MIPS16 instructions.
2063
2064         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2065         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2066         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2067         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2068         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
2069         bodies of corresponding code from 32 bit insn to these.  Also used
2070         by MIPS16 versions of functions.
2071
2072         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2073         (IMEM16): Drop NR argument from macro.
2074
2075 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2076
2077         * Makefile.in (SIM_OBJS): Add sim-main.o.
2078
2079         * sim-main.h (address_translation, load_memory, store_memory,
2080         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2081         as INLINE_SIM_MAIN.
2082         (pr_addr, pr_uword64): Declare.
2083         (sim-main.c): Include when H_REVEALS_MODULE_P.
2084
2085         * interp.c (address_translation, load_memory, store_memory,
2086         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2087         from here.
2088         * sim-main.c: To here. Fix compilation problems.
2089
2090         * configure.in: Enable inlining.
2091         * configure: Re-config.
2092
2093 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2094
2095         * configure: Regenerated to track ../common/aclocal.m4 changes.
2096
2097 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2098
2099         * mips.igen: Include tx.igen.
2100         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2101         * tx.igen: New file, contains MADD and MADDU.
2102
2103         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2104         the hardwired constant `7'.
2105         (store_memory): Ditto.
2106         (LOADDRMASK): Move definition to sim-main.h.
2107
2108         mips.igen (MTC0): Enable for r3900.
2109         (ADDU): Add trace.
2110
2111         mips.igen (do_load_byte): Delete.
2112         (do_load, do_store, do_load_left, do_load_write, do_store_left,
2113         do_store_right): New functions.
2114         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2115
2116         configure.in: Let the tx39 use igen again.
2117         configure: Update.
2118
2119 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2120
2121         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2122         not an address sized quantity.  Return zero for cache sizes.
2123
2124 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2125
2126         * mips.igen (r3900): r3900 does not support 64 bit integer
2127         operations.
2128
2129 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
2130
2131         * configure.in (mipstx39*-*-*): Use gencode simulator rather
2132         than igen one.
2133         * configure : Rebuild.
2134
2135 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2136
2137         * configure: Regenerated to track ../common/aclocal.m4 changes.
2138
2139 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2140
2141         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2142
2143 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
2144
2145         * configure: Regenerated to track ../common/aclocal.m4 changes.
2146         * config.in: Regenerated to track ../common/aclocal.m4 changes.
2147
2148 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2149
2150         * configure: Regenerated to track ../common/aclocal.m4 changes.
2151
2152 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2153
2154         * interp.c (Max, Min): Comment out functions. Not yet used.
2155
2156 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2157
2158         * configure: Regenerated to track ../common/aclocal.m4 changes.
2159
2160 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
2161
2162         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2163         configurable settings for stand-alone simulator.
2164
2165         * configure.in: Added X11 search, just in case.
2166
2167         * configure: Regenerated.
2168
2169 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2170
2171         * interp.c (sim_write, sim_read, load_memory, store_memory):
2172         Replace sim_core_*_map with read_map, write_map, exec_map resp.
2173
2174 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2175
2176         * sim-main.h (GETFCC): Return an unsigned value.
2177
2178 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2179
2180         * mips.igen (DIV): Fix check for -1 / MIN_INT.
2181         (DADD): Result destination is RD not RT.
2182
2183 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2184
2185         * sim-main.h (HIACCESS, LOACCESS): Always define.
2186
2187         * mdmx.igen (Maxi, Mini): Rename Max, Min.
2188
2189         * interp.c (sim_info): Delete.
2190
2191 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
2192
2193         * interp.c (DECLARE_OPTION_HANDLER): Use it.
2194         (mips_option_handler): New argument `cpu'.
2195         (sim_open): Update call to sim_add_option_table.
2196
2197 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2198
2199         * mips.igen (CxC1): Add tracing.
2200
2201 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2202
2203         * sim-main.h (Max, Min): Declare.
2204
2205         * interp.c (Max, Min): New functions.
2206
2207         * mips.igen (BC1): Add tracing.
2208
2209 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
2210
2211         * interp.c Added memory map for stack in vr4100
2212
2213 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
2214
2215         * interp.c (load_memory): Add missing "break"'s.
2216
2217 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2218
2219         * interp.c (sim_store_register, sim_fetch_register): Pass in
2220         length parameter.  Return -1.
2221
2222 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
2223
2224         * interp.c: Added hardware init hook, fixed warnings.
2225
2226 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2227
2228         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2229
2230 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2231
2232         * interp.c (ifetch16): New function.
2233
2234         * sim-main.h (IMEM32): Rename IMEM.
2235         (IMEM16_IMMED): Define.
2236         (IMEM16): Define.
2237         (DELAY_SLOT): Update.
2238
2239         * m16run.c (sim_engine_run): New file.
2240
2241         * m16.igen: All instructions except LB.
2242         (LB): Call do_load_byte.
2243         * mips.igen (do_load_byte): New function.
2244         (LB): Call do_load_byte.
2245
2246         * mips.igen: Move spec for insn bit size and high bit from here.
2247         * Makefile.in (tmp-igen, tmp-m16): To here.
2248
2249         * m16.dc: New file, decode mips16 instructions.
2250
2251         * Makefile.in (SIM_NO_ALL): Define.
2252         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2253
2254 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2255
2256         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2257         point unit to 32 bit registers.
2258         * configure: Re-generate.
2259
2260 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2261
2262         * configure.in (sim_use_gen): Make IGEN the default simulator
2263         generator for generic 32 and 64 bit mips targets.
2264         * configure: Re-generate.
2265
2266 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2267
2268         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2269         bitsize.
2270
2271         * interp.c (sim_fetch_register, sim_store_register): Read/write
2272         FGR from correct location.
2273         (sim_open): Set size of FGR's according to
2274         WITH_TARGET_FLOATING_POINT_BITSIZE.
2275
2276         * sim-main.h (FGR): Store floating point registers in a separate
2277         array.
2278
2279 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2280
2281         * configure: Regenerated to track ../common/aclocal.m4 changes.
2282
2283 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2284
2285         * interp.c (ColdReset): Call PENDING_INVALIDATE.
2286
2287         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2288
2289         * interp.c (pending_tick): New function.  Deliver pending writes.
2290
2291         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2292         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2293         it can handle mixed sized quantites and single bits.
2294
2295 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2296
2297         * interp.c (oengine.h): Do not include when building with IGEN.
2298         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2299         (sim_info): Ditto for PROCESSOR_64BIT.
2300         (sim_monitor): Replace ut_reg with unsigned_word.
2301         (*): Ditto for t_reg.
2302         (LOADDRMASK): Define.
2303         (sim_open): Remove defunct check that host FP is IEEE compliant,
2304         using software to emulate floating point.
2305         (value_fpr, ...): Always compile, was conditional on HASFPU.
2306
2307 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2308
2309         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2310         size.
2311
2312         * interp.c (SD, CPU): Define.
2313         (mips_option_handler): Set flags in each CPU.
2314         (interrupt_event): Assume CPU 0 is the one being iterrupted.
2315         (sim_close): Do not clear STATE, deleted anyway.
2316         (sim_write, sim_read): Assume CPU zero's vm should be used for
2317         data transfers.
2318         (sim_create_inferior): Set the PC for all processors.
2319         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2320         argument.
2321         (mips16_entry): Pass correct nr of args to store_word, load_word.
2322         (ColdReset): Cold reset all cpu's.
2323         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2324         (sim_monitor, load_memory, store_memory, signal_exception): Use
2325         `CPU' instead of STATE_CPU.
2326
2327
2328         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2329         SD or CPU_.
2330
2331         * sim-main.h (signal_exception): Add sim_cpu arg.
2332         (SignalException*): Pass both SD and CPU to signal_exception.
2333         * interp.c (signal_exception): Update.
2334
2335         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2336         Ditto
2337         (sync_operation, prefetch, cache_op, store_memory, load_memory,
2338         address_translation): Ditto
2339         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2340
2341 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2342
2343         * configure: Regenerated to track ../common/aclocal.m4 changes.
2344
2345 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2346
2347         * interp.c (sim_engine_run): Add `nr_cpus' argument.
2348
2349         * mips.igen (model): Map processor names onto BFD name.
2350
2351         * sim-main.h (CPU_CIA): Delete.
2352         (SET_CIA, GET_CIA): Define
2353
2354 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2355
2356         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2357         regiser.
2358
2359         * configure.in (default_endian): Configure a big-endian simulator
2360         by default.
2361         * configure: Re-generate.
2362
2363 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
2364
2365         * configure: Regenerated to track ../common/aclocal.m4 changes.
2366
2367 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
2368
2369         * interp.c (sim_monitor): Handle Densan monitor outbyte
2370         and inbyte functions.
2371
2372 1997-12-29  Felix Lee  <flee@cygnus.com>
2373
2374         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2375
2376 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
2377
2378         * Makefile.in (tmp-igen): Arrange for $zero to always be
2379         reset to zero after every instruction.
2380
2381 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2382
2383         * configure: Regenerated to track ../common/aclocal.m4 changes.
2384         * config.in: Ditto.
2385
2386 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
2387
2388         * mips.igen (MSUB): Fix to work like MADD.
2389         * gencode.c (MSUB): Similarly.
2390
2391 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
2392
2393         * configure: Regenerated to track ../common/aclocal.m4 changes.
2394
2395 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2396
2397         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2398
2399 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2400
2401         * sim-main.h (sim-fpu.h): Include.
2402
2403         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2404         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2405         using host independant sim_fpu module.
2406
2407 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2408
2409         * interp.c (signal_exception): Report internal errors with SIGABRT
2410         not SIGQUIT.
2411
2412         * sim-main.h (C0_CONFIG): New register.
2413         (signal.h): No longer include.
2414
2415         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2416
2417 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
2418
2419         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2420
2421 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2422
2423         * mips.igen: Tag vr5000 instructions.
2424         (ANDI): Was missing mipsIV model, fix assembler syntax.
2425         (do_c_cond_fmt): New function.
2426         (C.cond.fmt): Handle mips I-III which do not support CC field
2427         separatly.
2428         (bc1): Handle mips IV which do not have a delaed FCC separatly.
2429         (SDR): Mask paddr when BigEndianMem, not the converse as specified
2430         in IV3.2 spec.
2431         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
2432         vr5000 which saves LO in a GPR separatly.
2433
2434         * configure.in (enable-sim-igen): For vr5000, select vr5000
2435         specific instructions.
2436         * configure: Re-generate.
2437
2438 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2439
2440         * Makefile.in (SIM_OBJS): Add sim-fpu module.
2441
2442         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2443         fmt_uninterpreted_64 bit cases to switch.  Convert to
2444         fmt_formatted,
2445
2446         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2447
2448         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2449         as specified in IV3.2 spec.
2450         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2451
2452 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2453
2454         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2455         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2456         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2457         PENDING_FILL versions of instructions.  Simplify.
2458         (X): New function.
2459         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2460         instructions.
2461         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2462         a signed value.
2463         (MTHI, MFHI): Disable code checking HI-LO.
2464
2465         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2466         global.
2467         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2468
2469 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2470
2471         * gencode.c (build_mips16_operands): Replace IPC with cia.
2472
2473         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2474         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2475         IPC to `cia'.
2476         (UndefinedResult): Replace function with macro/function
2477         combination.
2478         (sim_engine_run): Don't save PC in IPC.
2479
2480         * sim-main.h (IPC): Delete.
2481
2482
2483         * interp.c (signal_exception, store_word, load_word,
2484         address_translation, load_memory, store_memory, cache_op,
2485         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2486         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2487         current instruction address - cia - argument.
2488         (sim_read, sim_write): Call address_translation directly.
2489         (sim_engine_run): Rename variable vaddr to cia.
2490         (signal_exception): Pass cia to sim_monitor
2491
2492         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2493         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2494         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2495
2496         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2497         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2498         SIM_ASSERT.
2499
2500         * interp.c (signal_exception): Pass restart address to
2501         sim_engine_restart.
2502
2503         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2504         idecode.o): Add dependency.
2505
2506         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2507         Delete definitions
2508         (DELAY_SLOT): Update NIA not PC with branch address.
2509         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2510
2511         * mips.igen: Use CIA not PC in branch calculations.
2512         (illegal): Call SignalException.
2513         (BEQ, ADDIU): Fix assembler.
2514
2515 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2516
2517         * m16.igen (JALX): Was missing.
2518
2519         * configure.in (enable-sim-igen): New configuration option.
2520         * configure: Re-generate.
2521
2522         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2523
2524         * interp.c (load_memory, store_memory): Delete parameter RAW.
2525         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2526         bypassing {load,store}_memory.
2527
2528         * sim-main.h (ByteSwapMem): Delete definition.
2529
2530         * Makefile.in (SIM_OBJS): Add sim-memopt module.
2531
2532         * interp.c (sim_do_command, sim_commands): Delete mips specific
2533         commands.  Handled by module sim-options.
2534
2535         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2536         (WITH_MODULO_MEMORY): Define.
2537
2538         * interp.c (sim_info): Delete code printing memory size.
2539
2540         * interp.c (mips_size): Nee sim_size, delete function.
2541         (power2): Delete.
2542         (monitor, monitor_base, monitor_size): Delete global variables.
2543         (sim_open, sim_close): Delete code creating monitor and other
2544         memory regions.  Use sim-memopts module, via sim_do_commandf, to
2545         manage memory regions.
2546         (load_memory, store_memory): Use sim-core for memory model.
2547
2548         * interp.c (address_translation): Delete all memory map code
2549         except line forcing 32 bit addresses.
2550
2551 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2552
2553         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
2554         trace options.
2555
2556         * interp.c (logfh, logfile): Delete globals.
2557         (sim_open, sim_close): Delete code opening & closing log file.
2558         (mips_option_handler): Delete -l and -n options.
2559         (OPTION mips_options): Ditto.
2560
2561         * interp.c (OPTION mips_options): Rename option trace to dinero.
2562         (mips_option_handler): Update.
2563
2564 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2565
2566         * interp.c (fetch_str): New function.
2567         (sim_monitor): Rewrite using sim_read & sim_write.
2568         (sim_open): Check magic number.
2569         (sim_open): Write monitor vectors into memory using sim_write.
2570         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2571         (sim_read, sim_write): Simplify - transfer data one byte at a
2572         time.
2573         (load_memory, store_memory): Clarify meaning of parameter RAW.
2574
2575         * sim-main.h (isHOST): Defete definition.
2576         (isTARGET): Mark as depreciated.
2577         (address_translation): Delete parameter HOST.
2578
2579         * interp.c (address_translation): Delete parameter HOST.
2580
2581 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2582
2583         * mips.igen:
2584
2585         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2586         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2587
2588 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2589
2590         * mips.igen: Add model filter field to records.
2591
2592 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2593
2594         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
2595
2596         interp.c (sim_engine_run): Do not compile function sim_engine_run
2597         when WITH_IGEN == 1.
2598
2599         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2600         target architecture.
2601
2602         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2603         igen. Replace with configuration variables sim_igen_flags /
2604         sim_m16_flags.
2605
2606         * m16.igen: New file.  Copy mips16 insns here.
2607         * mips.igen: From here.
2608
2609 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2610
2611         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2612         to top.
2613         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2614
2615 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
2616
2617         * gencode.c (build_instruction): Follow sim_write's lead in using
2618         BigEndianMem instead of !ByteSwapMem.
2619
2620 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2621
2622         * configure.in (sim_gen): Dependent on target, select type of
2623         generator.  Always select old style generator.
2624
2625         configure: Re-generate.
2626
2627         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2628         targets.
2629         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2630         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2631         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2632         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2633         SIM_@sim_gen@_*, set by autoconf.
2634
2635 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2636
2637         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2638
2639         * interp.c (ColdReset): Remove #ifdef HASFPU, check
2640         CURRENT_FLOATING_POINT instead.
2641
2642         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2643         (address_translation): Raise exception InstructionFetch when
2644         translation fails and isINSTRUCTION.
2645
2646         * interp.c (sim_open, sim_write, sim_monitor, store_word,
2647         sim_engine_run): Change type of of vaddr and paddr to
2648         address_word.
2649         (address_translation, prefetch, load_memory, store_memory,
2650         cache_op): Change type of vAddr and pAddr to address_word.
2651
2652         * gencode.c (build_instruction): Change type of vaddr and paddr to
2653         address_word.
2654
2655 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2656
2657         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2658         macro to obtain result of ALU op.
2659
2660 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2661
2662         * interp.c (sim_info): Call profile_print.
2663
2664 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2665
2666         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2667
2668         * sim-main.h (WITH_PROFILE): Do not define, defined in
2669         common/sim-config.h.  Use sim-profile module.
2670         (simPROFILE): Delete defintion.
2671
2672         * interp.c (PROFILE): Delete definition.
2673         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2674         (sim_close): Delete code writing profile histogram.
2675         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2676         Delete.
2677         (sim_engine_run): Delete code profiling the PC.
2678
2679 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2680
2681         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2682
2683         * interp.c (sim_monitor): Make register pointers of type
2684         unsigned_word*.
2685
2686         * sim-main.h: Make registers of type unsigned_word not
2687         signed_word.
2688
2689 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2690
2691         * interp.c (sync_operation): Rename from SyncOperation, make
2692         global, add SD argument.
2693         (prefetch): Rename from Prefetch, make global, add SD argument.
2694         (decode_coproc): Make global.
2695
2696         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2697
2698         * gencode.c (build_instruction): Generate DecodeCoproc not
2699         decode_coproc calls.
2700
2701         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2702         (SizeFGR): Move to sim-main.h
2703         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2704         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2705         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2706         sim-main.h.
2707         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2708         FP_RM_TOMINF, GETRM): Move to sim-main.h.
2709         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2710         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2711         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2712         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2713
2714         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2715         exception.
2716         (sim-alu.h): Include.
2717         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2718         (sim_cia): Typedef to instruction_address.
2719
2720 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2721
2722         * Makefile.in (interp.o): Rename generated file engine.c to
2723         oengine.c.
2724
2725         * interp.c: Update.
2726
2727 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2728
2729         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2730
2731 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2732
2733         * gencode.c (build_instruction): For "FPSQRT", output correct
2734         number of arguments to Recip.
2735
2736 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2737
2738         * Makefile.in (interp.o): Depends on sim-main.h
2739
2740         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2741
2742         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2743         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2744         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2745         STATE, DSSTATE): Define
2746         (GPR, FGRIDX, ..): Define.
2747
2748         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2749         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2750         (GPR, FGRIDX, ...): Delete macros.
2751
2752         * interp.c: Update names to match defines from sim-main.h
2753
2754 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2755
2756         * interp.c (sim_monitor): Add SD argument.
2757         (sim_warning): Delete.  Replace calls with calls to
2758         sim_io_eprintf.
2759         (sim_error): Delete. Replace calls with sim_io_error.
2760         (open_trace, writeout32, writeout16, getnum): Add SD argument.
2761         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2762         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2763         argument.
2764         (mips_size): Rename from sim_size. Add SD argument.
2765
2766         * interp.c (simulator): Delete global variable.
2767         (callback): Delete global variable.
2768         (mips_option_handler, sim_open, sim_write, sim_read,
2769         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2770         sim_size,sim_monitor): Use sim_io_* not callback->*.
2771         (sim_open): ZALLOC simulator struct.
2772         (PROFILE): Do not define.
2773
2774 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2775
2776         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2777         support.h with corresponding code.
2778
2779         * sim-main.h (word64, uword64), support.h: Move definition to
2780         sim-main.h.
2781         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2782
2783         * support.h: Delete
2784         * Makefile.in: Update dependencies
2785         * interp.c: Do not include.
2786
2787 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2788
2789         * interp.c (address_translation, load_memory, store_memory,
2790         cache_op): Rename to from AddressTranslation et.al., make global,
2791         add SD argument
2792
2793         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2794         CacheOp): Define.
2795
2796         * interp.c (SignalException): Rename to signal_exception, make
2797         global.
2798
2799         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2800
2801         * sim-main.h (SignalException, SignalExceptionInterrupt,
2802         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2803         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2804         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2805         Define.
2806
2807         * interp.c, support.h: Use.
2808
2809 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2810
2811         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2812         to value_fpr / store_fpr. Add SD argument.
2813         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2814         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2815
2816         * sim-main.h (ValueFPR, StoreFPR): Define.
2817
2818 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2819
2820         * interp.c (sim_engine_run): Check consistency between configure
2821         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2822         and HASFPU.
2823
2824         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2825         (mips_fpu): Configure WITH_FLOATING_POINT.
2826         (mips_endian): Configure WITH_TARGET_ENDIAN.
2827         * configure: Update.
2828
2829 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2830
2831         * configure: Regenerated to track ../common/aclocal.m4 changes.
2832
2833 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
2834
2835         * configure: Regenerated.
2836
2837 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
2838
2839         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2840
2841 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2842
2843         * gencode.c (print_igen_insn_models): Assume certain architectures
2844         include all mips* instructions.
2845         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2846         instruction.
2847
2848         * Makefile.in (tmp.igen): Add target. Generate igen input from
2849         gencode file.
2850
2851         * gencode.c (FEATURE_IGEN): Define.
2852         (main): Add --igen option.  Generate output in igen format.
2853         (process_instructions): Format output according to igen option.
2854         (print_igen_insn_format): New function.
2855         (print_igen_insn_models): New function.
2856         (process_instructions): Only issue warnings and ignore
2857         instructions when no FEATURE_IGEN.
2858
2859 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2860
2861         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2862         MIPS targets.
2863
2864 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2865
2866         * configure: Regenerated to track ../common/aclocal.m4 changes.
2867
2868 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2869
2870         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2871         SIM_RESERVED_BITS): Delete, moved to common.
2872         (SIM_EXTRA_CFLAGS): Update.
2873
2874 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2875
2876         * configure.in: Configure non-strict memory alignment.
2877         * configure: Regenerated to track ../common/aclocal.m4 changes.
2878
2879 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2880
2881         * configure: Regenerated to track ../common/aclocal.m4 changes.
2882
2883 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
2884
2885         * gencode.c (SDBBP,DERET): Added (3900) insns.
2886         (RFE): Turn on for 3900.
2887         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2888         (dsstate): Made global.
2889         (SUBTARGET_R3900): Added.
2890         (CANCELDELAYSLOT): New.
2891         (SignalException): Ignore SystemCall rather than ignore and
2892         terminate.  Add DebugBreakPoint handling.
2893         (decode_coproc): New insns RFE, DERET; and new registers Debug
2894         and DEPC protected by SUBTARGET_R3900.
2895         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2896         bits explicitly.
2897         * Makefile.in,configure.in: Add mips subtarget option.
2898         * configure: Update.
2899
2900 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
2901
2902         * gencode.c: Add r3900 (tx39).
2903
2904
2905 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
2906
2907         * gencode.c (build_instruction): Don't need to subtract 4 for
2908         JALR, just 2.
2909
2910 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
2911
2912         * interp.c: Correct some HASFPU problems.
2913
2914 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2915
2916         * configure: Regenerated to track ../common/aclocal.m4 changes.
2917
2918 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2919
2920         * interp.c (mips_options): Fix samples option short form, should
2921         be `x'.
2922
2923 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2924
2925         * interp.c (sim_info): Enable info code.  Was just returning.
2926
2927 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2928
2929         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2930         MFC0.
2931
2932 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2933
2934         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2935         constants.
2936         (build_instruction): Ditto for LL.
2937
2938 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
2939
2940         * configure: Regenerated to track ../common/aclocal.m4 changes.
2941
2942 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2943
2944         * configure: Regenerated to track ../common/aclocal.m4 changes.
2945         * config.in: Ditto.
2946
2947 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2948
2949         * interp.c (sim_open): Add call to sim_analyze_program, update
2950         call to sim_config.
2951
2952 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2953
2954         * interp.c (sim_kill): Delete.
2955         (sim_create_inferior): Add ABFD argument. Set PC from same.
2956         (sim_load): Move code initializing trap handlers from here.
2957         (sim_open): To here.
2958         (sim_load): Delete, use sim-hload.c.
2959
2960         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2961
2962 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2963
2964         * configure: Regenerated to track ../common/aclocal.m4 changes.
2965         * config.in: Ditto.
2966
2967 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2968
2969         * interp.c (sim_open): Add ABFD argument.
2970         (sim_load): Move call to sim_config from here.
2971         (sim_open): To here.  Check return status.
2972
2973 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
2974
2975         * gencode.c (build_instruction): Two arg MADD should
2976         not assign result to $0.
2977
2978 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
2979
2980         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2981         * sim/mips/configure.in: Regenerate.
2982
2983 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
2984
2985         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2986         signed8, unsigned8 et.al. types.
2987
2988         * interp.c (SUB_REG_FETCH): Handle both little and big endian
2989         hosts when selecting subreg.
2990
2991 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
2992
2993         * interp.c (sim_engine_run): Reset the ZERO register to zero
2994         regardless of FEATURE_WARN_ZERO.
2995         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2996
2997 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2998
2999         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3000         (SignalException): For BreakPoints ignore any mode bits and just
3001         save the PC.
3002         (SignalException): Always set the CAUSE register.
3003
3004 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3005
3006         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3007         exception has been taken.
3008
3009         * interp.c: Implement the ERET and mt/f sr instructions.
3010
3011 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3012
3013         * interp.c (SignalException): Don't bother restarting an
3014         interrupt.
3015
3016 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3017
3018         * interp.c (SignalException): Really take an interrupt.
3019         (interrupt_event): Only deliver interrupts when enabled.
3020
3021 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3022
3023         * interp.c (sim_info): Only print info when verbose.
3024         (sim_info) Use sim_io_printf for output.
3025
3026 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3027
3028         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3029         mips architectures.
3030
3031 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3032
3033         * interp.c (sim_do_command): Check for common commands if a
3034         simulator specific command fails.
3035
3036 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
3037
3038         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3039         and simBE when DEBUG is defined.
3040
3041 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3042
3043         * interp.c (interrupt_event): New function.  Pass exception event
3044         onto exception handler.
3045
3046         * configure.in: Check for stdlib.h.
3047         * configure: Regenerate.
3048
3049         * gencode.c (build_instruction): Add UNUSED attribute to tempS
3050         variable declaration.
3051         (build_instruction): Initialize memval1.
3052         (build_instruction): Add UNUSED attribute to byte, bigend,
3053         reverse.
3054         (build_operands): Ditto.
3055
3056         * interp.c: Fix GCC warnings.
3057         (sim_get_quit_code): Delete.
3058
3059         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3060         * Makefile.in: Ditto.
3061         * configure: Re-generate.
3062
3063         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3064
3065 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3066
3067         * interp.c (mips_option_handler): New function parse argumes using
3068         sim-options.
3069         (myname): Replace with STATE_MY_NAME.
3070         (sim_open): Delete check for host endianness - performed by
3071         sim_config.
3072         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3073         (sim_open): Move much of the initialization from here.
3074         (sim_load): To here.  After the image has been loaded and
3075         endianness set.
3076         (sim_open): Move ColdReset from here.
3077         (sim_create_inferior): To here.
3078         (sim_open): Make FP check less dependant on host endianness.
3079
3080         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3081         run.
3082         * interp.c (sim_set_callbacks): Delete.
3083
3084         * interp.c (membank, membank_base, membank_size): Replace with
3085         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3086         (sim_open): Remove call to callback->init. gdb/run do this.
3087
3088         * interp.c: Update
3089
3090         * sim-main.h (SIM_HAVE_FLATMEM): Define.
3091
3092         * interp.c (big_endian_p): Delete, replaced by
3093         current_target_byte_order.
3094
3095 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3096
3097         * interp.c (host_read_long, host_read_word, host_swap_word,
3098         host_swap_long): Delete. Using common sim-endian.
3099         (sim_fetch_register, sim_store_register): Use H2T.
3100         (pipeline_ticks): Delete.  Handled by sim-events.
3101         (sim_info): Update.
3102         (sim_engine_run): Update.
3103
3104 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3105
3106         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3107         reason from here.
3108         (SignalException): To here. Signal using sim_engine_halt.
3109         (sim_stop_reason): Delete, moved to common.
3110
3111 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
3112
3113         * interp.c (sim_open): Add callback argument.
3114         (sim_set_callbacks): Delete SIM_DESC argument.
3115         (sim_size): Ditto.
3116
3117 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3118
3119         * Makefile.in (SIM_OBJS): Add common modules.
3120
3121         * interp.c (sim_set_callbacks): Also set SD callback.
3122         (set_endianness, xfer_*, swap_*): Delete.
3123         (host_read_word, host_read_long, host_swap_word, host_swap_long):
3124         Change to functions using sim-endian macros.
3125         (control_c, sim_stop): Delete, use common version.
3126         (simulate): Convert into.
3127         (sim_engine_run): This function.
3128         (sim_resume): Delete.
3129
3130         * interp.c (simulation): New variable - the simulator object.
3131         (sim_kind): Delete global - merged into simulation.
3132         (sim_load): Cleanup.  Move PC assignment from here.
3133         (sim_create_inferior): To here.
3134
3135         * sim-main.h: New file.
3136         * interp.c (sim-main.h): Include.
3137
3138 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
3139
3140         * configure: Regenerated to track ../common/aclocal.m4 changes.
3141
3142 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
3143
3144         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3145
3146 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
3147
3148         * gencode.c (build_instruction): DIV instructions: check
3149         for division by zero and integer overflow before using
3150         host's division operation.
3151
3152 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
3153
3154         * Makefile.in (SIM_OBJS): Add sim-load.o.
3155         * interp.c: #include bfd.h.
3156         (target_byte_order): Delete.
3157         (sim_kind, myname, big_endian_p): New static locals.
3158         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
3159         after argument parsing.  Recognize -E arg, set endianness accordingly.
3160         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
3161         load file into simulator.  Set PC from bfd.
3162         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
3163         (set_endianness): Use big_endian_p instead of target_byte_order.
3164
3165 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3166
3167         * interp.c (sim_size): Delete prototype - conflicts with
3168         definition in remote-sim.h.  Correct definition.
3169
3170 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3171
3172         * configure: Regenerated to track ../common/aclocal.m4 changes.
3173         * config.in: Ditto.
3174
3175 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
3176
3177         * interp.c (sim_open): New arg `kind'.
3178
3179         * configure: Regenerated to track ../common/aclocal.m4 changes.
3180
3181 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3182
3183         * configure: Regenerated to track ../common/aclocal.m4 changes.
3184
3185 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
3186
3187         * interp.c (sim_open): Set optind to 0 before calling getopt.
3188
3189 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3190
3191         * configure: Regenerated to track ../common/aclocal.m4 changes.
3192
3193 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
3194
3195         * interp.c : Replace uses of pr_addr with pr_uword64
3196         where the bit length is always 64 independent of SIM_ADDR.
3197         (pr_uword64) : added.
3198
3199 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3200
3201         * configure: Re-generate.
3202
3203 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
3204
3205         * configure: Regenerate to track ../common/aclocal.m4 changes.
3206
3207 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
3208
3209         * interp.c (sim_open): New SIM_DESC result.  Argument is now
3210         in argv form.
3211         (other sim_*): New SIM_DESC argument.
3212
3213 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
3214
3215         * interp.c: Fix printing of addresses for non-64-bit targets.
3216         (pr_addr): Add function to print address based on size.
3217
3218 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
3219
3220         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3221
3222 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
3223
3224         * gencode.c (build_mips16_operands): Correct computation of base
3225         address for extended PC relative instruction.
3226
3227 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
3228
3229         * interp.c (mips16_entry): Add support for floating point cases.
3230         (SignalException): Pass floating point cases to mips16_entry.
3231         (ValueFPR): Don't restrict fmt_single and fmt_word to even
3232         registers.
3233         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
3234         or fmt_word.
3235         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3236         and then set the state to fmt_uninterpreted.
3237         (COP_SW): Temporarily set the state to fmt_word while calling
3238         ValueFPR.
3239
3240 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
3241
3242         * gencode.c (build_instruction): The high order may be set in the
3243         comparison flags at any ISA level, not just ISA 4.
3244
3245 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
3246
3247         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3248         COMMON_{PRE,POST}_CONFIG_FRAG instead.
3249         * configure.in: sinclude ../common/aclocal.m4.
3250         * configure: Regenerated.
3251
3252 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
3253
3254         * configure: Rebuild after change to aclocal.m4.
3255
3256 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
3257
3258         * configure configure.in Makefile.in:  Update to new configure
3259         scheme which is more compatible with WinGDB builds.
3260         * configure.in:  Improve comment on how to run autoconf.
3261         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
3262         * Makefile.in:  Use autoconf substitution to install common
3263         makefile fragment.
3264
3265 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
3266
3267         * gencode.c (build_instruction): Use BigEndianCPU instead of
3268         ByteSwapMem.
3269
3270 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
3271
3272         * interp.c (sim_monitor): Make output to stdout visible in
3273         wingdb's I/O log window.
3274
3275 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
3276
3277         * support.h: Undo previous change to SIGTRAP
3278         and SIGQUIT values.
3279
3280 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
3281
3282         * interp.c (store_word, load_word): New static functions.
3283         (mips16_entry): New static function.
3284         (SignalException): Look for mips16 entry and exit instructions.
3285         (simulate): Use the correct index when setting fpr_state after
3286         doing a pending move.
3287
3288 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
3289
3290         * interp.c: Fix byte-swapping code throughout to work on
3291         both little- and big-endian hosts.
3292
3293 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
3294
3295         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3296         with gdb/config/i386/xm-windows.h.
3297
3298 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
3299
3300         * gencode.c (build_instruction): Work around MSVC++ code gen bug
3301         that messes up arithmetic shifts.
3302
3303 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
3304
3305         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
3306         SIGTRAP and SIGQUIT for _WIN32.
3307
3308 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
3309
3310         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3311         force a 64 bit multiplication.
3312         (build_instruction) [OR]: In mips16 mode, don't do anything if the
3313         destination register is 0, since that is the default mips16 nop
3314         instruction.
3315
3316 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
3317
3318         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3319         (build_endian_shift): Don't check proc64.
3320         (build_instruction): Always set memval to uword64.  Cast op2 to
3321         uword64 when shifting it left in memory instructions.  Always use
3322         the same code for stores--don't special case proc64.
3323
3324         * gencode.c (build_mips16_operands): Fix base PC value for PC
3325         relative operands.
3326         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3327         jal instruction.
3328         * interp.c (simJALDELAYSLOT): Define.
3329         (JALDELAYSLOT): Define.
3330         (INDELAYSLOT, INJALDELAYSLOT): Define.
3331         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3332
3333 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
3334
3335         * interp.c (sim_open): add flush_cache as a PMON routine
3336         (sim_monitor): handle flush_cache by ignoring it
3337
3338 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
3339
3340         * gencode.c (build_instruction): Use !ByteSwapMem instead of
3341         BigEndianMem.
3342         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3343         (BigEndianMem): Rename to ByteSwapMem and change sense.
3344         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3345         BigEndianMem references to !ByteSwapMem.
3346         (set_endianness): New function, with prototype.
3347         (sim_open): Call set_endianness.
3348         (sim_info): Use simBE instead of BigEndianMem.
3349         (xfer_direct_word, xfer_direct_long, swap_direct_word,
3350         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3351         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3352         ifdefs, keeping the prototype declaration.
3353         (swap_word): Rewrite correctly.
3354         (ColdReset): Delete references to CONFIG.  Delete endianness related
3355         code; moved to set_endianness.
3356
3357 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
3358
3359         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3360         * interp.c (CHECKHILO): Define away.
3361         (simSIGINT): New macro.
3362         (membank_size): Increase from 1MB to 2MB.
3363         (control_c): New function.
3364         (sim_resume): Rename parameter signal to signal_number.  Add local
3365         variable prev.  Call signal before and after simulate.
3366         (sim_stop_reason): Add simSIGINT support.
3367         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3368         functions always.
3369         (sim_warning): Delete call to SignalException.  Do call printf_filtered
3370         if logfh is NULL.
3371         (AddressTranslation): Add #ifdef DEBUG around debugging message and
3372         a call to sim_warning.
3373
3374 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
3375
3376         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3377         16 bit instructions.
3378
3379 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3380
3381         Add support for mips16 (16 bit MIPS implementation):
3382         * gencode.c (inst_type): Add mips16 instruction encoding types.
3383         (GETDATASIZEINSN): Define.
3384         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
3385         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
3386         mtlo.
3387         (MIPS16_DECODE): New table, for mips16 instructions.
3388         (bitmap_val): New static function.
3389         (struct mips16_op): Define.
3390         (mips16_op_table): New table, for mips16 operands.
3391         (build_mips16_operands): New static function.
3392         (process_instructions): If PC is odd, decode a mips16
3393         instruction.  Break out instruction handling into new
3394         build_instruction function.
3395         (build_instruction): New static function, broken out of
3396         process_instructions.  Check modifiers rather than flags for SHIFT
3397         bit count and m[ft]{hi,lo} direction.
3398         (usage): Pass program name to fprintf.
3399         (main): Remove unused variable this_option_optind.  Change
3400         ``*loptarg++'' to ``loptarg++''.
3401         (my_strtoul): Parenthesize && within ||.
3402         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3403         (simulate): If PC is odd, fetch a 16 bit instruction, and
3404         increment PC by 2 rather than 4.
3405         * configure.in: Add case for mips16*-*-*.
3406         * configure: Rebuild.
3407
3408 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
3409
3410         * interp.c: Allow -t to enable tracing in standalone simulator.
3411         Fix garbage output in trace file and error messages.
3412
3413 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
3414
3415         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3416         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3417         * configure.in: Simplify using macros in ../common/aclocal.m4.
3418         * configure: Regenerated.
3419         * tconfig.in: New file.
3420
3421 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
3422
3423         * interp.c: Fix bugs in 64-bit port.
3424         Use ansi function declarations for msvc compiler.
3425         Initialize and test file pointer in trace code.
3426         Prevent duplicate definition of LAST_EMED_REGNUM.
3427
3428 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
3429
3430         * interp.c (xfer_big_long): Prevent unwanted sign extension.
3431
3432 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
3433
3434         * interp.c (SignalException): Check for explicit terminating
3435         breakpoint value.
3436         * gencode.c: Pass instruction value through SignalException()
3437         calls for Trap, Breakpoint and Syscall.
3438
3439 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3440
3441         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3442         only used on those hosts that provide it.
3443         * configure.in: Add sqrt() to list of functions to be checked for.
3444         * config.in: Re-generated.
3445         * configure: Re-generated.
3446
3447 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3448
3449         * gencode.c (process_instructions): Call build_endian_shift when
3450         expanding STORE RIGHT, to fix swr.
3451         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3452         clear the high bits.
3453         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3454         Fix float to int conversions to produce signed values.
3455
3456 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
3457
3458         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3459         (process_instructions): Correct handling of nor instruction.
3460         Correct shift count for 32 bit shift instructions. Correct sign
3461         extension for arithmetic shifts to not shift the number of bits in
3462         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
3463         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
3464         Fix madd.
3465         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3466         It's OK to have a mult follow a mult.  What's not OK is to have a
3467         mult follow an mfhi.
3468         (Convert): Comment out incorrect rounding code.
3469
3470 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
3471
3472         * interp.c (sim_monitor): Improved monitor printf
3473         simulation. Tidied up simulator warnings, and added "--log" option
3474         for directing warning message output.
3475         * gencode.c: Use sim_warning() rather than WARNING macro.
3476
3477 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3478
3479         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3480         getopt1.o, rather than on gencode.c.  Link objects together.
3481         Don't link against -liberty.
3482         (gencode.o, getopt.o, getopt1.o): New targets.
3483         * gencode.c: Include <ctype.h> and "ansidecl.h".
3484         (AND): Undefine after including "ansidecl.h".
3485         (ULONG_MAX): Define if not defined.
3486         (OP_*): Don't define macros; now defined in opcode/mips.h.
3487         (main): Call my_strtoul rather than strtoul.
3488         (my_strtoul): New static function.
3489
3490 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
3491
3492         * gencode.c (process_instructions):  Generate word64 and uword64
3493         instead of `long long' and `unsigned long long' data types.
3494         * interp.c:  #include sysdep.h to get signals, and define default
3495         for SIGBUS.
3496         * (Convert):  Work around for Visual-C++ compiler bug with type
3497         conversion.
3498         * support.h:  Make things compile under Visual-C++ by using
3499         __int64 instead of `long long'.  Change many refs to long long
3500         into word64/uword64 typedefs.
3501
3502 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
3503
3504         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3505         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3506         (docdir): Removed.
3507         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3508         (AC_PROG_INSTALL): Added.
3509         (AC_PROG_CC): Moved to before configure.host call.
3510         * configure: Rebuilt.
3511
3512 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
3513
3514         * configure.in: Define @SIMCONF@ depending on mips target.
3515         * configure: Rebuild.
3516         * Makefile.in (run): Add @SIMCONF@ to control simulator
3517         construction.
3518         * gencode.c: Change LOADDRMASK to 64bit memory model only.
3519         * interp.c: Remove some debugging, provide more detailed error
3520         messages, update memory accesses to use LOADDRMASK.
3521
3522 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
3523
3524         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3525         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
3526         stamp-h.
3527         * configure: Rebuild.
3528         * config.in: New file, generated by autoheader.
3529         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
3530         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
3531         HAVE_ANINT and HAVE_AINT, as appropriate.
3532         * Makefile.in (run): Use @LIBS@ rather than -lm.
3533         (interp.o): Depend upon config.h.
3534         (Makefile): Just rebuild Makefile.
3535         (clean): Remove stamp-h.
3536         (mostlyclean): Make the same as clean, not as distclean.
3537         (config.h, stamp-h): New targets.
3538
3539 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3540
3541         * interp.c (ColdReset): Fix boolean test. Make all simulator
3542         globals static.
3543
3544 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
3545
3546         * interp.c (xfer_direct_word, xfer_direct_long,
3547         swap_direct_word, swap_direct_long, xfer_big_word,
3548         xfer_big_long, xfer_little_word, xfer_little_long,
3549         swap_word,swap_long): Added.
3550         * interp.c (ColdReset): Provide function indirection to
3551         host<->simulated_target transfer routines.
3552         * interp.c (sim_store_register, sim_fetch_register): Updated to
3553         make use of indirected transfer routines.
3554
3555 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
3556
3557         * gencode.c (process_instructions): Ensure FP ABS instruction
3558         recognised.
3559         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3560         system call support.
3561
3562 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
3563
3564         * interp.c (sim_do_command): Complain if callback structure not
3565         initialised.
3566
3567 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
3568
3569         * interp.c (Convert): Provide round-to-nearest and round-to-zero
3570         support for Sun hosts.
3571         * Makefile.in (gencode): Ensure the host compiler and libraries
3572         used for cross-hosted build.
3573
3574 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
3575
3576         * interp.c, gencode.c: Some more (TODO) tidying.
3577
3578 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
3579
3580         * gencode.c, interp.c: Replaced explicit long long references with
3581         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3582         * support.h (SET64LO, SET64HI): Macros added.
3583
3584 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
3585
3586         * configure: Regenerate with autoconf 2.7.
3587
3588 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
3589
3590         * interp.c (LoadMemory): Enclose text following #endif in /* */.
3591         * support.h: Remove superfluous "1" from #if.
3592         * support.h (CHECKSIM): Remove stray 'a' at end of line.
3593
3594 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
3595
3596         * interp.c (StoreFPR): Control UndefinedResult() call on
3597         WARN_RESULT manifest.
3598
3599 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
3600
3601         * gencode.c: Tidied instruction decoding, and added FP instruction
3602         support.
3603
3604         * interp.c: Added dineroIII, and BSD profiling support. Also
3605         run-time FP handling.
3606
3607 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
3608
3609         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3610         gencode.c, interp.c, support.h: created.