sim/mips/ChangeLog

   1 2012-05-18  Nick Clifton  <nickc@redhat.com>
   2
   3         PR 14072
   4         * interp.c: Include config.h before system header files.
   5
   6 2012-03-24  Mike Frysinger  <vapier@gentoo.org>
   7
   8         * aclocal.m4, config.in, configure: Regenerate.
   9
  10 2011-12-03  Mike Frysinger  <vapier@gentoo.org>
  11
  12         * aclocal.m4: New file.
  13         * configure: Regenerate.
  14
  15 2011-10-19  Mike Frysinger  <vapier@gentoo.org>
  16
  17         * configure: Regenerate after common/acinclude.m4 update.
  18
  19 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
  20
  21         * configure.ac: Change include to common/acinclude.m4.
  22
  23 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
  24
  25         * configure.ac: Change AC_PREREQ to 2.64.  Delete AC_CONFIG_HEADER
  26         call.  Replace common.m4 include with SIM_AC_COMMON.
  27         * configure: Regenerate.
  28
  29 2011-07-08  Hans-Peter Nilsson  <hp@axis.com>
  30
  31         * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
  32         $(SIM_EXTRA_DEPS).
  33         (tmp-mach-multi): Exit early when igen fails.
  34
  35 2011-07-05  Mike Frysinger  <vapier@gentoo.org>
  36
  37         * interp.c (sim_do_command): Delete.
  38
  39 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
  40
  41         * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
  42         (tx3904sio_fifo_reset): Likewise.
  43         * interp.c (sim_monitor): Likewise.
  44
  45 2010-04-14  Mike Frysinger  <vapier@gentoo.org>
  46
  47         * interp.c (sim_write): Add const to buffer arg.
  48
  49 2010-01-18  Masaki Muranaka  <monaka@monami-software.com>  (tiny change)
  50
  51         * interp.c: Don't include sysdep.h
  52
  53 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
  54
  55         * configure: Regenerate.
  56
  57 2009-08-22  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
  58
  59         * config.in: Regenerate.
  60         * configure: Likewise.
  61
  62         * configure: Regenerate.
  63
  64 2008-07-11  Hans-Peter Nilsson  <hp@axis.com>
  65
  66         * configure: Regenerate to track ../common/common.m4 changes.
  67         * config.in: Ditto.
  68
  69 2008-06-06  Vladimir Prus  <vladimir@codesourcery.com>
  70             Daniel Jacobowitz  <dan@codesourcery.com>
  71             Joseph Myers  <joseph@codesourcery.com>
  72
  73         * configure: Regenerate.
  74
  75 2007-10-22  Richard Sandiford  <rsandifo@nildram.co.uk>
  76
  77         * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
  78         that unconditionally allows fmt_ps.
  79         (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
  80         (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
  81         (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
  82         filter from 64,f to 32,f.
  83         (PREFX): Change filter from 64 to 32.
  84         (LDXC1, LUXC1): Provide separate mips32r2 implementations
  85         that use do_load_double instead of do_load.  Make both LUXC1
  86         versions unpredictable if SizeFGR () != 64.
  87         (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
  88         instead of do_store.  Remove unused variable.  Make both SUXC1
  89         versions unpredictable if SizeFGR () != 64.
  90
  91 2007-10-07  Richard Sandiford  <rsandifo@nildram.co.uk>
  92
  93         * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
  94         (sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
  95         shifts for that case.
  96
  97 2007-09-04  Nick Clifton  <nickc@redhat.com>
  98
  99         * interp.c (options enum): Add OPTION_INFO_MEMORY.
 100         (display_mem_info): New static variable.
 101         (mips_option_handler): Handle OPTION_INFO_MEMORY.
 102         (mips_options): Add info-memory and memory-info.
 103         (sim_open): After processing the command line and board
 104         specification, check display_mem_info.  If it is set then
 105         call the real handler for the --memory-info command line
 106         switch.
 107
 108 2007-08-24  Joel Brobecker  <brobecker@adacore.com>
 109
 110         * configure.ac: Change license of multi-run.c to GPL version 3.
 111         * configure: Regenerate.
 112
 113 2007-06-28  Richard Sandiford  <richard@codesourcery.com>
 114
 115         * configure.ac, configure: Revert last patch.
 116
 117 2007-06-26  Richard Sandiford  <richard@codesourcery.com>
 118
 119         * configure.ac (sim_mipsisa3264_configs): New variable.
 120         (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
 121         every configuration support all four targets, using the triplet to
 122         determine the default.
 123         * configure: Regenerate.
 124
 125 2007-06-25  Richard Sandiford  <richard@codesourcery.com>
 126
 127         * Makefile.in (m16run.o): New rule.
 128
 129 2007-05-15  Thiemo Seufer  <ths@mips.com>
 130
 131         * mips3264r2.igen (DSHD): Fix compile warning.
 132
 133 2007-05-14  Thiemo Seufer  <ths@mips.com>
 134
 135         * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
 136         CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
 137         NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
 138         RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
 139         for mips32r2.
 140
 141 2007-03-01  Thiemo Seufer  <ths@mips.com>
 142
 143         * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
 144         and mips64.
 145
 146 2007-02-20  Thiemo Seufer  <ths@mips.com>
 147
 148         * dsp.igen: Update copyright notice.
 149         * dsp2.igen: Fix copyright notice.
 150
 151 2007-02-20  Thiemo Seufer  <ths@mips.com>
 152             Chao-Ying Fu  <fu@mips.com>
 153
 154         * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
 155         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 156         Add dsp2 to sim_igen_machine.
 157         * configure: Regenerate.
 158         * dsp.igen (do_ph_op): Add MUL support when op = 2.
 159         (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
 160         (mulq_rs.ph): Use do_ph_mulq.
 161         (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
 162         * mips.igen: Add dsp2 model and include dsp2.igen.
 163         (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
 164         for *mips32r2, *mips64r2, *dsp.
 165         (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
 166         for *mips32r2, *mips64r2, *dsp2.
 167         * dsp2.igen: New file for MIPS DSP REV 2 ASE.
 168
 169 2007-02-19  Thiemo Seufer  <ths@mips.com>
 170             Nigel Stephens  <nigel@mips.com>
 171
 172         * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
 173         jumps with hazard barrier.
 174
 175 2007-02-19  Thiemo Seufer  <ths@mips.com>
 176             Nigel Stephens  <nigel@mips.com>
 177
 178         * interp.c (sim_monitor): Flush stdout and stderr file descriptors
 179         after each call to sim_io_write.
 180
 181 2007-02-19  Thiemo Seufer  <ths@mips.com>
 182             Nigel Stephens  <nigel@mips.com>
 183
 184         * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
 185         supported by this simulator.
 186         (decode_coproc): Recognise additional CP0 Config registers
 187         correctly.
 188
 189 2007-02-19  Thiemo Seufer  <ths@mips.com>
 190             Nigel Stephens  <nigel@mips.com>
 191             David Ung  <davidu@mips.com>
 192
 193         * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
 194         uninterpreted formats. If fmt is one of the uninterpreted types
 195         don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
 196         fmt_word, and fmt_uninterpreted_64 like fmt_long.
 197         (store_fpr): When writing an invalid odd register, set the
 198         matching even register to fmt_unknown, not the following register.
 199         * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
 200         the the memory window at offset 0 set by --memory-size command
 201         line option.
 202         (sim_store_register): Handle storing 4 bytes to an 8 byte floating
 203         point register.
 204         (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
 205         register.
 206         (sim_monitor): When returning the memory size to the MIPS
 207         application, use the value in STATE_MEM_SIZE, not an arbitrary
 208         hardcoded value.
 209         (cop_lw): Don' mess around with FPR_STATE, just pass
 210         fmt_uninterpreted_32 to StoreFPR.
 211         (cop_sw): Similarly.
 212         (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
 213         (cop_sd): Similarly.
 214         * mips.igen (not_word_value): Single version for mips32, mips64
 215         and mips16.
 216
 217 2007-02-19  Thiemo Seufer <ths@mips.com>
 218             Nigel Stephens  <nigel@mips.com>
 219
 220         * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
 221         MBytes.
 222
 223 2007-02-17  Thiemo Seufer  <ths@mips.com>
 224
 225         * configure.ac (mips*-sde-elf*): Move in front of generic machine
 226         configuration.
 227         * configure: Regenerate.
 228
 229 2007-02-17  Thiemo Seufer  <ths@mips.com>
 230
 231         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 232         Add mdmx to sim_igen_machine.
 233         (mipsisa64*-*-*): Likewise. Remove dsp.
 234         (mipsisa32*-*-*): Remove dsp.
 235         * configure: Regenerate.
 236
 237 2007-02-13  Thiemo Seufer  <ths@mips.com>
 238
 239         * configure.ac: Add mips*-sde-elf* target.
 240         * configure: Regenerate.
 241
 242 2006-12-21  Hans-Peter Nilsson  <hp@axis.com>
 243
 244         * acconfig.h: Remove.
 245         * config.in, configure: Regenerate.
 246
 247 2006-11-07  Thiemo Seufer  <ths@mips.com>
 248
 249         * dsp.igen (do_w_op): Fix compiler warning.
 250
 251 2006-08-29  Thiemo Seufer  <ths@mips.com>
 252             David Ung  <davidu@mips.com>
 253
 254         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
 255         sim_igen_machine.
 256         * configure: Regenerate.
 257         * mips.igen (model): Add smartmips.
 258         (MADDU): Increment ACX if carry.
 259         (do_mult): Clear ACX.
 260         (ROR,RORV): Add smartmips.
 261         (include): Include smartmips.igen.
 262         * sim-main.h (ACX): Set to REGISTERS[89].
 263         * smartmips.igen: New file.
 264
 265 2006-08-29  Thiemo Seufer  <ths@mips.com>
 266             David Ung  <davidu@mips.com>
 267
 268         * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
 269         mips3264r2.igen. Add missing dependency rules.
 270         * m16e.igen: Support for mips16e save/restore instructions.
 271
 272 2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
 273
 274         * configure: Regenerated.
 275
 276 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 277
 278         * configure: Regenerated.
 279
 280 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 281
 282         * configure: Regenerated.
 283
 284 2006-05-15 Chao-ying Fu  <fu@mips.com>
 285
 286         * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
 287
 288 2006-04-18  Nick Clifton  <nickc@redhat.com>
 289
 290         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
 291         statement.
 292
 293 2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
 294
 295         * configure: Regenerate.
 296
 297 2005-12-14  Chao-ying Fu  <fu@mips.com>
 298
 299         * Makefile.in (SIM_OBJS): Add dsp.o.
 300         (dsp.o): New dependency.
 301         (IGEN_INCLUDE): Add dsp.igen.
 302         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
 303         mipsisa64*-*-*): Add dsp to sim_igen_machine.
 304         * configure: Regenerate.
 305         * mips.igen: Add dsp model and include dsp.igen.
 306         (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
 307         because these instructions are extended in DSP ASE.
 308         * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
 309         adding 6 DSP accumulator registers and 1 DSP control register.
 310         (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
 311         AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
 312         DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
 313         DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
 314         DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
 315         DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
 316         DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
 317         DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
 318         DSPCR_CCOND_SMASK): New define.
 319         (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
 320         * dsp.c, dsp.igen: New files for MIPS DSP ASE.
 321
 322 2005-07-08  Ian Lance Taylor  <ian@airs.com>
 323
 324         * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
 325
 326 2005-06-16  David Ung  <davidu@mips.com>
 327             Nigel Stephens  <nigel@mips.com>
 328
 329         * mips.igen: New mips16e model and include m16e.igen.
 330         (check_u64): Add mips16e tag.
 331         * m16e.igen: New file for MIPS16e instructions.
 332         * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
 333         mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
 334         models.
 335         * configure: Regenerate.
 336
 337 2005-05-26  David Ung  <davidu@mips.com>
 338
 339         * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
 340         tags to all instructions which are applicable to the new ISAs.
 341         (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
 342         vr.igen.
 343         * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
 344         instructions.
 345         * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
 346         to mips.igen.
 347         * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
 348         * configure: Regenerate.
 349
 350 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
 351
 352         * configure: Regenerate.
 353
 354 2005-01-14  Andrew Cagney  <cagney@gnu.org>
 355
 356         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
 357         explicit call to AC_CONFIG_HEADER.
 358         * configure: Regenerate.
 359
 360 2005-01-12  Andrew Cagney  <cagney@gnu.org>
 361
 362         * configure.ac: Update to use ../common/common.m4.
 363         * configure: Re-generate.
 364
 365 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
 366
 367         * configure: Regenerated to track ../common/aclocal.m4 changes.
 368
 369 2005-01-07  Andrew Cagney  <cagney@gnu.org>
 370
 371         * configure.ac: Rename configure.in, require autoconf 2.59.
 372         * configure: Re-generate.
 373
 374 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
 375
 376         * configure: Regenerate for ../common/aclocal.m4 update.
 377
 378 2004-09-24  Monika Chaddha  <monika@acmet.com>
 379
 380         Committed by Andrew Cagney.
 381         * m16.igen (CMP, CMPI): Fix assembler.
 382
 383 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
 384
 385         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
 386         * configure: Regenerate.
 387
 388 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
 389
 390         * configure.in (sim_m16_machine): Include mipsIII.
 391         * configure: Regenerate.
 392
 393 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 394
 395         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
 396         from COP0_BADVADDR.
 397         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
 398
 399 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
 400
 401         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
 402
 403 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 404
 405         * mips.igen (check_fmt): Remove.
 406         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
 407         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
 408         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
 409         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
 410         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
 411         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
 412         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 413         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
 414         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
 415         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
 416
 417 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 418
 419         * sb1.igen (check_sbx): New function.
 420         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
 421
 422 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
 423             Richard Sandiford  <rsandifo@redhat.com>
 424
 425         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
 426         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
 427         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
 428         separate implementations for mipsIV and mipsV.  Use new macros to
 429         determine whether the restrictions apply.
 430
 431 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
 432
 433         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
 434         (check_mult_hilo): Improve comments.
 435         (check_div_hilo): Likewise.  Also, fork off a new version
 436         to handle mips32/mips64 (since there are no hazards to check
 437         in MIPS32/MIPS64).
 438
 439 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
 440
 441         * mips.igen (do_dmultx): Fix check for negative operands.
 442
 443 2003-05-16  Ian Lance Taylor  <ian@airs.com>
 444
 445         * Makefile.in (SHELL): Make sure this is defined.
 446         (various): Use $(SHELL) whenever we invoke move-if-change.
 447
 448 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
 449
 450         * cp1.c: Tweak attribution slightly.
 451         * cp1.h: Likewise.
 452         * mdmx.c: Likewise.
 453         * mdmx.igen: Likewise.
 454         * mips3d.igen: Likewise.
 455         * sb1.igen: Likewise.
 456
 457 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
 458
 459         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
 460         unsigned operands.
 461
 462 2003-02-27  Andrew Cagney  <cagney@redhat.com>
 463
 464         * interp.c (sim_open): Rename _bfd to bfd.
 465         (sim_create_inferior): Ditto.
 466
 467 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 468
 469         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
 470
 471 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 472
 473         * mips.igen (EI, DI): Remove.
 474
 475 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
 476
 477         * Makefile.in (tmp-run-multi): Fix mips16 filter.
 478
 479 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
 480             Andrew Cagney  <ac131313@redhat.com>
 481             Gavin Romig-Koch  <gavin@redhat.com>
 482             Graydon Hoare  <graydon@redhat.com>
 483             Aldy Hernandez  <aldyh@redhat.com>
 484             Dave Brolley  <brolley@redhat.com>
 485             Chris Demetriou  <cgd@broadcom.com>
 486
 487         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
 488         (sim_mach_default): New variable.
 489         (mips64vr-*-*, mips64vrel-*-*): New configurations.
 490         Add a new simulator generator, MULTI.
 491         * configure: Regenerate.
 492         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
 493         (multi-run.o): New dependency.
 494         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
 495         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
 496         (tmp-multi): Combine them.
 497         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
 498         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
 499         (distclean-extra): New rule.
 500         * sim-main.h: Include bfd.h.
 501         (MIPS_MACH): New macro.
 502         * mips.igen (vr4120, vr5400, vr5500): New models.
 503         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
 504         * vr.igen: Replace with new version.
 505
 506 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
 507
 508         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
 509         * configure: Regenerate.
 510
 511 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
 512
 513         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
 514         * mips.igen: Remove all invocations of check_branch_bug and
 515         mark_branch_bug.
 516
 517 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
 518
 519         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
 520
 521 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
 522
 523         * mips.igen (do_load_double, do_store_double): New functions.
 524         (LDC1, SDC1): Rename to...
 525         (LDC1b, SDC1b): respectively.
 526         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
 527
 528 2002-07-29  Michael Snyder  <msnyder@redhat.com>
 529
 530         * cp1.c (fp_recip2): Modify initialization expression so that
 531         GCC will recognize it as constant.
 532
 533 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
 534
 535         * mdmx.c (SD_): Delete.
 536         (Unpredictable): Re-define, for now, to directly invoke
 537         unpredictable_action().
 538         (mdmx_acc_op): Fix error in .ob immediate handling.
 539
 540 2002-06-18  Andrew Cagney  <cagney@redhat.com>
 541
 542         * interp.c (sim_firmware_command): Initialize `address'.
 543
 544 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
 545
 546         * configure: Regenerated to track ../common/aclocal.m4 changes.
 547
 548 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
 549             Ed Satterthwaite  <ehs@broadcom.com>
 550
 551         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
 552         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
 553         * mips.igen: Include mips3d.igen.
 554         (mips3d): New model name for MIPS-3D ASE instructions.
 555         (CVT.W.fmt): Don't use this instruction for word (source) format
 556         instructions.
 557         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
 558         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
 559         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
 560         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
 561         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
 562         (RSquareRoot1, RSquareRoot2): New macros.
 563         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
 564         (fp_rsqrt2): New functions.
 565         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
 566         * configure: Regenerate.
 567
 568 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
 569             Ed Satterthwaite  <ehs@broadcom.com>
 570
 571         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
 572         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
 573         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
 574         (convert): Note that this function is not used for paired-single
 575         format conversions.
 576         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
 577         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
 578         (check_fmt_p): Enable paired-single support.
 579         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
 580         (PUU.PS): New instructions.
 581         (CVT.S.fmt): Don't use this instruction for paired-single format
 582         destinations.
 583         * sim-main.h (FP_formats): New value 'fmt_ps.'
 584         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
 585         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
 586
 587 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 588
 589         * mips.igen: Fix formatting of function calls in
 590         many FP operations.
 591
 592 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 593
 594         * mips.igen (MOVN, MOVZ): Trace result.
 595         (TNEI): Print "tnei" as the opcode name in traces.
 596         (CEIL.W): Add disassembly string for traces.
 597         (RSQRT.fmt): Make location of disassembly string consistent
 598         with other instructions.
 599
 600 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 601
 602         * mips.igen (X): Delete unused function.
 603
 604 2002-06-08  Andrew Cagney  <cagney@redhat.com>
 605
 606         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
 607
 608 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 609             Ed Satterthwaite  <ehs@broadcom.com>
 610
 611         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
 612         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
 613         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
 614         (fp_nmsub): New prototypes.
 615         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
 616         (NegMultiplySub): New defines.
 617         * mips.igen (RSQRT.fmt): Use RSquareRoot().
 618         (MADD.D, MADD.S): Replace with...
 619         (MADD.fmt): New instruction.
 620         (MSUB.D, MSUB.S): Replace with...
 621         (MSUB.fmt): New instruction.
 622         (NMADD.D, NMADD.S): Replace with...
 623         (NMADD.fmt): New instruction.
 624         (NMSUB.D, MSUB.S): Replace with...
 625         (NMSUB.fmt): New instruction.
 626
 627 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 628             Ed Satterthwaite  <ehs@broadcom.com>
 629
 630         * cp1.c: Fix more comment spelling and formatting.
 631         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
 632         (denorm_mode): New function.
 633         (fpu_unary, fpu_binary): Round results after operation, collect
 634         status from rounding operations, and update the FCSR.
 635         (convert): Collect status from integer conversions and rounding
 636         operations, and update the FCSR.  Adjust NaN values that result
 637         from conversions.  Convert to use sim_io_eprintf rather than
 638         fprintf, and remove some debugging code.
 639         * cp1.h (fenr_FS): New define.
 640
 641 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 642
 643         * cp1.c (convert): Remove unusable debugging code, and move MIPS
 644         rounding mode to sim FP rounding mode flag conversion code into...
 645         (rounding_mode): New function.
 646
 647 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 648
 649         * cp1.c: Clean up formatting of a few comments.
 650         (value_fpr): Reformat switch statement.
 651
 652 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
 653             Ed Satterthwaite  <ehs@broadcom.com>
 654
 655         * cp1.h: New file.
 656         * sim-main.h: Include cp1.h.
 657         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
 658         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
 659         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
 660         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
 661         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
 662         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
 663         * cp1.c: Don't include sim-fpu.h; already included by
 664         sim-main.h.  Clean up formatting of some comments.
 665         (NaN, Equal, Less): Remove.
 666         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
 667         (fp_cmp): New functions.
 668         * mips.igen (do_c_cond_fmt): Remove.
 669         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
 670         Compare.  Add result tracing.
 671         (CxC1): Remove, replace with...
 672         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
 673         (DMxC1): Remove, replace with...
 674         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
 675         (MxC1): Remove, replace with...
 676         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
 677
 678 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 679
 680         * sim-main.h (FGRIDX): Remove, replace all uses with...
 681         (FGR_BASE): New macro.
 682         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
 683         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
 684         (NR_FGR, FGR): Likewise.
 685         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
 686         * mips.igen: Likewise.
 687
 688 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 689
 690         * cp1.c: Add an FSF Copyright notice to this file.
 691
 692 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 693             Ed Satterthwaite  <ehs@broadcom.com>
 694
 695         * cp1.c (Infinity): Remove.
 696         * sim-main.h (Infinity): Likewise.
 697
 698         * cp1.c (fp_unary, fp_binary): New functions.
 699         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
 700         (fp_sqrt): New functions, implemented in terms of the above.
 701         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
 702         (Recip, SquareRoot): Remove (replaced by functions above).
 703         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
 704         (fp_recip, fp_sqrt): New prototypes.
 705         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
 706         (Recip, SquareRoot): Replace prototypes with #defines which
 707         invoke the functions above.
 708
 709 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 710
 711         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
 712         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
 713         file, remove PARAMS from prototypes.
 714         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
 715         simulator state arguments.
 716         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
 717         pass simulator state arguments.
 718         * cp1.c (SD): Redefine as CPU_STATE(cpu).
 719         (store_fpr, convert): Remove 'sd' argument.
 720         (value_fpr): Likewise.  Convert to use 'SD' instead.
 721
 722 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 723
 724         * cp1.c (Min, Max): Remove #if 0'd functions.
 725         * sim-main.h (Min, Max): Remove.
 726
 727 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 728
 729         * cp1.c: fix formatting of switch case and default labels.
 730         * interp.c: Likewise.
 731         * sim-main.c: Likewise.
 732
 733 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 734
 735         * cp1.c: Clean up comments which describe FP formats.
 736          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
 737
 738 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 739             Ed Satterthwaite  <ehs@broadcom.com>
 740
 741         * configure.in (mipsisa64sb1*-*-*): New target for supporting
 742         Broadcom SiByte SB-1 processor configurations.
 743         * configure: Regenerate.
 744         * sb1.igen: New file.
 745         * mips.igen: Include sb1.igen.
 746         (sb1): New model.
 747         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
 748         * mdmx.igen: Add "sb1" model to all appropriate functions and
 749         instructions.
 750         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
 751         (ob_func, ob_acc): Reference the above.
 752         (qh_acc): Adjust to keep the same size as ob_acc.
 753         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
 754         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
 755
 756 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 757
 758         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
 759
 760 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
 761             Ed Satterthwaite  <ehs@broadcom.com>
 762
 763         * mips.igen (mdmx): New (pseudo-)model.
 764         * mdmx.c, mdmx.igen: New files.
 765         * Makefile.in (SIM_OBJS): Add mdmx.o.
 766         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
 767         New typedefs.
 768         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
 769         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
 770         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
 771         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
 772         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
 773         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
 774         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
 775         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
 776         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
 777         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
 778         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
 779         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
 780         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
 781         (qh_fmtsel): New macros.
 782         (_sim_cpu): New member "acc".
 783         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
 784         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
 785
 786 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
 787
 788         * interp.c: Use 'deprecated' rather than 'depreciated.'
 789         * sim-main.h: Likewise.
 790
 791 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
 792
 793         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
 794         which wouldn't compile anyway.
 795         * sim-main.h (unpredictable_action): New function prototype.
 796         (Unpredictable): Define to call igen function unpredictable().
 797         (NotWordValue): New macro to call igen function not_word_value().
 798         (UndefinedResult): Remove.
 799         * interp.c (undefined_result): Remove.
 800         (unpredictable_action): New function.
 801         * mips.igen (not_word_value, unpredictable): New functions.
 802         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
 803         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
 804         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
 805         NotWordValue() to check for unpredictable inputs, then
 806         Unpredictable() to handle them.
 807
 808 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
 809
 810         * mips.igen: Fix formatting of calls to Unpredictable().
 811
 812 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
 813
 814         * interp.c (sim_open): Revert previous change.
 815
 816 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
 817
 818         * interp.c (sim_open): Disable chunk of code that wrote code in
 819         vector table entries.
 820
 821 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
 822
 823         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
 824         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
 825         unused definitions.
 826
 827 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
 828
 829         * cp1.c: Fix many formatting issues.
 830
 831 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
 832
 833         * cp1.c (fpu_format_name): New function to replace...
 834         (DOFMT): This.  Delete, and update all callers.
 835         (fpu_rounding_mode_name): New function to replace...
 836         (RMMODE): This.  Delete, and update all callers.
 837
 838 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
 839
 840         * interp.c: Move FPU support routines from here to...
 841         * cp1.c: Here.  New file.
 842         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
 843         (cp1.o): New target.
 844
 845 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
 846
 847         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
 848         * mips.igen (mips32, mips64): New models, add to all instructions
 849         and functions as appropriate.
 850         (loadstore_ea, check_u64): New variant for model mips64.
 851         (check_fmt_p): New variant for models mipsV and mips64, remove
 852         mipsV model marking fro other variant.
 853         (SLL) Rename to...
 854         (SLLa) this.
 855         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
 856         for mips32 and mips64.
 857         (DCLO, DCLZ): New instructions for mips64.
 858
 859 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
 860
 861         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
 862         immediate or code as a hex value with the "%#lx" format.
 863         (ANDI): Likewise, and fix printed instruction name.
 864
 865 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 866
 867         * sim-main.h (UndefinedResult, Unpredictable): New macros
 868         which currently do nothing.
 869
 870 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 871
 872         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
 873         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
 874         (status_CU3): New definitions.
 875
 876         * sim-main.h (ExceptionCause): Add new values for MIPS32
 877         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
 878         for DebugBreakPoint and NMIReset to note their status in
 879         MIPS32 and MIPS64.
 880         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
 881         (SignalExceptionCacheErr): New exception macros.
 882
 883 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 884
 885         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
 886         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
 887         is always enabled.
 888         (SignalExceptionCoProcessorUnusable): Take as argument the
 889         unusable coprocessor number.
 890
 891 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 892
 893         * mips.igen: Fix formatting of all SignalException calls.
 894
 895 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 896
 897         * sim-main.h (SIGNEXTEND): Remove.
 898
 899 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
 900
 901         * mips.igen: Remove gencode comment from top of file, fix
 902         spelling in another comment.
 903
 904 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
 905
 906         * mips.igen (check_fmt, check_fmt_p): New functions to check
 907         whether specific floating point formats are usable.
 908         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 909         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
 910         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
 911         Use the new functions.
 912         (do_c_cond_fmt): Remove format checks...
 913         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
 914
 915 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
 916
 917         * mips.igen: Fix formatting of check_fpu calls.
 918
 919 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
 920
 921         * mips.igen (FLOOR.L.fmt): Store correct destination register.
 922
 923 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
 924
 925         * mips.igen: Remove whitespace at end of lines.
 926
 927 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
 928
 929         * mips.igen (loadstore_ea): New function to do effective
 930         address calculations.
 931         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
 932         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
 933         CACHE): Use loadstore_ea to do effective address computations.
 934
 935 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
 936
 937         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
 938         * mips.igen (LL, CxC1, MxC1): Likewise.
 939
 940 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
 941
 942         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
 943         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
 944         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
 945         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
 946         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
 947         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
 948         Don't split opcode fields by hand, use the opcode field values
 949         provided by igen.
 950
 951 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
 952
 953         * mips.igen (do_divu): Fix spacing.
 954
 955         * mips.igen (do_dsllv): Move to be right before DSLLV,
 956         to match the rest of the do_<shift> functions.
 957
 958 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
 959
 960         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
 961         DSRL32, do_dsrlv): Trace inputs and results.
 962
 963 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
 964
 965         * mips.igen (CACHE): Provide instruction-printing string.
 966
 967         * interp.c (signal_exception): Comment tokens after #endif.
 968
 969 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 970
 971         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
 972         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
 973         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
 974         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
 975         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
 976         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
 977         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
 978         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
 979
 980 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 981
 982         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
 983         instruction-printing string.
 984         (LWU): Use '64' as the filter flag.
 985
 986 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 987
 988         * mips.igen (SDXC1): Fix instruction-printing string.
 989
 990 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 991
 992         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
 993         filter flags "32,f".
 994
 995 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 996
 997         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
 998         as the filter flag.
 999
1000 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1001
1002         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1003         add a comma) so that it more closely match the MIPS ISA
1004         documentation opcode partitioning.
1005         (PREF): Put useful names on opcode fields, and include
1006         instruction-printing string.
1007
1008 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1009
1010         * mips.igen (check_u64): New function which in the future will
1011         check whether 64-bit instructions are usable and signal an
1012         exception if not.  Currently a no-op.
1013         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1014         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1015         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1016         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1017
1018         * mips.igen (check_fpu): New function which in the future will
1019         check whether FPU instructions are usable and signal an exception
1020         if not.  Currently a no-op.
1021         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1022         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1023         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1024         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1025         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1026         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1027         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1028         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1029
1030 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1031
1032         * mips.igen (do_load_left, do_load_right): Move to be immediately
1033         following do_load.
1034         (do_store_left, do_store_right): Move to be immediately following
1035         do_store.
1036
1037 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1038
1039         * mips.igen (mipsV): New model name.  Also, add it to
1040         all instructions and functions where it is appropriate.
1041
1042 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
1043
1044         * mips.igen: For all functions and instructions, list model
1045         names that support that instruction one per line.
1046
1047 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1048
1049         * mips.igen: Add some additional comments about supported
1050         models, and about which instructions go where.
1051         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1052         order as is used in the rest of the file.
1053
1054 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1055
1056         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1057         indicating that ALU32_END or ALU64_END are there to check
1058         for overflow.
1059         (DADD): Likewise, but also remove previous comment about
1060         overflow checking.
1061
1062 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1063
1064         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1065         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1066         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1067         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1068         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1069         fields (i.e., add and move commas) so that they more closely
1070         match the MIPS ISA documentation opcode partitioning.
1071
1072 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1073
1074         * mips.igen (ADDI): Print immediate value.
1075         (BREAK): Print code.
1076         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1077         (SLL): Print "nop" specially, and don't run the code
1078         that does the shift for the "nop" case.
1079
1080 2001-11-17  Fred Fish  <fnf@redhat.com>
1081
1082         * sim-main.h (float_operation): Move enum declaration outside
1083         of _sim_cpu struct declaration.
1084
1085 2001-04-12  Jim Blandy  <jimb@redhat.com>
1086
1087         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1088         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
1089         set of the FCSR.
1090         * sim-main.h (COCIDX): Remove definition; this isn't supported by
1091         PENDING_FILL, and you can get the intended effect gracefully by
1092         calling PENDING_SCHED directly.
1093
1094 2001-02-23  Ben Elliston  <bje@redhat.com>
1095
1096         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1097         already defined elsewhere.
1098
1099 2001-02-19  Ben Elliston  <bje@redhat.com>
1100
1101         * sim-main.h (sim_monitor): Return an int.
1102         * interp.c (sim_monitor): Add return values.
1103         (signal_exception): Handle error conditions from sim_monitor.
1104
1105 2001-02-08  Ben Elliston  <bje@redhat.com>
1106
1107         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1108         (store_memory): Likewise, pass cia to sim_core_write*.
1109
1110 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
1111
1112         On advice from Chris G. Demetriou <cgd@sibyte.com>:
1113         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1114
1115 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1116
1117         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1118         * Makefile.in: Don't delete *.igen when cleaning directory.
1119
1120 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1121
1122         * m16.igen (break): Call SignalException not sim_engine_halt.
1123
1124 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1125
1126         From Jason Eckhardt:
1127         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1128
1129 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1130
1131         * mips.igen (MxC1, DMxC1): Fix printf formatting.
1132
1133 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
1134
1135         * mips.igen (do_dmultx): Fix typo.
1136
1137 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1138
1139         * configure: Regenerated to track ../common/aclocal.m4 changes.
1140
1141 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1142
1143         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1144
1145 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
1146
1147         * sim-main.h (GPR_CLEAR): Define macro.
1148
1149 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1150
1151         * interp.c (decode_coproc): Output long using %lx and not %s.
1152
1153 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
1154
1155         * interp.c (sim_open): Sort & extend dummy memory regions for
1156         --board=jmr3904 for eCos.
1157
1158 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
1159
1160         * configure: Regenerated.
1161
1162 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
1163
1164         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1165         calls, conditional on the simulator being in verbose mode.
1166
1167 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
1168
1169         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1170         cache don't get ReservedInstruction traps.
1171
1172 1999-11-29  Mark Salter  <msalter@cygnus.com>
1173
1174         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1175         to clear status bits in sdisr register. This is how the hardware works.
1176
1177         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1178         being used by cygmon.
1179
1180 1999-11-11  Andrew Haley  <aph@cygnus.com>
1181
1182         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1183         instructions.
1184
1185 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
1186
1187         * mips.igen (MULT): Correct previous mis-applied patch.
1188
1189 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
1190
1191         * mips.igen (delayslot32): Handle sequence like
1192         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1193         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1194         (MULT): Actually pass the third register...
1195
1196 1999-09-03  Mark Salter  <msalter@cygnus.com>
1197
1198         * interp.c (sim_open): Added more memory aliases for additional
1199         hardware being touched by cygmon on jmr3904 board.
1200
1201 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1202
1203         * configure: Regenerated to track ../common/aclocal.m4 changes.
1204
1205 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1206
1207         * interp.c (sim_store_register): Handle case where client - GDB -
1208         specifies that a 4 byte register is 8 bytes in size.
1209         (sim_fetch_register): Ditto.
1210
1211 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
1212
1213         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1214         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1215         (idt_monitor_base): Base address for IDT monitor traps.
1216         (pmon_monitor_base): Ditto for PMON.
1217         (lsipmon_monitor_base): Ditto for LSI PMON.
1218         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1219         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1220         (sim_firmware_command): New function.
1221         (mips_option_handler): Call it for OPTION_FIRMWARE.
1222         (sim_open): Allocate memory for idt_monitor region.  If "--board"
1223         option was given, add no monitor by default.  Add BREAK hooks only if
1224         monitors are also there.
1225
1226 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1227
1228         * interp.c (sim_monitor): Flush output before reading input.
1229
1230 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1231
1232         * tconfig.in (SIM_HANDLES_LMA): Always define.
1233
1234 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1235
1236         From Mark Salter <msalter@cygnus.com>:
1237         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
1238         (sim_open): Add setup for BSP board.
1239
1240 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1241
1242         * mips.igen (MULT, MULTU): Add syntax for two operand version.
1243         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
1244         them as unimplemented.
1245
1246 1999-05-08  Felix Lee  <flee@cygnus.com>
1247
1248         * configure: Regenerated to track ../common/aclocal.m4 changes.
1249
1250 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
1251
1252         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1253
1254 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1255
1256         * configure.in: Any mips64vr5*-*-* target should have
1257         -DTARGET_ENABLE_FR=1.
1258         (default_endian): Any mips64vr*el-*-* target should default to
1259         LITTLE_ENDIAN.
1260         * configure: Re-generate.
1261
1262 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
1263
1264         * mips.igen (ldl): Extend from _16_, not 32.
1265
1266 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
1267
1268         * interp.c (sim_store_register): Force registers written to by GDB
1269         into an un-interpreted state.
1270
1271 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
1272
1273         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1274         CPU, start periodic background I/O polls.
1275         (tx3904sio_poll): New function: periodic I/O poller.
1276
1277 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
1278
1279         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1280
1281 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
1282
1283         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1284         case statement.
1285
1286 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
1287
1288         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1289         (load_word): Call SIM_CORE_SIGNAL hook on error.
1290         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1291         starting.  For exception dispatching, pass PC instead of NULL_CIA.
1292         (decode_coproc): Use COP0_BADVADDR to store faulting address.
1293         * sim-main.h (COP0_BADVADDR): Define.
1294         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1295         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1296         (_sim_cpu): Add exc_* fields to store register value snapshots.
1297         * mips.igen (*): Replace memory-related SignalException* calls
1298         with references to SIM_CORE_SIGNAL hook.
1299
1300         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1301         fix.
1302         * sim-main.c (*): Minor warning cleanups.
1303
1304 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
1305
1306         * m16.igen (DADDIU5): Correct type-o.
1307
1308 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
1309
1310         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1311         variables.
1312
1313 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
1314
1315         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1316         to include path.
1317         (interp.o): Add dependency on itable.h
1318         (oengine.c, gencode): Delete remaining references.
1319         (BUILT_SRC_FROM_GEN): Clean up.
1320
1321 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
1322
1323         * vr4run.c: New.
1324         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1325         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1326         tmp-run-hack) : New.
1327         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1328         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1329         Drop the "64" qualifier to get the HACK generator working.
1330         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
1331         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1332         qualifier to get the hack generator working.
1333         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1334         (DSLL): Use do_dsll.
1335         (DSLLV): Use do_dsllv.
1336         (DSRA): Use do_dsra.
1337         (DSRL): Use do_dsrl.
1338         (DSRLV): Use do_dsrlv.
1339         (BC1): Move *vr4100 to get the HACK generator working.
1340         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1341         get the HACK generator working.
1342         (MACC) Rename to get the HACK generator working.
1343         (DMACC,MACCS,DMACCS): Add the 64.
1344
1345 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
1346
1347         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1348         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1349
1350 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
1351
1352     * mips/interp.c (DEBUG): Cleanups.
1353
1354 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
1355
1356         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1357         (tx3904sio_tickle): fflush after a stdout character output.
1358
1359 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
1360
1361         * interp.c (sim_close): Uninstall modules.
1362
1363 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1364
1365         * sim-main.h, interp.c (sim_monitor): Change to global
1366         function.
1367
1368 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1369
1370         * configure.in (vr4100): Only include vr4100 instructions in
1371         simulator.
1372         * configure: Re-generate.
1373         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1374
1375 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1376
1377         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1378         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1379         true alternative.
1380
1381         * configure.in (sim_default_gen, sim_use_gen): Replace with
1382         sim_gen.
1383         (--enable-sim-igen): Delete config option. Always using IGEN.
1384         * configure: Re-generate.
1385
1386         * Makefile.in (gencode): Kill, kill, kill.
1387         * gencode.c: Ditto.
1388
1389 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1390
1391         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1392         bit mips16 igen simulator.
1393         * configure: Re-generate.
1394
1395         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1396         as part of vr4100 ISA.
1397         * vr.igen: Mark all instructions as 64 bit only.
1398
1399 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1400
1401         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1402         Pacify GCC.
1403
1404 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1405
1406         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1407         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
1408         * configure: Re-generate.
1409
1410         * m16.igen (BREAK): Define breakpoint instruction.
1411         (JALX32): Mark instruction as mips16 and not r3900.
1412         * mips.igen (C.cond.fmt): Fix typo in instruction format.
1413
1414         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1415
1416 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1417
1418         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1419         insn as a debug breakpoint.
1420
1421         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1422         pending.slot_size.
1423         (PENDING_SCHED): Clean up trace statement.
1424         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1425         (PENDING_FILL): Delay write by only one cycle.
1426         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1427
1428         * sim-main.c (pending_tick): Clean up trace statements. Add trace
1429         of pending writes.
1430         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1431         32 & 64.
1432         (pending_tick): Move incrementing of index to FOR statement.
1433         (pending_tick): Only update PENDING_OUT after a write has occured.
1434
1435         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
1436         build simulator.
1437         * configure: Re-generate.
1438
1439         * interp.c (sim_engine_run OLD): Delete explicit call to
1440         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1441
1442 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
1443
1444         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1445         interrupt level number to match changed SignalExceptionInterrupt
1446         macro.
1447
1448 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
1449
1450         * interp.c: #include "itable.h" if WITH_IGEN.
1451         (get_insn_name): New function.
1452         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1453         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1454
1455 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
1456
1457         * configure: Rebuilt to inhale new common/aclocal.m4.
1458
1459 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
1460
1461         * dv-tx3904sio.c: Include sim-assert.h.
1462
1463 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
1464
1465         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1466         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1467         Reorganize target-specific sim-hardware checks.
1468         * configure: rebuilt.
1469         * interp.c (sim_open): For tx39 target boards, set
1470         OPERATING_ENVIRONMENT, add tx3904sio devices.
1471         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1472         ROM executables.  Install dv-sockser into sim-modules list.
1473
1474         * dv-tx3904irc.c: Compiler warning clean-up.
1475         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
1476         frequent hw-trace messages.
1477
1478 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1479
1480         * vr.igen (MulAcc): Identify as a vr4100 specific function.
1481
1482 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1483
1484         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1485
1486         * vr.igen: New file.
1487         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1488         * mips.igen: Define vr4100 model. Include vr.igen.
1489 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
1490
1491         * mips.igen (check_mf_hilo): Correct check.
1492
1493 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1494
1495         * sim-main.h (interrupt_event): Add prototype.
1496
1497         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1498         register_ptr, register_value.
1499         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1500
1501         * sim-main.h (tracefh): Make extern.
1502
1503 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
1504
1505         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1506         Reduce unnecessarily high timer event frequency.
1507         * dv-tx3904cpu.c: Ditto for interrupt event.
1508
1509 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
1510
1511         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1512         to allay warnings.
1513         (interrupt_event): Made non-static.
1514
1515         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1516         interchange of configuration values for external vs. internal
1517         clock dividers.
1518
1519 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
1520
1521         * mips.igen (BREAK): Moved code to here for
1522         simulator-reserved break instructions.
1523         * gencode.c (build_instruction): Ditto.
1524         * interp.c (signal_exception): Code moved from here.  Non-
1525         reserved instructions now use exception vector, rather
1526         than halting sim.
1527         * sim-main.h: Moved magic constants to here.
1528
1529 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
1530
1531         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1532         register upon non-zero interrupt event level, clear upon zero
1533         event value.
1534         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1535         by passing zero event value.
1536         (*_io_{read,write}_buffer): Endianness fixes.
1537         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1538         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1539
1540         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1541         serial I/O and timer module at base address 0xFFFF0000.
1542
1543 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
1544
1545         * mips.igen (SWC1) : Correct the handling of ReverseEndian
1546         and BigEndianCPU.
1547
1548 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
1549
1550         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1551         parts.
1552         * configure: Update.
1553
1554 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
1555
1556         * dv-tx3904tmr.c: New file - implements tx3904 timer.
1557         * dv-tx3904{irc,cpu}.c: Mild reformatting.
1558         * configure.in: Include tx3904tmr in hw_device list.
1559         * configure: Rebuilt.
1560         * interp.c (sim_open): Instantiate three timer instances.
1561         Fix address typo of tx3904irc instance.
1562
1563 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
1564
1565         * interp.c (signal_exception): SystemCall exception now uses
1566         the exception vector.
1567
1568 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
1569
1570         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1571         to allay warnings.
1572
1573 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1574
1575         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1576
1577 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1578
1579         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1580
1581         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1582         sim-main.h. Declare a struct hw_descriptor instead of struct
1583         hw_device_descriptor.
1584
1585 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1586
1587         * mips.igen (do_store_left, do_load_left): Compute nr of left and
1588         right bits and then re-align left hand bytes to correct byte
1589         lanes.  Fix incorrect computation in do_store_left when loading
1590         bytes from second word.
1591
1592 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1593
1594         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1595         * interp.c (sim_open): Only create a device tree when HW is
1596         enabled.
1597
1598         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1599         * interp.c (signal_exception): Ditto.
1600
1601 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
1602
1603         * gencode.c: Mark BEGEZALL as LIKELY.
1604
1605 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1606
1607         * sim-main.h (ALU32_END): Sign extend 32 bit results.
1608         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1609
1610 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
1611
1612         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1613         modules.  Recognize TX39 target with "mips*tx39" pattern.
1614         * configure: Rebuilt.
1615         * sim-main.h (*): Added many macros defining bits in
1616         TX39 control registers.
1617         (SignalInterrupt): Send actual PC instead of NULL.
1618         (SignalNMIReset): New exception type.
1619         * interp.c (board): New variable for future use to identify
1620         a particular board being simulated.
1621         (mips_option_handler,mips_options): Added "--board" option.
1622         (interrupt_event): Send actual PC.
1623         (sim_open): Make memory layout conditional on board setting.
1624         (signal_exception): Initial implementation of hardware interrupt
1625         handling.  Accept another break instruction variant for simulator
1626         exit.
1627         (decode_coproc): Implement RFE instruction for TX39.
1628         (mips.igen): Decode RFE instruction as such.
1629         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1630         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1631         bbegin to implement memory map.
1632         * dv-tx3904cpu.c: New file.
1633         * dv-tx3904irc.c: New file.
1634
1635 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
1636
1637         * mips.igen (check_mt_hilo): Create a separate r3900 version.
1638
1639 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
1640
1641         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
1642         with calls to check_div_hilo.
1643
1644 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
1645
1646         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1647         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1648         Add special r3900 version of do_mult_hilo.
1649         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1650         with calls to check_mult_hilo.
1651         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1652         with calls to check_div_hilo.
1653
1654 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1655
1656         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1657         Document a replacement.
1658
1659 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
1660
1661         * interp.c (sim_monitor): Make mon_printf work.
1662
1663 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
1664
1665         * sim-main.h (INSN_NAME): New arg `cpu'.
1666
1667 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
1668
1669         * configure: Regenerated to track ../common/aclocal.m4 changes.
1670
1671 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
1672
1673         * configure: Regenerated to track ../common/aclocal.m4 changes.
1674         * config.in: Ditto.
1675
1676 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
1677
1678         * acconfig.h: New file.
1679         * configure.in: Reverted change of Apr 24; use sinclude again.
1680
1681 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
1682
1683         * configure: Regenerated to track ../common/aclocal.m4 changes.
1684         * config.in: Ditto.
1685
1686 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
1687
1688         * configure.in: Don't call sinclude.
1689
1690 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
1691
1692         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1693
1694 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1695
1696         * mips.igen (ERET): Implement.
1697
1698         * interp.c (decode_coproc): Return sign-extended EPC.
1699
1700         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1701
1702         * interp.c (signal_exception): Do not ignore Trap.
1703         (signal_exception): On TRAP, restart at exception address.
1704         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1705         (signal_exception): Update.
1706         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1707         so that TRAP instructions are caught.
1708
1709 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1710
1711         * sim-main.h (struct hilo_access, struct hilo_history): Define,
1712         contains HI/LO access history.
1713         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1714         (HIACCESS, LOACCESS): Delete, replace with
1715         (HIHISTORY, LOHISTORY): New macros.
1716         (CHECKHILO): Delete all, moved to mips.igen
1717
1718         * gencode.c (build_instruction): Do not generate checks for
1719         correct HI/LO register usage.
1720
1721         * interp.c (old_engine_run): Delete checks for correct HI/LO
1722         register usage.
1723
1724         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1725         check_mf_cycles): New functions.
1726         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1727         do_divu, domultx, do_mult, do_multu): Use.
1728
1729         * tx.igen ("madd", "maddu"): Use.
1730
1731 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1732
1733         * mips.igen (DSRAV): Use function do_dsrav.
1734         (SRAV): Use new function do_srav.
1735
1736         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1737         (B): Sign extend 11 bit immediate.
1738         (EXT-B*): Shift 16 bit immediate left by 1.
1739         (ADDIU*): Don't sign extend immediate value.
1740
1741 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1742
1743         * m16run.c (sim_engine_run): Restore CIA after handling an event.
1744
1745         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1746         functions.
1747
1748         * mips.igen (delayslot32, nullify_next_insn): New functions.
1749         (m16.igen): Always include.
1750         (do_*): Add more tracing.
1751
1752         * m16.igen (delayslot16): Add NIA argument, could be called by a
1753         32 bit MIPS16 instruction.
1754
1755         * interp.c (ifetch16): Move function from here.
1756         * sim-main.c (ifetch16): To here.
1757
1758         * sim-main.c (ifetch16, ifetch32): Update to match current
1759         implementations of LH, LW.
1760         (signal_exception): Don't print out incorrect hex value of illegal
1761         instruction.
1762
1763 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1764
1765         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1766         instruction.
1767
1768         * m16.igen: Implement MIPS16 instructions.
1769
1770         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1771         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1772         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1773         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1774         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
1775         bodies of corresponding code from 32 bit insn to these.  Also used
1776         by MIPS16 versions of functions.
1777
1778         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1779         (IMEM16): Drop NR argument from macro.
1780
1781 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1782
1783         * Makefile.in (SIM_OBJS): Add sim-main.o.
1784
1785         * sim-main.h (address_translation, load_memory, store_memory,
1786         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1787         as INLINE_SIM_MAIN.
1788         (pr_addr, pr_uword64): Declare.
1789         (sim-main.c): Include when H_REVEALS_MODULE_P.
1790
1791         * interp.c (address_translation, load_memory, store_memory,
1792         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1793         from here.
1794         * sim-main.c: To here. Fix compilation problems.
1795
1796         * configure.in: Enable inlining.
1797         * configure: Re-config.
1798
1799 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1800
1801         * configure: Regenerated to track ../common/aclocal.m4 changes.
1802
1803 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1804
1805         * mips.igen: Include tx.igen.
1806         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1807         * tx.igen: New file, contains MADD and MADDU.
1808
1809         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1810         the hardwired constant `7'.
1811         (store_memory): Ditto.
1812         (LOADDRMASK): Move definition to sim-main.h.
1813
1814         mips.igen (MTC0): Enable for r3900.
1815         (ADDU): Add trace.
1816
1817         mips.igen (do_load_byte): Delete.
1818         (do_load, do_store, do_load_left, do_load_write, do_store_left,
1819         do_store_right): New functions.
1820         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1821
1822         configure.in: Let the tx39 use igen again.
1823         configure: Update.
1824
1825 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1826
1827         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1828         not an address sized quantity.  Return zero for cache sizes.
1829
1830 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1831
1832         * mips.igen (r3900): r3900 does not support 64 bit integer
1833         operations.
1834
1835 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
1836
1837         * configure.in (mipstx39*-*-*): Use gencode simulator rather
1838         than igen one.
1839         * configure : Rebuild.
1840
1841 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1842
1843         * configure: Regenerated to track ../common/aclocal.m4 changes.
1844
1845 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1846
1847         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1848
1849 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
1850
1851         * configure: Regenerated to track ../common/aclocal.m4 changes.
1852         * config.in: Regenerated to track ../common/aclocal.m4 changes.
1853
1854 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1855
1856         * configure: Regenerated to track ../common/aclocal.m4 changes.
1857
1858 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1859
1860         * interp.c (Max, Min): Comment out functions. Not yet used.
1861
1862 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1863
1864         * configure: Regenerated to track ../common/aclocal.m4 changes.
1865
1866 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
1867
1868         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
1869         configurable settings for stand-alone simulator.
1870
1871         * configure.in: Added X11 search, just in case.
1872
1873         * configure: Regenerated.
1874
1875 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1876
1877         * interp.c (sim_write, sim_read, load_memory, store_memory):
1878         Replace sim_core_*_map with read_map, write_map, exec_map resp.
1879
1880 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1881
1882         * sim-main.h (GETFCC): Return an unsigned value.
1883
1884 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1885
1886         * mips.igen (DIV): Fix check for -1 / MIN_INT.
1887         (DADD): Result destination is RD not RT.
1888
1889 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1890
1891         * sim-main.h (HIACCESS, LOACCESS): Always define.
1892
1893         * mdmx.igen (Maxi, Mini): Rename Max, Min.
1894
1895         * interp.c (sim_info): Delete.
1896
1897 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
1898
1899         * interp.c (DECLARE_OPTION_HANDLER): Use it.
1900         (mips_option_handler): New argument `cpu'.
1901         (sim_open): Update call to sim_add_option_table.
1902
1903 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1904
1905         * mips.igen (CxC1): Add tracing.
1906
1907 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1908
1909         * sim-main.h (Max, Min): Declare.
1910
1911         * interp.c (Max, Min): New functions.
1912
1913         * mips.igen (BC1): Add tracing.
1914
1915 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
1916
1917         * interp.c Added memory map for stack in vr4100
1918
1919 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
1920
1921         * interp.c (load_memory): Add missing "break"'s.
1922
1923 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1924
1925         * interp.c (sim_store_register, sim_fetch_register): Pass in
1926         length parameter.  Return -1.
1927
1928 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
1929
1930         * interp.c: Added hardware init hook, fixed warnings.
1931
1932 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1933
1934         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
1935
1936 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1937
1938         * interp.c (ifetch16): New function.
1939
1940         * sim-main.h (IMEM32): Rename IMEM.
1941         (IMEM16_IMMED): Define.
1942         (IMEM16): Define.
1943         (DELAY_SLOT): Update.
1944
1945         * m16run.c (sim_engine_run): New file.
1946
1947         * m16.igen: All instructions except LB.
1948         (LB): Call do_load_byte.
1949         * mips.igen (do_load_byte): New function.
1950         (LB): Call do_load_byte.
1951
1952         * mips.igen: Move spec for insn bit size and high bit from here.
1953         * Makefile.in (tmp-igen, tmp-m16): To here.
1954
1955         * m16.dc: New file, decode mips16 instructions.
1956
1957         * Makefile.in (SIM_NO_ALL): Define.
1958         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
1959
1960 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1961
1962         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
1963         point unit to 32 bit registers.
1964         * configure: Re-generate.
1965
1966 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1967
1968         * configure.in (sim_use_gen): Make IGEN the default simulator
1969         generator for generic 32 and 64 bit mips targets.
1970         * configure: Re-generate.
1971
1972 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1973
1974         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
1975         bitsize.
1976
1977         * interp.c (sim_fetch_register, sim_store_register): Read/write
1978         FGR from correct location.
1979         (sim_open): Set size of FGR's according to
1980         WITH_TARGET_FLOATING_POINT_BITSIZE.
1981
1982         * sim-main.h (FGR): Store floating point registers in a separate
1983         array.
1984
1985 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1986
1987         * configure: Regenerated to track ../common/aclocal.m4 changes.
1988
1989 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1990
1991         * interp.c (ColdReset): Call PENDING_INVALIDATE.
1992
1993         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
1994
1995         * interp.c (pending_tick): New function.  Deliver pending writes.
1996
1997         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
1998         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
1999         it can handle mixed sized quantites and single bits.
2000
2001 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2002
2003         * interp.c (oengine.h): Do not include when building with IGEN.
2004         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2005         (sim_info): Ditto for PROCESSOR_64BIT.
2006         (sim_monitor): Replace ut_reg with unsigned_word.
2007         (*): Ditto for t_reg.
2008         (LOADDRMASK): Define.
2009         (sim_open): Remove defunct check that host FP is IEEE compliant,
2010         using software to emulate floating point.
2011         (value_fpr, ...): Always compile, was conditional on HASFPU.
2012
2013 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2014
2015         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2016         size.
2017
2018         * interp.c (SD, CPU): Define.
2019         (mips_option_handler): Set flags in each CPU.
2020         (interrupt_event): Assume CPU 0 is the one being iterrupted.
2021         (sim_close): Do not clear STATE, deleted anyway.
2022         (sim_write, sim_read): Assume CPU zero's vm should be used for
2023         data transfers.
2024         (sim_create_inferior): Set the PC for all processors.
2025         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2026         argument.
2027         (mips16_entry): Pass correct nr of args to store_word, load_word.
2028         (ColdReset): Cold reset all cpu's.
2029         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2030         (sim_monitor, load_memory, store_memory, signal_exception): Use
2031         `CPU' instead of STATE_CPU.
2032
2033
2034         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2035         SD or CPU_.
2036
2037         * sim-main.h (signal_exception): Add sim_cpu arg.
2038         (SignalException*): Pass both SD and CPU to signal_exception.
2039         * interp.c (signal_exception): Update.
2040
2041         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2042         Ditto
2043         (sync_operation, prefetch, cache_op, store_memory, load_memory,
2044         address_translation): Ditto
2045         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2046
2047 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2048
2049         * configure: Regenerated to track ../common/aclocal.m4 changes.
2050
2051 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2052
2053         * interp.c (sim_engine_run): Add `nr_cpus' argument.
2054
2055         * mips.igen (model): Map processor names onto BFD name.
2056
2057         * sim-main.h (CPU_CIA): Delete.
2058         (SET_CIA, GET_CIA): Define
2059
2060 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2061
2062         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2063         regiser.
2064
2065         * configure.in (default_endian): Configure a big-endian simulator
2066         by default.
2067         * configure: Re-generate.
2068
2069 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
2070
2071         * configure: Regenerated to track ../common/aclocal.m4 changes.
2072
2073 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
2074
2075         * interp.c (sim_monitor): Handle Densan monitor outbyte
2076         and inbyte functions.
2077
2078 1997-12-29  Felix Lee  <flee@cygnus.com>
2079
2080         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2081
2082 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
2083
2084         * Makefile.in (tmp-igen): Arrange for $zero to always be
2085         reset to zero after every instruction.
2086
2087 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2088
2089         * configure: Regenerated to track ../common/aclocal.m4 changes.
2090         * config.in: Ditto.
2091
2092 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
2093
2094         * mips.igen (MSUB): Fix to work like MADD.
2095         * gencode.c (MSUB): Similarly.
2096
2097 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
2098
2099         * configure: Regenerated to track ../common/aclocal.m4 changes.
2100
2101 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2102
2103         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2104
2105 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2106
2107         * sim-main.h (sim-fpu.h): Include.
2108
2109         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2110         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2111         using host independant sim_fpu module.
2112
2113 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2114
2115         * interp.c (signal_exception): Report internal errors with SIGABRT
2116         not SIGQUIT.
2117
2118         * sim-main.h (C0_CONFIG): New register.
2119         (signal.h): No longer include.
2120
2121         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2122
2123 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
2124
2125         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2126
2127 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2128
2129         * mips.igen: Tag vr5000 instructions.
2130         (ANDI): Was missing mipsIV model, fix assembler syntax.
2131         (do_c_cond_fmt): New function.
2132         (C.cond.fmt): Handle mips I-III which do not support CC field
2133         separatly.
2134         (bc1): Handle mips IV which do not have a delaed FCC separatly.
2135         (SDR): Mask paddr when BigEndianMem, not the converse as specified
2136         in IV3.2 spec.
2137         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
2138         vr5000 which saves LO in a GPR separatly.
2139
2140         * configure.in (enable-sim-igen): For vr5000, select vr5000
2141         specific instructions.
2142         * configure: Re-generate.
2143
2144 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2145
2146         * Makefile.in (SIM_OBJS): Add sim-fpu module.
2147
2148         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2149         fmt_uninterpreted_64 bit cases to switch.  Convert to
2150         fmt_formatted,
2151
2152         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2153
2154         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2155         as specified in IV3.2 spec.
2156         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2157
2158 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2159
2160         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2161         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2162         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2163         PENDING_FILL versions of instructions.  Simplify.
2164         (X): New function.
2165         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2166         instructions.
2167         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2168         a signed value.
2169         (MTHI, MFHI): Disable code checking HI-LO.
2170
2171         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2172         global.
2173         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2174
2175 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2176
2177         * gencode.c (build_mips16_operands): Replace IPC with cia.
2178
2179         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2180         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2181         IPC to `cia'.
2182         (UndefinedResult): Replace function with macro/function
2183         combination.
2184         (sim_engine_run): Don't save PC in IPC.
2185
2186         * sim-main.h (IPC): Delete.
2187
2188
2189         * interp.c (signal_exception, store_word, load_word,
2190         address_translation, load_memory, store_memory, cache_op,
2191         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2192         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2193         current instruction address - cia - argument.
2194         (sim_read, sim_write): Call address_translation directly.
2195         (sim_engine_run): Rename variable vaddr to cia.
2196         (signal_exception): Pass cia to sim_monitor
2197
2198         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2199         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2200         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2201
2202         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2203         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2204         SIM_ASSERT.
2205
2206         * interp.c (signal_exception): Pass restart address to
2207         sim_engine_restart.
2208
2209         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2210         idecode.o): Add dependency.
2211
2212         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2213         Delete definitions
2214         (DELAY_SLOT): Update NIA not PC with branch address.
2215         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2216
2217         * mips.igen: Use CIA not PC in branch calculations.
2218         (illegal): Call SignalException.
2219         (BEQ, ADDIU): Fix assembler.
2220
2221 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2222
2223         * m16.igen (JALX): Was missing.
2224
2225         * configure.in (enable-sim-igen): New configuration option.
2226         * configure: Re-generate.
2227
2228         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2229
2230         * interp.c (load_memory, store_memory): Delete parameter RAW.
2231         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2232         bypassing {load,store}_memory.
2233
2234         * sim-main.h (ByteSwapMem): Delete definition.
2235
2236         * Makefile.in (SIM_OBJS): Add sim-memopt module.
2237
2238         * interp.c (sim_do_command, sim_commands): Delete mips specific
2239         commands.  Handled by module sim-options.
2240
2241         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2242         (WITH_MODULO_MEMORY): Define.
2243
2244         * interp.c (sim_info): Delete code printing memory size.
2245
2246         * interp.c (mips_size): Nee sim_size, delete function.
2247         (power2): Delete.
2248         (monitor, monitor_base, monitor_size): Delete global variables.
2249         (sim_open, sim_close): Delete code creating monitor and other
2250         memory regions.  Use sim-memopts module, via sim_do_commandf, to
2251         manage memory regions.
2252         (load_memory, store_memory): Use sim-core for memory model.
2253
2254         * interp.c (address_translation): Delete all memory map code
2255         except line forcing 32 bit addresses.
2256
2257 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2258
2259         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
2260         trace options.
2261
2262         * interp.c (logfh, logfile): Delete globals.
2263         (sim_open, sim_close): Delete code opening & closing log file.
2264         (mips_option_handler): Delete -l and -n options.
2265         (OPTION mips_options): Ditto.
2266
2267         * interp.c (OPTION mips_options): Rename option trace to dinero.
2268         (mips_option_handler): Update.
2269
2270 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2271
2272         * interp.c (fetch_str): New function.
2273         (sim_monitor): Rewrite using sim_read & sim_write.
2274         (sim_open): Check magic number.
2275         (sim_open): Write monitor vectors into memory using sim_write.
2276         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2277         (sim_read, sim_write): Simplify - transfer data one byte at a
2278         time.
2279         (load_memory, store_memory): Clarify meaning of parameter RAW.
2280
2281         * sim-main.h (isHOST): Defete definition.
2282         (isTARGET): Mark as depreciated.
2283         (address_translation): Delete parameter HOST.
2284
2285         * interp.c (address_translation): Delete parameter HOST.
2286
2287 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2288
2289         * mips.igen:
2290
2291         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2292         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2293
2294 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2295
2296         * mips.igen: Add model filter field to records.
2297
2298 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2299
2300         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
2301
2302         interp.c (sim_engine_run): Do not compile function sim_engine_run
2303         when WITH_IGEN == 1.
2304
2305         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2306         target architecture.
2307
2308         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2309         igen. Replace with configuration variables sim_igen_flags /
2310         sim_m16_flags.
2311
2312         * m16.igen: New file.  Copy mips16 insns here.
2313         * mips.igen: From here.
2314
2315 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2316
2317         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2318         to top.
2319         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2320
2321 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
2322
2323         * gencode.c (build_instruction): Follow sim_write's lead in using
2324         BigEndianMem instead of !ByteSwapMem.
2325
2326 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2327
2328         * configure.in (sim_gen): Dependent on target, select type of
2329         generator.  Always select old style generator.
2330
2331         configure: Re-generate.
2332
2333         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2334         targets.
2335         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2336         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2337         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2338         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2339         SIM_@sim_gen@_*, set by autoconf.
2340
2341 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2342
2343         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2344
2345         * interp.c (ColdReset): Remove #ifdef HASFPU, check
2346         CURRENT_FLOATING_POINT instead.
2347
2348         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2349         (address_translation): Raise exception InstructionFetch when
2350         translation fails and isINSTRUCTION.
2351
2352         * interp.c (sim_open, sim_write, sim_monitor, store_word,
2353         sim_engine_run): Change type of of vaddr and paddr to
2354         address_word.
2355         (address_translation, prefetch, load_memory, store_memory,
2356         cache_op): Change type of vAddr and pAddr to address_word.
2357
2358         * gencode.c (build_instruction): Change type of vaddr and paddr to
2359         address_word.
2360
2361 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2362
2363         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2364         macro to obtain result of ALU op.
2365
2366 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2367
2368         * interp.c (sim_info): Call profile_print.
2369
2370 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2371
2372         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2373
2374         * sim-main.h (WITH_PROFILE): Do not define, defined in
2375         common/sim-config.h.  Use sim-profile module.
2376         (simPROFILE): Delete defintion.
2377
2378         * interp.c (PROFILE): Delete definition.
2379         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2380         (sim_close): Delete code writing profile histogram.
2381         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2382         Delete.
2383         (sim_engine_run): Delete code profiling the PC.
2384
2385 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2386
2387         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2388
2389         * interp.c (sim_monitor): Make register pointers of type
2390         unsigned_word*.
2391
2392         * sim-main.h: Make registers of type unsigned_word not
2393         signed_word.
2394
2395 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2396
2397         * interp.c (sync_operation): Rename from SyncOperation, make
2398         global, add SD argument.
2399         (prefetch): Rename from Prefetch, make global, add SD argument.
2400         (decode_coproc): Make global.
2401
2402         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2403
2404         * gencode.c (build_instruction): Generate DecodeCoproc not
2405         decode_coproc calls.
2406
2407         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2408         (SizeFGR): Move to sim-main.h
2409         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2410         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2411         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2412         sim-main.h.
2413         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2414         FP_RM_TOMINF, GETRM): Move to sim-main.h.
2415         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2416         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2417         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2418         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2419
2420         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2421         exception.
2422         (sim-alu.h): Include.
2423         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2424         (sim_cia): Typedef to instruction_address.
2425
2426 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2427
2428         * Makefile.in (interp.o): Rename generated file engine.c to
2429         oengine.c.
2430
2431         * interp.c: Update.
2432
2433 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2434
2435         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2436
2437 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2438
2439         * gencode.c (build_instruction): For "FPSQRT", output correct
2440         number of arguments to Recip.
2441
2442 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2443
2444         * Makefile.in (interp.o): Depends on sim-main.h
2445
2446         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2447
2448         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2449         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2450         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2451         STATE, DSSTATE): Define
2452         (GPR, FGRIDX, ..): Define.
2453
2454         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2455         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2456         (GPR, FGRIDX, ...): Delete macros.
2457
2458         * interp.c: Update names to match defines from sim-main.h
2459
2460 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2461
2462         * interp.c (sim_monitor): Add SD argument.
2463         (sim_warning): Delete.  Replace calls with calls to
2464         sim_io_eprintf.
2465         (sim_error): Delete. Replace calls with sim_io_error.
2466         (open_trace, writeout32, writeout16, getnum): Add SD argument.
2467         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2468         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2469         argument.
2470         (mips_size): Rename from sim_size. Add SD argument.
2471
2472         * interp.c (simulator): Delete global variable.
2473         (callback): Delete global variable.
2474         (mips_option_handler, sim_open, sim_write, sim_read,
2475         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2476         sim_size,sim_monitor): Use sim_io_* not callback->*.
2477         (sim_open): ZALLOC simulator struct.
2478         (PROFILE): Do not define.
2479
2480 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2481
2482         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2483         support.h with corresponding code.
2484
2485         * sim-main.h (word64, uword64), support.h: Move definition to
2486         sim-main.h.
2487         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2488
2489         * support.h: Delete
2490         * Makefile.in: Update dependencies
2491         * interp.c: Do not include.
2492
2493 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2494
2495         * interp.c (address_translation, load_memory, store_memory,
2496         cache_op): Rename to from AddressTranslation et.al., make global,
2497         add SD argument
2498
2499         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2500         CacheOp): Define.
2501
2502         * interp.c (SignalException): Rename to signal_exception, make
2503         global.
2504
2505         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2506
2507         * sim-main.h (SignalException, SignalExceptionInterrupt,
2508         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2509         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2510         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2511         Define.
2512
2513         * interp.c, support.h: Use.
2514
2515 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2516
2517         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2518         to value_fpr / store_fpr. Add SD argument.
2519         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2520         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2521
2522         * sim-main.h (ValueFPR, StoreFPR): Define.
2523
2524 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2525
2526         * interp.c (sim_engine_run): Check consistency between configure
2527         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2528         and HASFPU.
2529
2530         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2531         (mips_fpu): Configure WITH_FLOATING_POINT.
2532         (mips_endian): Configure WITH_TARGET_ENDIAN.
2533         * configure: Update.
2534
2535 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2536
2537         * configure: Regenerated to track ../common/aclocal.m4 changes.
2538
2539 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
2540
2541         * configure: Regenerated.
2542
2543 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
2544
2545         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2546
2547 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2548
2549         * gencode.c (print_igen_insn_models): Assume certain architectures
2550         include all mips* instructions.
2551         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2552         instruction.
2553
2554         * Makefile.in (tmp.igen): Add target. Generate igen input from
2555         gencode file.
2556
2557         * gencode.c (FEATURE_IGEN): Define.
2558         (main): Add --igen option.  Generate output in igen format.
2559         (process_instructions): Format output according to igen option.
2560         (print_igen_insn_format): New function.
2561         (print_igen_insn_models): New function.
2562         (process_instructions): Only issue warnings and ignore
2563         instructions when no FEATURE_IGEN.
2564
2565 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2566
2567         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2568         MIPS targets.
2569
2570 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2571
2572         * configure: Regenerated to track ../common/aclocal.m4 changes.
2573
2574 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2575
2576         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2577         SIM_RESERVED_BITS): Delete, moved to common.
2578         (SIM_EXTRA_CFLAGS): Update.
2579
2580 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2581
2582         * configure.in: Configure non-strict memory alignment.
2583         * configure: Regenerated to track ../common/aclocal.m4 changes.
2584
2585 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2586
2587         * configure: Regenerated to track ../common/aclocal.m4 changes.
2588
2589 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
2590
2591         * gencode.c (SDBBP,DERET): Added (3900) insns.
2592         (RFE): Turn on for 3900.
2593         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2594         (dsstate): Made global.
2595         (SUBTARGET_R3900): Added.
2596         (CANCELDELAYSLOT): New.
2597         (SignalException): Ignore SystemCall rather than ignore and
2598         terminate.  Add DebugBreakPoint handling.
2599         (decode_coproc): New insns RFE, DERET; and new registers Debug
2600         and DEPC protected by SUBTARGET_R3900.
2601         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2602         bits explicitly.
2603         * Makefile.in,configure.in: Add mips subtarget option.
2604         * configure: Update.
2605
2606 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
2607
2608         * gencode.c: Add r3900 (tx39).
2609
2610
2611 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
2612
2613         * gencode.c (build_instruction): Don't need to subtract 4 for
2614         JALR, just 2.
2615
2616 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
2617
2618         * interp.c: Correct some HASFPU problems.
2619
2620 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2621
2622         * configure: Regenerated to track ../common/aclocal.m4 changes.
2623
2624 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2625
2626         * interp.c (mips_options): Fix samples option short form, should
2627         be `x'.
2628
2629 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2630
2631         * interp.c (sim_info): Enable info code.  Was just returning.
2632
2633 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2634
2635         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2636         MFC0.
2637
2638 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2639
2640         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2641         constants.
2642         (build_instruction): Ditto for LL.
2643
2644 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
2645
2646         * configure: Regenerated to track ../common/aclocal.m4 changes.
2647
2648 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2649
2650         * configure: Regenerated to track ../common/aclocal.m4 changes.
2651         * config.in: Ditto.
2652
2653 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2654
2655         * interp.c (sim_open): Add call to sim_analyze_program, update
2656         call to sim_config.
2657
2658 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2659
2660         * interp.c (sim_kill): Delete.
2661         (sim_create_inferior): Add ABFD argument. Set PC from same.
2662         (sim_load): Move code initializing trap handlers from here.
2663         (sim_open): To here.
2664         (sim_load): Delete, use sim-hload.c.
2665
2666         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2667
2668 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2669
2670         * configure: Regenerated to track ../common/aclocal.m4 changes.
2671         * config.in: Ditto.
2672
2673 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2674
2675         * interp.c (sim_open): Add ABFD argument.
2676         (sim_load): Move call to sim_config from here.
2677         (sim_open): To here.  Check return status.
2678
2679 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
2680
2681         * gencode.c (build_instruction): Two arg MADD should
2682         not assign result to $0.
2683
2684 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
2685
2686         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2687         * sim/mips/configure.in: Regenerate.
2688
2689 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
2690
2691         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2692         signed8, unsigned8 et.al. types.
2693
2694         * interp.c (SUB_REG_FETCH): Handle both little and big endian
2695         hosts when selecting subreg.
2696
2697 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
2698
2699         * interp.c (sim_engine_run): Reset the ZERO register to zero
2700         regardless of FEATURE_WARN_ZERO.
2701         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2702
2703 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2704
2705         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2706         (SignalException): For BreakPoints ignore any mode bits and just
2707         save the PC.
2708         (SignalException): Always set the CAUSE register.
2709
2710 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2711
2712         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2713         exception has been taken.
2714
2715         * interp.c: Implement the ERET and mt/f sr instructions.
2716
2717 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2718
2719         * interp.c (SignalException): Don't bother restarting an
2720         interrupt.
2721
2722 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2723
2724         * interp.c (SignalException): Really take an interrupt.
2725         (interrupt_event): Only deliver interrupts when enabled.
2726
2727 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2728
2729         * interp.c (sim_info): Only print info when verbose.
2730         (sim_info) Use sim_io_printf for output.
2731
2732 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2733
2734         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2735         mips architectures.
2736
2737 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2738
2739         * interp.c (sim_do_command): Check for common commands if a
2740         simulator specific command fails.
2741
2742 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
2743
2744         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2745         and simBE when DEBUG is defined.
2746
2747 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2748
2749         * interp.c (interrupt_event): New function.  Pass exception event
2750         onto exception handler.
2751
2752         * configure.in: Check for stdlib.h.
2753         * configure: Regenerate.
2754
2755         * gencode.c (build_instruction): Add UNUSED attribute to tempS
2756         variable declaration.
2757         (build_instruction): Initialize memval1.
2758         (build_instruction): Add UNUSED attribute to byte, bigend,
2759         reverse.
2760         (build_operands): Ditto.
2761
2762         * interp.c: Fix GCC warnings.
2763         (sim_get_quit_code): Delete.
2764
2765         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2766         * Makefile.in: Ditto.
2767         * configure: Re-generate.
2768
2769         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2770
2771 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2772
2773         * interp.c (mips_option_handler): New function parse argumes using
2774         sim-options.
2775         (myname): Replace with STATE_MY_NAME.
2776         (sim_open): Delete check for host endianness - performed by
2777         sim_config.
2778         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2779         (sim_open): Move much of the initialization from here.
2780         (sim_load): To here.  After the image has been loaded and
2781         endianness set.
2782         (sim_open): Move ColdReset from here.
2783         (sim_create_inferior): To here.
2784         (sim_open): Make FP check less dependant on host endianness.
2785
2786         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2787         run.
2788         * interp.c (sim_set_callbacks): Delete.
2789
2790         * interp.c (membank, membank_base, membank_size): Replace with
2791         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2792         (sim_open): Remove call to callback->init. gdb/run do this.
2793
2794         * interp.c: Update
2795
2796         * sim-main.h (SIM_HAVE_FLATMEM): Define.
2797
2798         * interp.c (big_endian_p): Delete, replaced by
2799         current_target_byte_order.
2800
2801 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2802
2803         * interp.c (host_read_long, host_read_word, host_swap_word,
2804         host_swap_long): Delete. Using common sim-endian.
2805         (sim_fetch_register, sim_store_register): Use H2T.
2806         (pipeline_ticks): Delete.  Handled by sim-events.
2807         (sim_info): Update.
2808         (sim_engine_run): Update.
2809
2810 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2811
2812         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2813         reason from here.
2814         (SignalException): To here. Signal using sim_engine_halt.
2815         (sim_stop_reason): Delete, moved to common.
2816
2817 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
2818
2819         * interp.c (sim_open): Add callback argument.
2820         (sim_set_callbacks): Delete SIM_DESC argument.
2821         (sim_size): Ditto.
2822
2823 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2824
2825         * Makefile.in (SIM_OBJS): Add common modules.
2826
2827         * interp.c (sim_set_callbacks): Also set SD callback.
2828         (set_endianness, xfer_*, swap_*): Delete.
2829         (host_read_word, host_read_long, host_swap_word, host_swap_long):
2830         Change to functions using sim-endian macros.
2831         (control_c, sim_stop): Delete, use common version.
2832         (simulate): Convert into.
2833         (sim_engine_run): This function.
2834         (sim_resume): Delete.
2835
2836         * interp.c (simulation): New variable - the simulator object.
2837         (sim_kind): Delete global - merged into simulation.
2838         (sim_load): Cleanup.  Move PC assignment from here.
2839         (sim_create_inferior): To here.
2840
2841         * sim-main.h: New file.
2842         * interp.c (sim-main.h): Include.
2843
2844 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
2845
2846         * configure: Regenerated to track ../common/aclocal.m4 changes.
2847
2848 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
2849
2850         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2851
2852 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
2853
2854         * gencode.c (build_instruction): DIV instructions: check
2855         for division by zero and integer overflow before using
2856         host's division operation.
2857
2858 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
2859
2860         * Makefile.in (SIM_OBJS): Add sim-load.o.
2861         * interp.c: #include bfd.h.
2862         (target_byte_order): Delete.
2863         (sim_kind, myname, big_endian_p): New static locals.
2864         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
2865         after argument parsing.  Recognize -E arg, set endianness accordingly.
2866         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
2867         load file into simulator.  Set PC from bfd.
2868         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
2869         (set_endianness): Use big_endian_p instead of target_byte_order.
2870
2871 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2872
2873         * interp.c (sim_size): Delete prototype - conflicts with
2874         definition in remote-sim.h.  Correct definition.
2875
2876 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2877
2878         * configure: Regenerated to track ../common/aclocal.m4 changes.
2879         * config.in: Ditto.
2880
2881 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
2882
2883         * interp.c (sim_open): New arg `kind'.
2884
2885         * configure: Regenerated to track ../common/aclocal.m4 changes.
2886
2887 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2888
2889         * configure: Regenerated to track ../common/aclocal.m4 changes.
2890
2891 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
2892
2893         * interp.c (sim_open): Set optind to 0 before calling getopt.
2894
2895 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2896
2897         * configure: Regenerated to track ../common/aclocal.m4 changes.
2898
2899 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
2900
2901         * interp.c : Replace uses of pr_addr with pr_uword64
2902         where the bit length is always 64 independent of SIM_ADDR.
2903         (pr_uword64) : added.
2904
2905 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2906
2907         * configure: Re-generate.
2908
2909 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
2910
2911         * configure: Regenerate to track ../common/aclocal.m4 changes.
2912
2913 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
2914
2915         * interp.c (sim_open): New SIM_DESC result.  Argument is now
2916         in argv form.
2917         (other sim_*): New SIM_DESC argument.
2918
2919 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
2920
2921         * interp.c: Fix printing of addresses for non-64-bit targets.
2922         (pr_addr): Add function to print address based on size.
2923
2924 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
2925
2926         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
2927
2928 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
2929
2930         * gencode.c (build_mips16_operands): Correct computation of base
2931         address for extended PC relative instruction.
2932
2933 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
2934
2935         * interp.c (mips16_entry): Add support for floating point cases.
2936         (SignalException): Pass floating point cases to mips16_entry.
2937         (ValueFPR): Don't restrict fmt_single and fmt_word to even
2938         registers.
2939         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
2940         or fmt_word.
2941         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
2942         and then set the state to fmt_uninterpreted.
2943         (COP_SW): Temporarily set the state to fmt_word while calling
2944         ValueFPR.
2945
2946 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
2947
2948         * gencode.c (build_instruction): The high order may be set in the
2949         comparison flags at any ISA level, not just ISA 4.
2950
2951 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
2952
2953         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
2954         COMMON_{PRE,POST}_CONFIG_FRAG instead.
2955         * configure.in: sinclude ../common/aclocal.m4.
2956         * configure: Regenerated.
2957
2958 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
2959
2960         * configure: Rebuild after change to aclocal.m4.
2961
2962 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
2963
2964         * configure configure.in Makefile.in:  Update to new configure
2965         scheme which is more compatible with WinGDB builds.
2966         * configure.in:  Improve comment on how to run autoconf.
2967         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
2968         * Makefile.in:  Use autoconf substitution to install common
2969         makefile fragment.
2970
2971 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
2972
2973         * gencode.c (build_instruction): Use BigEndianCPU instead of
2974         ByteSwapMem.
2975
2976 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
2977
2978         * interp.c (sim_monitor): Make output to stdout visible in
2979         wingdb's I/O log window.
2980
2981 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
2982
2983         * support.h: Undo previous change to SIGTRAP
2984         and SIGQUIT values.
2985
2986 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
2987
2988         * interp.c (store_word, load_word): New static functions.
2989         (mips16_entry): New static function.
2990         (SignalException): Look for mips16 entry and exit instructions.
2991         (simulate): Use the correct index when setting fpr_state after
2992         doing a pending move.
2993
2994 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
2995
2996         * interp.c: Fix byte-swapping code throughout to work on
2997         both little- and big-endian hosts.
2998
2999 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
3000
3001         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3002         with gdb/config/i386/xm-windows.h.
3003
3004 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
3005
3006         * gencode.c (build_instruction): Work around MSVC++ code gen bug
3007         that messes up arithmetic shifts.
3008
3009 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
3010
3011         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
3012         SIGTRAP and SIGQUIT for _WIN32.
3013
3014 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
3015
3016         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3017         force a 64 bit multiplication.
3018         (build_instruction) [OR]: In mips16 mode, don't do anything if the
3019         destination register is 0, since that is the default mips16 nop
3020         instruction.
3021
3022 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
3023
3024         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3025         (build_endian_shift): Don't check proc64.
3026         (build_instruction): Always set memval to uword64.  Cast op2 to
3027         uword64 when shifting it left in memory instructions.  Always use
3028         the same code for stores--don't special case proc64.
3029
3030         * gencode.c (build_mips16_operands): Fix base PC value for PC
3031         relative operands.
3032         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3033         jal instruction.
3034         * interp.c (simJALDELAYSLOT): Define.
3035         (JALDELAYSLOT): Define.
3036         (INDELAYSLOT, INJALDELAYSLOT): Define.
3037         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3038
3039 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
3040
3041         * interp.c (sim_open): add flush_cache as a PMON routine
3042         (sim_monitor): handle flush_cache by ignoring it
3043
3044 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
3045
3046         * gencode.c (build_instruction): Use !ByteSwapMem instead of
3047         BigEndianMem.
3048         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3049         (BigEndianMem): Rename to ByteSwapMem and change sense.
3050         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3051         BigEndianMem references to !ByteSwapMem.
3052         (set_endianness): New function, with prototype.
3053         (sim_open): Call set_endianness.
3054         (sim_info): Use simBE instead of BigEndianMem.
3055         (xfer_direct_word, xfer_direct_long, swap_direct_word,
3056         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3057         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3058         ifdefs, keeping the prototype declaration.
3059         (swap_word): Rewrite correctly.
3060         (ColdReset): Delete references to CONFIG.  Delete endianness related
3061         code; moved to set_endianness.
3062
3063 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
3064
3065         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3066         * interp.c (CHECKHILO): Define away.
3067         (simSIGINT): New macro.
3068         (membank_size): Increase from 1MB to 2MB.
3069         (control_c): New function.
3070         (sim_resume): Rename parameter signal to signal_number.  Add local
3071         variable prev.  Call signal before and after simulate.
3072         (sim_stop_reason): Add simSIGINT support.
3073         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3074         functions always.
3075         (sim_warning): Delete call to SignalException.  Do call printf_filtered
3076         if logfh is NULL.
3077         (AddressTranslation): Add #ifdef DEBUG around debugging message and
3078         a call to sim_warning.
3079
3080 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
3081
3082         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3083         16 bit instructions.
3084
3085 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3086
3087         Add support for mips16 (16 bit MIPS implementation):
3088         * gencode.c (inst_type): Add mips16 instruction encoding types.
3089         (GETDATASIZEINSN): Define.
3090         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
3091         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
3092         mtlo.
3093         (MIPS16_DECODE): New table, for mips16 instructions.
3094         (bitmap_val): New static function.
3095         (struct mips16_op): Define.
3096         (mips16_op_table): New table, for mips16 operands.
3097         (build_mips16_operands): New static function.
3098         (process_instructions): If PC is odd, decode a mips16
3099         instruction.  Break out instruction handling into new
3100         build_instruction function.
3101         (build_instruction): New static function, broken out of
3102         process_instructions.  Check modifiers rather than flags for SHIFT
3103         bit count and m[ft]{hi,lo} direction.
3104         (usage): Pass program name to fprintf.
3105         (main): Remove unused variable this_option_optind.  Change
3106         ``*loptarg++'' to ``loptarg++''.
3107         (my_strtoul): Parenthesize && within ||.
3108         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3109         (simulate): If PC is odd, fetch a 16 bit instruction, and
3110         increment PC by 2 rather than 4.
3111         * configure.in: Add case for mips16*-*-*.
3112         * configure: Rebuild.
3113
3114 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
3115
3116         * interp.c: Allow -t to enable tracing in standalone simulator.
3117         Fix garbage output in trace file and error messages.
3118
3119 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
3120
3121         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3122         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3123         * configure.in: Simplify using macros in ../common/aclocal.m4.
3124         * configure: Regenerated.
3125         * tconfig.in: New file.
3126
3127 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
3128
3129         * interp.c: Fix bugs in 64-bit port.
3130         Use ansi function declarations for msvc compiler.
3131         Initialize and test file pointer in trace code.
3132         Prevent duplicate definition of LAST_EMED_REGNUM.
3133
3134 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
3135
3136         * interp.c (xfer_big_long): Prevent unwanted sign extension.
3137
3138 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
3139
3140         * interp.c (SignalException): Check for explicit terminating
3141         breakpoint value.
3142         * gencode.c: Pass instruction value through SignalException()
3143         calls for Trap, Breakpoint and Syscall.
3144
3145 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3146
3147         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3148         only used on those hosts that provide it.
3149         * configure.in: Add sqrt() to list of functions to be checked for.
3150         * config.in: Re-generated.
3151         * configure: Re-generated.
3152
3153 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3154
3155         * gencode.c (process_instructions): Call build_endian_shift when
3156         expanding STORE RIGHT, to fix swr.
3157         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3158         clear the high bits.
3159         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3160         Fix float to int conversions to produce signed values.
3161
3162 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
3163
3164         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3165         (process_instructions): Correct handling of nor instruction.
3166         Correct shift count for 32 bit shift instructions. Correct sign
3167         extension for arithmetic shifts to not shift the number of bits in
3168         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
3169         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
3170         Fix madd.
3171         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3172         It's OK to have a mult follow a mult.  What's not OK is to have a
3173         mult follow an mfhi.
3174         (Convert): Comment out incorrect rounding code.
3175
3176 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
3177
3178         * interp.c (sim_monitor): Improved monitor printf
3179         simulation. Tidied up simulator warnings, and added "--log" option
3180         for directing warning message output.
3181         * gencode.c: Use sim_warning() rather than WARNING macro.
3182
3183 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3184
3185         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3186         getopt1.o, rather than on gencode.c.  Link objects together.
3187         Don't link against -liberty.
3188         (gencode.o, getopt.o, getopt1.o): New targets.
3189         * gencode.c: Include <ctype.h> and "ansidecl.h".
3190         (AND): Undefine after including "ansidecl.h".
3191         (ULONG_MAX): Define if not defined.
3192         (OP_*): Don't define macros; now defined in opcode/mips.h.
3193         (main): Call my_strtoul rather than strtoul.
3194         (my_strtoul): New static function.
3195
3196 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
3197
3198         * gencode.c (process_instructions):  Generate word64 and uword64
3199         instead of `long long' and `unsigned long long' data types.
3200         * interp.c:  #include sysdep.h to get signals, and define default
3201         for SIGBUS.
3202         * (Convert):  Work around for Visual-C++ compiler bug with type
3203         conversion.
3204         * support.h:  Make things compile under Visual-C++ by using
3205         __int64 instead of `long long'.  Change many refs to long long
3206         into word64/uword64 typedefs.
3207
3208 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
3209
3210         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3211         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3212         (docdir): Removed.
3213         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3214         (AC_PROG_INSTALL): Added.
3215         (AC_PROG_CC): Moved to before configure.host call.
3216         * configure: Rebuilt.
3217
3218 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
3219
3220         * configure.in: Define @SIMCONF@ depending on mips target.
3221         * configure: Rebuild.
3222         * Makefile.in (run): Add @SIMCONF@ to control simulator
3223         construction.
3224         * gencode.c: Change LOADDRMASK to 64bit memory model only.
3225         * interp.c: Remove some debugging, provide more detailed error
3226         messages, update memory accesses to use LOADDRMASK.
3227
3228 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
3229
3230         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3231         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
3232         stamp-h.
3233         * configure: Rebuild.
3234         * config.in: New file, generated by autoheader.
3235         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
3236         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
3237         HAVE_ANINT and HAVE_AINT, as appropriate.
3238         * Makefile.in (run): Use @LIBS@ rather than -lm.
3239         (interp.o): Depend upon config.h.
3240         (Makefile): Just rebuild Makefile.
3241         (clean): Remove stamp-h.
3242         (mostlyclean): Make the same as clean, not as distclean.
3243         (config.h, stamp-h): New targets.
3244
3245 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3246
3247         * interp.c (ColdReset): Fix boolean test. Make all simulator
3248         globals static.
3249
3250 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
3251
3252         * interp.c (xfer_direct_word, xfer_direct_long,
3253         swap_direct_word, swap_direct_long, xfer_big_word,
3254         xfer_big_long, xfer_little_word, xfer_little_long,
3255         swap_word,swap_long): Added.
3256         * interp.c (ColdReset): Provide function indirection to
3257         host<->simulated_target transfer routines.
3258         * interp.c (sim_store_register, sim_fetch_register): Updated to
3259         make use of indirected transfer routines.
3260
3261 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
3262
3263         * gencode.c (process_instructions): Ensure FP ABS instruction
3264         recognised.
3265         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3266         system call support.
3267
3268 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
3269
3270         * interp.c (sim_do_command): Complain if callback structure not
3271         initialised.
3272
3273 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
3274
3275         * interp.c (Convert): Provide round-to-nearest and round-to-zero
3276         support for Sun hosts.
3277         * Makefile.in (gencode): Ensure the host compiler and libraries
3278         used for cross-hosted build.
3279
3280 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
3281
3282         * interp.c, gencode.c: Some more (TODO) tidying.
3283
3284 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
3285
3286         * gencode.c, interp.c: Replaced explicit long long references with
3287         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3288         * support.h (SET64LO, SET64HI): Macros added.
3289
3290 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
3291
3292         * configure: Regenerate with autoconf 2.7.
3293
3294 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
3295
3296         * interp.c (LoadMemory): Enclose text following #endif in /* */.
3297         * support.h: Remove superfluous "1" from #if.
3298         * support.h (CHECKSIM): Remove stray 'a' at end of line.
3299
3300 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
3301
3302         * interp.c (StoreFPR): Control UndefinedResult() call on
3303         WARN_RESULT manifest.
3304
3305 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
3306
3307         * gencode.c: Tidied instruction decoding, and added FP instruction
3308         support.
3309
3310         * interp.c: Added dineroIII, and BSD profiling support. Also
3311         run-time FP handling.
3312
3313 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
3314
3315         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3316         gencode.c, interp.c, support.h: created.