1 2015-03-24 Mike Frysinger <vapier@gentoo.org>
3 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
4 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
6 2015-03-24 Mike Frysinger <vapier@gentoo.org>
8 * configure: Regenerate.
10 2015-03-23 Mike Frysinger <vapier@gentoo.org>
12 * configure: Regenerate.
14 2015-03-23 Mike Frysinger <vapier@gentoo.org>
16 * configure: Regenerate.
17 * configure.ac (mips_extra_objs): Delete.
18 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
19 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
21 2015-03-23 Mike Frysinger <vapier@gentoo.org>
23 * configure: Regenerate.
24 * configure.ac: Delete sim_hw checks for dv-sockser.
26 2015-03-16 Mike Frysinger <vapier@gentoo.org>
28 * config.in, configure: Regenerate.
29 * tconfig.in: Rename file ...
30 * tconfig.h: ... here.
32 2015-03-15 Mike Frysinger <vapier@gentoo.org>
34 * tconfig.in: Delete includes.
35 [HAVE_DV_SOCKSER]: Delete.
37 2015-03-14 Mike Frysinger <vapier@gentoo.org>
39 * Makefile.in (SIM_RUN_OBJS): Delete.
41 2015-03-14 Mike Frysinger <vapier@gentoo.org>
43 * configure.ac (AC_CHECK_HEADERS): Delete.
44 * aclocal.m4, configure: Regenerate.
46 2014-08-19 Alan Modra <amodra@gmail.com>
48 * configure: Regenerate.
50 2014-08-15 Roland McGrath <mcgrathr@google.com>
52 * configure: Regenerate.
53 * config.in: Regenerate.
55 2014-03-04 Mike Frysinger <vapier@gentoo.org>
57 * configure: Regenerate.
59 2013-09-23 Alan Modra <amodra@gmail.com>
61 * configure: Regenerate.
63 2013-06-03 Mike Frysinger <vapier@gentoo.org>
65 * aclocal.m4, configure: Regenerate.
67 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
71 2013-03-26 Mike Frysinger <vapier@gentoo.org>
73 * configure: Regenerate.
75 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
77 * configure.ac: Address use of dv-sockser.o.
78 * tconfig.in: Conditionalize use of dv_sockser_install.
79 * configure: Regenerated.
80 * config.in: Regenerated.
82 2012-10-04 Chao-ying Fu <fu@mips.com>
83 Steve Ellcey <sellcey@mips.com>
85 * mips/mips3264r2.igen (rdhwr): New.
87 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
89 * configure.ac: Always link against dv-sockser.o.
90 * configure: Regenerate.
92 2012-06-15 Joel Brobecker <brobecker@adacore.com>
94 * config.in, configure: Regenerate.
96 2012-05-18 Nick Clifton <nickc@redhat.com>
99 * interp.c: Include config.h before system header files.
101 2012-03-24 Mike Frysinger <vapier@gentoo.org>
103 * aclocal.m4, config.in, configure: Regenerate.
105 2011-12-03 Mike Frysinger <vapier@gentoo.org>
107 * aclocal.m4: New file.
108 * configure: Regenerate.
110 2011-10-19 Mike Frysinger <vapier@gentoo.org>
112 * configure: Regenerate after common/acinclude.m4 update.
114 2011-10-17 Mike Frysinger <vapier@gentoo.org>
116 * configure.ac: Change include to common/acinclude.m4.
118 2011-10-17 Mike Frysinger <vapier@gentoo.org>
120 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
121 call. Replace common.m4 include with SIM_AC_COMMON.
122 * configure: Regenerate.
124 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
126 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
128 (tmp-mach-multi): Exit early when igen fails.
130 2011-07-05 Mike Frysinger <vapier@gentoo.org>
132 * interp.c (sim_do_command): Delete.
134 2011-02-14 Mike Frysinger <vapier@gentoo.org>
136 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
137 (tx3904sio_fifo_reset): Likewise.
138 * interp.c (sim_monitor): Likewise.
140 2010-04-14 Mike Frysinger <vapier@gentoo.org>
142 * interp.c (sim_write): Add const to buffer arg.
144 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
146 * interp.c: Don't include sysdep.h
148 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
150 * configure: Regenerate.
152 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
154 * config.in: Regenerate.
155 * configure: Likewise.
157 * configure: Regenerate.
159 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
161 * configure: Regenerate to track ../common/common.m4 changes.
164 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
165 Daniel Jacobowitz <dan@codesourcery.com>
166 Joseph Myers <joseph@codesourcery.com>
168 * configure: Regenerate.
170 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
172 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
173 that unconditionally allows fmt_ps.
174 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
175 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
176 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
177 filter from 64,f to 32,f.
178 (PREFX): Change filter from 64 to 32.
179 (LDXC1, LUXC1): Provide separate mips32r2 implementations
180 that use do_load_double instead of do_load. Make both LUXC1
181 versions unpredictable if SizeFGR () != 64.
182 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
183 instead of do_store. Remove unused variable. Make both SUXC1
184 versions unpredictable if SizeFGR () != 64.
186 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
188 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
189 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
190 shifts for that case.
192 2007-09-04 Nick Clifton <nickc@redhat.com>
194 * interp.c (options enum): Add OPTION_INFO_MEMORY.
195 (display_mem_info): New static variable.
196 (mips_option_handler): Handle OPTION_INFO_MEMORY.
197 (mips_options): Add info-memory and memory-info.
198 (sim_open): After processing the command line and board
199 specification, check display_mem_info. If it is set then
200 call the real handler for the --memory-info command line
203 2007-08-24 Joel Brobecker <brobecker@adacore.com>
205 * configure.ac: Change license of multi-run.c to GPL version 3.
206 * configure: Regenerate.
208 2007-06-28 Richard Sandiford <richard@codesourcery.com>
210 * configure.ac, configure: Revert last patch.
212 2007-06-26 Richard Sandiford <richard@codesourcery.com>
214 * configure.ac (sim_mipsisa3264_configs): New variable.
215 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
216 every configuration support all four targets, using the triplet to
217 determine the default.
218 * configure: Regenerate.
220 2007-06-25 Richard Sandiford <richard@codesourcery.com>
222 * Makefile.in (m16run.o): New rule.
224 2007-05-15 Thiemo Seufer <ths@mips.com>
226 * mips3264r2.igen (DSHD): Fix compile warning.
228 2007-05-14 Thiemo Seufer <ths@mips.com>
230 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
231 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
232 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
233 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
236 2007-03-01 Thiemo Seufer <ths@mips.com>
238 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
241 2007-02-20 Thiemo Seufer <ths@mips.com>
243 * dsp.igen: Update copyright notice.
244 * dsp2.igen: Fix copyright notice.
246 2007-02-20 Thiemo Seufer <ths@mips.com>
247 Chao-Ying Fu <fu@mips.com>
249 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
250 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
251 Add dsp2 to sim_igen_machine.
252 * configure: Regenerate.
253 * dsp.igen (do_ph_op): Add MUL support when op = 2.
254 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
255 (mulq_rs.ph): Use do_ph_mulq.
256 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
257 * mips.igen: Add dsp2 model and include dsp2.igen.
258 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
259 for *mips32r2, *mips64r2, *dsp.
260 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
261 for *mips32r2, *mips64r2, *dsp2.
262 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
264 2007-02-19 Thiemo Seufer <ths@mips.com>
265 Nigel Stephens <nigel@mips.com>
267 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
268 jumps with hazard barrier.
270 2007-02-19 Thiemo Seufer <ths@mips.com>
271 Nigel Stephens <nigel@mips.com>
273 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
274 after each call to sim_io_write.
276 2007-02-19 Thiemo Seufer <ths@mips.com>
277 Nigel Stephens <nigel@mips.com>
279 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
280 supported by this simulator.
281 (decode_coproc): Recognise additional CP0 Config registers
284 2007-02-19 Thiemo Seufer <ths@mips.com>
285 Nigel Stephens <nigel@mips.com>
286 David Ung <davidu@mips.com>
288 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
289 uninterpreted formats. If fmt is one of the uninterpreted types
290 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
291 fmt_word, and fmt_uninterpreted_64 like fmt_long.
292 (store_fpr): When writing an invalid odd register, set the
293 matching even register to fmt_unknown, not the following register.
294 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
295 the the memory window at offset 0 set by --memory-size command
297 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
299 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
301 (sim_monitor): When returning the memory size to the MIPS
302 application, use the value in STATE_MEM_SIZE, not an arbitrary
304 (cop_lw): Don' mess around with FPR_STATE, just pass
305 fmt_uninterpreted_32 to StoreFPR.
307 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
309 * mips.igen (not_word_value): Single version for mips32, mips64
312 2007-02-19 Thiemo Seufer <ths@mips.com>
313 Nigel Stephens <nigel@mips.com>
315 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
318 2007-02-17 Thiemo Seufer <ths@mips.com>
320 * configure.ac (mips*-sde-elf*): Move in front of generic machine
322 * configure: Regenerate.
324 2007-02-17 Thiemo Seufer <ths@mips.com>
326 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
327 Add mdmx to sim_igen_machine.
328 (mipsisa64*-*-*): Likewise. Remove dsp.
329 (mipsisa32*-*-*): Remove dsp.
330 * configure: Regenerate.
332 2007-02-13 Thiemo Seufer <ths@mips.com>
334 * configure.ac: Add mips*-sde-elf* target.
335 * configure: Regenerate.
337 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
339 * acconfig.h: Remove.
340 * config.in, configure: Regenerate.
342 2006-11-07 Thiemo Seufer <ths@mips.com>
344 * dsp.igen (do_w_op): Fix compiler warning.
346 2006-08-29 Thiemo Seufer <ths@mips.com>
347 David Ung <davidu@mips.com>
349 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
351 * configure: Regenerate.
352 * mips.igen (model): Add smartmips.
353 (MADDU): Increment ACX if carry.
354 (do_mult): Clear ACX.
355 (ROR,RORV): Add smartmips.
356 (include): Include smartmips.igen.
357 * sim-main.h (ACX): Set to REGISTERS[89].
358 * smartmips.igen: New file.
360 2006-08-29 Thiemo Seufer <ths@mips.com>
361 David Ung <davidu@mips.com>
363 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
364 mips3264r2.igen. Add missing dependency rules.
365 * m16e.igen: Support for mips16e save/restore instructions.
367 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
369 * configure: Regenerated.
371 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
373 * configure: Regenerated.
375 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
377 * configure: Regenerated.
379 2006-05-15 Chao-ying Fu <fu@mips.com>
381 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
383 2006-04-18 Nick Clifton <nickc@redhat.com>
385 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
388 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
390 * configure: Regenerate.
392 2005-12-14 Chao-ying Fu <fu@mips.com>
394 * Makefile.in (SIM_OBJS): Add dsp.o.
395 (dsp.o): New dependency.
396 (IGEN_INCLUDE): Add dsp.igen.
397 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
398 mipsisa64*-*-*): Add dsp to sim_igen_machine.
399 * configure: Regenerate.
400 * mips.igen: Add dsp model and include dsp.igen.
401 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
402 because these instructions are extended in DSP ASE.
403 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
404 adding 6 DSP accumulator registers and 1 DSP control register.
405 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
406 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
407 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
408 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
409 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
410 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
411 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
412 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
413 DSPCR_CCOND_SMASK): New define.
414 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
415 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
417 2005-07-08 Ian Lance Taylor <ian@airs.com>
419 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
421 2005-06-16 David Ung <davidu@mips.com>
422 Nigel Stephens <nigel@mips.com>
424 * mips.igen: New mips16e model and include m16e.igen.
425 (check_u64): Add mips16e tag.
426 * m16e.igen: New file for MIPS16e instructions.
427 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
428 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
430 * configure: Regenerate.
432 2005-05-26 David Ung <davidu@mips.com>
434 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
435 tags to all instructions which are applicable to the new ISAs.
436 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
438 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
440 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
442 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
443 * configure: Regenerate.
445 2005-03-23 Mark Kettenis <kettenis@gnu.org>
447 * configure: Regenerate.
449 2005-01-14 Andrew Cagney <cagney@gnu.org>
451 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
452 explicit call to AC_CONFIG_HEADER.
453 * configure: Regenerate.
455 2005-01-12 Andrew Cagney <cagney@gnu.org>
457 * configure.ac: Update to use ../common/common.m4.
458 * configure: Re-generate.
460 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
462 * configure: Regenerated to track ../common/aclocal.m4 changes.
464 2005-01-07 Andrew Cagney <cagney@gnu.org>
466 * configure.ac: Rename configure.in, require autoconf 2.59.
467 * configure: Re-generate.
469 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
471 * configure: Regenerate for ../common/aclocal.m4 update.
473 2004-09-24 Monika Chaddha <monika@acmet.com>
475 Committed by Andrew Cagney.
476 * m16.igen (CMP, CMPI): Fix assembler.
478 2004-08-18 Chris Demetriou <cgd@broadcom.com>
480 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
481 * configure: Regenerate.
483 2004-06-25 Chris Demetriou <cgd@broadcom.com>
485 * configure.in (sim_m16_machine): Include mipsIII.
486 * configure: Regenerate.
488 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
490 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
492 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
494 2004-04-10 Chris Demetriou <cgd@broadcom.com>
496 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
498 2004-04-09 Chris Demetriou <cgd@broadcom.com>
500 * mips.igen (check_fmt): Remove.
501 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
502 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
503 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
504 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
505 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
506 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
507 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
508 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
509 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
510 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
512 2004-04-09 Chris Demetriou <cgd@broadcom.com>
514 * sb1.igen (check_sbx): New function.
515 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
517 2004-03-29 Chris Demetriou <cgd@broadcom.com>
518 Richard Sandiford <rsandifo@redhat.com>
520 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
521 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
522 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
523 separate implementations for mipsIV and mipsV. Use new macros to
524 determine whether the restrictions apply.
526 2004-01-19 Chris Demetriou <cgd@broadcom.com>
528 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
529 (check_mult_hilo): Improve comments.
530 (check_div_hilo): Likewise. Also, fork off a new version
531 to handle mips32/mips64 (since there are no hazards to check
534 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
536 * mips.igen (do_dmultx): Fix check for negative operands.
538 2003-05-16 Ian Lance Taylor <ian@airs.com>
540 * Makefile.in (SHELL): Make sure this is defined.
541 (various): Use $(SHELL) whenever we invoke move-if-change.
543 2003-05-03 Chris Demetriou <cgd@broadcom.com>
545 * cp1.c: Tweak attribution slightly.
548 * mdmx.igen: Likewise.
549 * mips3d.igen: Likewise.
550 * sb1.igen: Likewise.
552 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
554 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
557 2003-02-27 Andrew Cagney <cagney@redhat.com>
559 * interp.c (sim_open): Rename _bfd to bfd.
560 (sim_create_inferior): Ditto.
562 2003-01-14 Chris Demetriou <cgd@broadcom.com>
564 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
566 2003-01-14 Chris Demetriou <cgd@broadcom.com>
568 * mips.igen (EI, DI): Remove.
570 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
572 * Makefile.in (tmp-run-multi): Fix mips16 filter.
574 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
575 Andrew Cagney <ac131313@redhat.com>
576 Gavin Romig-Koch <gavin@redhat.com>
577 Graydon Hoare <graydon@redhat.com>
578 Aldy Hernandez <aldyh@redhat.com>
579 Dave Brolley <brolley@redhat.com>
580 Chris Demetriou <cgd@broadcom.com>
582 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
583 (sim_mach_default): New variable.
584 (mips64vr-*-*, mips64vrel-*-*): New configurations.
585 Add a new simulator generator, MULTI.
586 * configure: Regenerate.
587 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
588 (multi-run.o): New dependency.
589 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
590 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
591 (tmp-multi): Combine them.
592 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
593 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
594 (distclean-extra): New rule.
595 * sim-main.h: Include bfd.h.
596 (MIPS_MACH): New macro.
597 * mips.igen (vr4120, vr5400, vr5500): New models.
598 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
599 * vr.igen: Replace with new version.
601 2003-01-04 Chris Demetriou <cgd@broadcom.com>
603 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
604 * configure: Regenerate.
606 2002-12-31 Chris Demetriou <cgd@broadcom.com>
608 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
609 * mips.igen: Remove all invocations of check_branch_bug and
612 2002-12-16 Chris Demetriou <cgd@broadcom.com>
614 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
616 2002-07-30 Chris Demetriou <cgd@broadcom.com>
618 * mips.igen (do_load_double, do_store_double): New functions.
619 (LDC1, SDC1): Rename to...
620 (LDC1b, SDC1b): respectively.
621 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
623 2002-07-29 Michael Snyder <msnyder@redhat.com>
625 * cp1.c (fp_recip2): Modify initialization expression so that
626 GCC will recognize it as constant.
628 2002-06-18 Chris Demetriou <cgd@broadcom.com>
630 * mdmx.c (SD_): Delete.
631 (Unpredictable): Re-define, for now, to directly invoke
632 unpredictable_action().
633 (mdmx_acc_op): Fix error in .ob immediate handling.
635 2002-06-18 Andrew Cagney <cagney@redhat.com>
637 * interp.c (sim_firmware_command): Initialize `address'.
639 2002-06-16 Andrew Cagney <ac131313@redhat.com>
641 * configure: Regenerated to track ../common/aclocal.m4 changes.
643 2002-06-14 Chris Demetriou <cgd@broadcom.com>
644 Ed Satterthwaite <ehs@broadcom.com>
646 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
647 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
648 * mips.igen: Include mips3d.igen.
649 (mips3d): New model name for MIPS-3D ASE instructions.
650 (CVT.W.fmt): Don't use this instruction for word (source) format
652 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
653 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
654 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
655 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
656 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
657 (RSquareRoot1, RSquareRoot2): New macros.
658 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
659 (fp_rsqrt2): New functions.
660 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
661 * configure: Regenerate.
663 2002-06-13 Chris Demetriou <cgd@broadcom.com>
664 Ed Satterthwaite <ehs@broadcom.com>
666 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
667 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
668 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
669 (convert): Note that this function is not used for paired-single
671 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
672 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
673 (check_fmt_p): Enable paired-single support.
674 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
675 (PUU.PS): New instructions.
676 (CVT.S.fmt): Don't use this instruction for paired-single format
678 * sim-main.h (FP_formats): New value 'fmt_ps.'
679 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
680 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
682 2002-06-12 Chris Demetriou <cgd@broadcom.com>
684 * mips.igen: Fix formatting of function calls in
687 2002-06-12 Chris Demetriou <cgd@broadcom.com>
689 * mips.igen (MOVN, MOVZ): Trace result.
690 (TNEI): Print "tnei" as the opcode name in traces.
691 (CEIL.W): Add disassembly string for traces.
692 (RSQRT.fmt): Make location of disassembly string consistent
693 with other instructions.
695 2002-06-12 Chris Demetriou <cgd@broadcom.com>
697 * mips.igen (X): Delete unused function.
699 2002-06-08 Andrew Cagney <cagney@redhat.com>
701 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
703 2002-06-07 Chris Demetriou <cgd@broadcom.com>
704 Ed Satterthwaite <ehs@broadcom.com>
706 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
707 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
708 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
709 (fp_nmsub): New prototypes.
710 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
711 (NegMultiplySub): New defines.
712 * mips.igen (RSQRT.fmt): Use RSquareRoot().
713 (MADD.D, MADD.S): Replace with...
714 (MADD.fmt): New instruction.
715 (MSUB.D, MSUB.S): Replace with...
716 (MSUB.fmt): New instruction.
717 (NMADD.D, NMADD.S): Replace with...
718 (NMADD.fmt): New instruction.
719 (NMSUB.D, MSUB.S): Replace with...
720 (NMSUB.fmt): New instruction.
722 2002-06-07 Chris Demetriou <cgd@broadcom.com>
723 Ed Satterthwaite <ehs@broadcom.com>
725 * cp1.c: Fix more comment spelling and formatting.
726 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
727 (denorm_mode): New function.
728 (fpu_unary, fpu_binary): Round results after operation, collect
729 status from rounding operations, and update the FCSR.
730 (convert): Collect status from integer conversions and rounding
731 operations, and update the FCSR. Adjust NaN values that result
732 from conversions. Convert to use sim_io_eprintf rather than
733 fprintf, and remove some debugging code.
734 * cp1.h (fenr_FS): New define.
736 2002-06-07 Chris Demetriou <cgd@broadcom.com>
738 * cp1.c (convert): Remove unusable debugging code, and move MIPS
739 rounding mode to sim FP rounding mode flag conversion code into...
740 (rounding_mode): New function.
742 2002-06-07 Chris Demetriou <cgd@broadcom.com>
744 * cp1.c: Clean up formatting of a few comments.
745 (value_fpr): Reformat switch statement.
747 2002-06-06 Chris Demetriou <cgd@broadcom.com>
748 Ed Satterthwaite <ehs@broadcom.com>
751 * sim-main.h: Include cp1.h.
752 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
753 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
754 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
755 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
756 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
757 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
758 * cp1.c: Don't include sim-fpu.h; already included by
759 sim-main.h. Clean up formatting of some comments.
760 (NaN, Equal, Less): Remove.
761 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
762 (fp_cmp): New functions.
763 * mips.igen (do_c_cond_fmt): Remove.
764 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
765 Compare. Add result tracing.
766 (CxC1): Remove, replace with...
767 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
768 (DMxC1): Remove, replace with...
769 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
770 (MxC1): Remove, replace with...
771 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
773 2002-06-04 Chris Demetriou <cgd@broadcom.com>
775 * sim-main.h (FGRIDX): Remove, replace all uses with...
776 (FGR_BASE): New macro.
777 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
778 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
779 (NR_FGR, FGR): Likewise.
780 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
781 * mips.igen: Likewise.
783 2002-06-04 Chris Demetriou <cgd@broadcom.com>
785 * cp1.c: Add an FSF Copyright notice to this file.
787 2002-06-04 Chris Demetriou <cgd@broadcom.com>
788 Ed Satterthwaite <ehs@broadcom.com>
790 * cp1.c (Infinity): Remove.
791 * sim-main.h (Infinity): Likewise.
793 * cp1.c (fp_unary, fp_binary): New functions.
794 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
795 (fp_sqrt): New functions, implemented in terms of the above.
796 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
797 (Recip, SquareRoot): Remove (replaced by functions above).
798 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
799 (fp_recip, fp_sqrt): New prototypes.
800 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
801 (Recip, SquareRoot): Replace prototypes with #defines which
802 invoke the functions above.
804 2002-06-03 Chris Demetriou <cgd@broadcom.com>
806 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
807 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
808 file, remove PARAMS from prototypes.
809 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
810 simulator state arguments.
811 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
812 pass simulator state arguments.
813 * cp1.c (SD): Redefine as CPU_STATE(cpu).
814 (store_fpr, convert): Remove 'sd' argument.
815 (value_fpr): Likewise. Convert to use 'SD' instead.
817 2002-06-03 Chris Demetriou <cgd@broadcom.com>
819 * cp1.c (Min, Max): Remove #if 0'd functions.
820 * sim-main.h (Min, Max): Remove.
822 2002-06-03 Chris Demetriou <cgd@broadcom.com>
824 * cp1.c: fix formatting of switch case and default labels.
825 * interp.c: Likewise.
826 * sim-main.c: Likewise.
828 2002-06-03 Chris Demetriou <cgd@broadcom.com>
830 * cp1.c: Clean up comments which describe FP formats.
831 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
833 2002-06-03 Chris Demetriou <cgd@broadcom.com>
834 Ed Satterthwaite <ehs@broadcom.com>
836 * configure.in (mipsisa64sb1*-*-*): New target for supporting
837 Broadcom SiByte SB-1 processor configurations.
838 * configure: Regenerate.
839 * sb1.igen: New file.
840 * mips.igen: Include sb1.igen.
842 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
843 * mdmx.igen: Add "sb1" model to all appropriate functions and
845 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
846 (ob_func, ob_acc): Reference the above.
847 (qh_acc): Adjust to keep the same size as ob_acc.
848 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
849 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
851 2002-06-03 Chris Demetriou <cgd@broadcom.com>
853 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
855 2002-06-02 Chris Demetriou <cgd@broadcom.com>
856 Ed Satterthwaite <ehs@broadcom.com>
858 * mips.igen (mdmx): New (pseudo-)model.
859 * mdmx.c, mdmx.igen: New files.
860 * Makefile.in (SIM_OBJS): Add mdmx.o.
861 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
863 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
864 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
865 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
866 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
867 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
868 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
869 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
870 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
871 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
872 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
873 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
874 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
875 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
876 (qh_fmtsel): New macros.
877 (_sim_cpu): New member "acc".
878 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
879 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
881 2002-05-01 Chris Demetriou <cgd@broadcom.com>
883 * interp.c: Use 'deprecated' rather than 'depreciated.'
884 * sim-main.h: Likewise.
886 2002-05-01 Chris Demetriou <cgd@broadcom.com>
888 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
889 which wouldn't compile anyway.
890 * sim-main.h (unpredictable_action): New function prototype.
891 (Unpredictable): Define to call igen function unpredictable().
892 (NotWordValue): New macro to call igen function not_word_value().
893 (UndefinedResult): Remove.
894 * interp.c (undefined_result): Remove.
895 (unpredictable_action): New function.
896 * mips.igen (not_word_value, unpredictable): New functions.
897 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
898 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
899 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
900 NotWordValue() to check for unpredictable inputs, then
901 Unpredictable() to handle them.
903 2002-02-24 Chris Demetriou <cgd@broadcom.com>
905 * mips.igen: Fix formatting of calls to Unpredictable().
907 2002-04-20 Andrew Cagney <ac131313@redhat.com>
909 * interp.c (sim_open): Revert previous change.
911 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
913 * interp.c (sim_open): Disable chunk of code that wrote code in
914 vector table entries.
916 2002-03-19 Chris Demetriou <cgd@broadcom.com>
918 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
919 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
922 2002-03-19 Chris Demetriou <cgd@broadcom.com>
924 * cp1.c: Fix many formatting issues.
926 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
928 * cp1.c (fpu_format_name): New function to replace...
929 (DOFMT): This. Delete, and update all callers.
930 (fpu_rounding_mode_name): New function to replace...
931 (RMMODE): This. Delete, and update all callers.
933 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
935 * interp.c: Move FPU support routines from here to...
936 * cp1.c: Here. New file.
937 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
940 2002-03-12 Chris Demetriou <cgd@broadcom.com>
942 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
943 * mips.igen (mips32, mips64): New models, add to all instructions
944 and functions as appropriate.
945 (loadstore_ea, check_u64): New variant for model mips64.
946 (check_fmt_p): New variant for models mipsV and mips64, remove
947 mipsV model marking fro other variant.
950 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
951 for mips32 and mips64.
952 (DCLO, DCLZ): New instructions for mips64.
954 2002-03-07 Chris Demetriou <cgd@broadcom.com>
956 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
957 immediate or code as a hex value with the "%#lx" format.
958 (ANDI): Likewise, and fix printed instruction name.
960 2002-03-05 Chris Demetriou <cgd@broadcom.com>
962 * sim-main.h (UndefinedResult, Unpredictable): New macros
963 which currently do nothing.
965 2002-03-05 Chris Demetriou <cgd@broadcom.com>
967 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
968 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
969 (status_CU3): New definitions.
971 * sim-main.h (ExceptionCause): Add new values for MIPS32
972 and MIPS64: MDMX, MCheck, CacheErr. Update comments
973 for DebugBreakPoint and NMIReset to note their status in
975 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
976 (SignalExceptionCacheErr): New exception macros.
978 2002-03-05 Chris Demetriou <cgd@broadcom.com>
980 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
981 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
983 (SignalExceptionCoProcessorUnusable): Take as argument the
984 unusable coprocessor number.
986 2002-03-05 Chris Demetriou <cgd@broadcom.com>
988 * mips.igen: Fix formatting of all SignalException calls.
990 2002-03-05 Chris Demetriou <cgd@broadcom.com>
992 * sim-main.h (SIGNEXTEND): Remove.
994 2002-03-04 Chris Demetriou <cgd@broadcom.com>
996 * mips.igen: Remove gencode comment from top of file, fix
997 spelling in another comment.
999 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1001 * mips.igen (check_fmt, check_fmt_p): New functions to check
1002 whether specific floating point formats are usable.
1003 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1004 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1005 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1006 Use the new functions.
1007 (do_c_cond_fmt): Remove format checks...
1008 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1010 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1012 * mips.igen: Fix formatting of check_fpu calls.
1014 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1016 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1018 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1020 * mips.igen: Remove whitespace at end of lines.
1022 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1024 * mips.igen (loadstore_ea): New function to do effective
1025 address calculations.
1026 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1027 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1028 CACHE): Use loadstore_ea to do effective address computations.
1030 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1032 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1033 * mips.igen (LL, CxC1, MxC1): Likewise.
1035 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1037 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1038 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1039 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1040 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1041 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1042 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1043 Don't split opcode fields by hand, use the opcode field values
1046 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1048 * mips.igen (do_divu): Fix spacing.
1050 * mips.igen (do_dsllv): Move to be right before DSLLV,
1051 to match the rest of the do_<shift> functions.
1053 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1055 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1056 DSRL32, do_dsrlv): Trace inputs and results.
1058 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1060 * mips.igen (CACHE): Provide instruction-printing string.
1062 * interp.c (signal_exception): Comment tokens after #endif.
1064 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1066 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1067 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1068 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1069 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1070 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1071 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1072 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1073 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1075 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1077 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1078 instruction-printing string.
1079 (LWU): Use '64' as the filter flag.
1081 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1083 * mips.igen (SDXC1): Fix instruction-printing string.
1085 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1087 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1088 filter flags "32,f".
1090 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1092 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1095 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1097 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1098 add a comma) so that it more closely match the MIPS ISA
1099 documentation opcode partitioning.
1100 (PREF): Put useful names on opcode fields, and include
1101 instruction-printing string.
1103 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1105 * mips.igen (check_u64): New function which in the future will
1106 check whether 64-bit instructions are usable and signal an
1107 exception if not. Currently a no-op.
1108 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1109 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1110 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1111 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1113 * mips.igen (check_fpu): New function which in the future will
1114 check whether FPU instructions are usable and signal an exception
1115 if not. Currently a no-op.
1116 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1117 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1118 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1119 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1120 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1121 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1122 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1123 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1125 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1127 * mips.igen (do_load_left, do_load_right): Move to be immediately
1129 (do_store_left, do_store_right): Move to be immediately following
1132 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1134 * mips.igen (mipsV): New model name. Also, add it to
1135 all instructions and functions where it is appropriate.
1137 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1139 * mips.igen: For all functions and instructions, list model
1140 names that support that instruction one per line.
1142 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1144 * mips.igen: Add some additional comments about supported
1145 models, and about which instructions go where.
1146 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1147 order as is used in the rest of the file.
1149 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1151 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1152 indicating that ALU32_END or ALU64_END are there to check
1154 (DADD): Likewise, but also remove previous comment about
1157 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1159 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1160 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1161 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1162 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1163 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1164 fields (i.e., add and move commas) so that they more closely
1165 match the MIPS ISA documentation opcode partitioning.
1167 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1169 * mips.igen (ADDI): Print immediate value.
1170 (BREAK): Print code.
1171 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1172 (SLL): Print "nop" specially, and don't run the code
1173 that does the shift for the "nop" case.
1175 2001-11-17 Fred Fish <fnf@redhat.com>
1177 * sim-main.h (float_operation): Move enum declaration outside
1178 of _sim_cpu struct declaration.
1180 2001-04-12 Jim Blandy <jimb@redhat.com>
1182 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1183 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1185 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1186 PENDING_FILL, and you can get the intended effect gracefully by
1187 calling PENDING_SCHED directly.
1189 2001-02-23 Ben Elliston <bje@redhat.com>
1191 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1192 already defined elsewhere.
1194 2001-02-19 Ben Elliston <bje@redhat.com>
1196 * sim-main.h (sim_monitor): Return an int.
1197 * interp.c (sim_monitor): Add return values.
1198 (signal_exception): Handle error conditions from sim_monitor.
1200 2001-02-08 Ben Elliston <bje@redhat.com>
1202 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1203 (store_memory): Likewise, pass cia to sim_core_write*.
1205 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1207 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1208 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1210 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1212 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1213 * Makefile.in: Don't delete *.igen when cleaning directory.
1215 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1217 * m16.igen (break): Call SignalException not sim_engine_halt.
1219 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1221 From Jason Eckhardt:
1222 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1224 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1226 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1228 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1230 * mips.igen (do_dmultx): Fix typo.
1232 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1234 * configure: Regenerated to track ../common/aclocal.m4 changes.
1236 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1238 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1240 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1242 * sim-main.h (GPR_CLEAR): Define macro.
1244 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1246 * interp.c (decode_coproc): Output long using %lx and not %s.
1248 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1250 * interp.c (sim_open): Sort & extend dummy memory regions for
1251 --board=jmr3904 for eCos.
1253 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1255 * configure: Regenerated.
1257 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1259 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1260 calls, conditional on the simulator being in verbose mode.
1262 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1264 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1265 cache don't get ReservedInstruction traps.
1267 1999-11-29 Mark Salter <msalter@cygnus.com>
1269 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1270 to clear status bits in sdisr register. This is how the hardware works.
1272 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1273 being used by cygmon.
1275 1999-11-11 Andrew Haley <aph@cygnus.com>
1277 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1280 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1282 * mips.igen (MULT): Correct previous mis-applied patch.
1284 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1286 * mips.igen (delayslot32): Handle sequence like
1287 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1288 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1289 (MULT): Actually pass the third register...
1291 1999-09-03 Mark Salter <msalter@cygnus.com>
1293 * interp.c (sim_open): Added more memory aliases for additional
1294 hardware being touched by cygmon on jmr3904 board.
1296 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1298 * configure: Regenerated to track ../common/aclocal.m4 changes.
1300 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1302 * interp.c (sim_store_register): Handle case where client - GDB -
1303 specifies that a 4 byte register is 8 bytes in size.
1304 (sim_fetch_register): Ditto.
1306 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1308 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1309 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1310 (idt_monitor_base): Base address for IDT monitor traps.
1311 (pmon_monitor_base): Ditto for PMON.
1312 (lsipmon_monitor_base): Ditto for LSI PMON.
1313 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1314 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1315 (sim_firmware_command): New function.
1316 (mips_option_handler): Call it for OPTION_FIRMWARE.
1317 (sim_open): Allocate memory for idt_monitor region. If "--board"
1318 option was given, add no monitor by default. Add BREAK hooks only if
1319 monitors are also there.
1321 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1323 * interp.c (sim_monitor): Flush output before reading input.
1325 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1327 * tconfig.in (SIM_HANDLES_LMA): Always define.
1329 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1331 From Mark Salter <msalter@cygnus.com>:
1332 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1333 (sim_open): Add setup for BSP board.
1335 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1337 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1338 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1339 them as unimplemented.
1341 1999-05-08 Felix Lee <flee@cygnus.com>
1343 * configure: Regenerated to track ../common/aclocal.m4 changes.
1345 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1347 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1349 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1351 * configure.in: Any mips64vr5*-*-* target should have
1352 -DTARGET_ENABLE_FR=1.
1353 (default_endian): Any mips64vr*el-*-* target should default to
1355 * configure: Re-generate.
1357 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1359 * mips.igen (ldl): Extend from _16_, not 32.
1361 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1363 * interp.c (sim_store_register): Force registers written to by GDB
1364 into an un-interpreted state.
1366 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1368 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1369 CPU, start periodic background I/O polls.
1370 (tx3904sio_poll): New function: periodic I/O poller.
1372 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1374 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1376 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1378 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1381 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1383 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1384 (load_word): Call SIM_CORE_SIGNAL hook on error.
1385 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1386 starting. For exception dispatching, pass PC instead of NULL_CIA.
1387 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1388 * sim-main.h (COP0_BADVADDR): Define.
1389 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1390 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1391 (_sim_cpu): Add exc_* fields to store register value snapshots.
1392 * mips.igen (*): Replace memory-related SignalException* calls
1393 with references to SIM_CORE_SIGNAL hook.
1395 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1397 * sim-main.c (*): Minor warning cleanups.
1399 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1401 * m16.igen (DADDIU5): Correct type-o.
1403 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1405 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1408 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1410 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1412 (interp.o): Add dependency on itable.h
1413 (oengine.c, gencode): Delete remaining references.
1414 (BUILT_SRC_FROM_GEN): Clean up.
1416 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1419 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1420 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1421 tmp-run-hack) : New.
1422 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1423 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1424 Drop the "64" qualifier to get the HACK generator working.
1425 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1426 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1427 qualifier to get the hack generator working.
1428 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1429 (DSLL): Use do_dsll.
1430 (DSLLV): Use do_dsllv.
1431 (DSRA): Use do_dsra.
1432 (DSRL): Use do_dsrl.
1433 (DSRLV): Use do_dsrlv.
1434 (BC1): Move *vr4100 to get the HACK generator working.
1435 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1436 get the HACK generator working.
1437 (MACC) Rename to get the HACK generator working.
1438 (DMACC,MACCS,DMACCS): Add the 64.
1440 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1442 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1443 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1445 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1447 * mips/interp.c (DEBUG): Cleanups.
1449 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1451 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1452 (tx3904sio_tickle): fflush after a stdout character output.
1454 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1456 * interp.c (sim_close): Uninstall modules.
1458 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1460 * sim-main.h, interp.c (sim_monitor): Change to global
1463 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1465 * configure.in (vr4100): Only include vr4100 instructions in
1467 * configure: Re-generate.
1468 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1470 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1472 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1473 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1476 * configure.in (sim_default_gen, sim_use_gen): Replace with
1478 (--enable-sim-igen): Delete config option. Always using IGEN.
1479 * configure: Re-generate.
1481 * Makefile.in (gencode): Kill, kill, kill.
1484 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1486 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1487 bit mips16 igen simulator.
1488 * configure: Re-generate.
1490 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1491 as part of vr4100 ISA.
1492 * vr.igen: Mark all instructions as 64 bit only.
1494 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1496 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1499 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1501 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1502 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1503 * configure: Re-generate.
1505 * m16.igen (BREAK): Define breakpoint instruction.
1506 (JALX32): Mark instruction as mips16 and not r3900.
1507 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1509 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1511 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1513 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1514 insn as a debug breakpoint.
1516 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1518 (PENDING_SCHED): Clean up trace statement.
1519 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1520 (PENDING_FILL): Delay write by only one cycle.
1521 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1523 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1525 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1527 (pending_tick): Move incrementing of index to FOR statement.
1528 (pending_tick): Only update PENDING_OUT after a write has occured.
1530 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1532 * configure: Re-generate.
1534 * interp.c (sim_engine_run OLD): Delete explicit call to
1535 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1537 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1539 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1540 interrupt level number to match changed SignalExceptionInterrupt
1543 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1545 * interp.c: #include "itable.h" if WITH_IGEN.
1546 (get_insn_name): New function.
1547 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1548 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1550 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1552 * configure: Rebuilt to inhale new common/aclocal.m4.
1554 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1556 * dv-tx3904sio.c: Include sim-assert.h.
1558 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1560 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1561 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1562 Reorganize target-specific sim-hardware checks.
1563 * configure: rebuilt.
1564 * interp.c (sim_open): For tx39 target boards, set
1565 OPERATING_ENVIRONMENT, add tx3904sio devices.
1566 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1567 ROM executables. Install dv-sockser into sim-modules list.
1569 * dv-tx3904irc.c: Compiler warning clean-up.
1570 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1571 frequent hw-trace messages.
1573 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1575 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1577 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1579 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1581 * vr.igen: New file.
1582 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1583 * mips.igen: Define vr4100 model. Include vr.igen.
1584 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1586 * mips.igen (check_mf_hilo): Correct check.
1588 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1590 * sim-main.h (interrupt_event): Add prototype.
1592 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1593 register_ptr, register_value.
1594 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1596 * sim-main.h (tracefh): Make extern.
1598 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1600 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1601 Reduce unnecessarily high timer event frequency.
1602 * dv-tx3904cpu.c: Ditto for interrupt event.
1604 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1606 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1608 (interrupt_event): Made non-static.
1610 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1611 interchange of configuration values for external vs. internal
1614 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1616 * mips.igen (BREAK): Moved code to here for
1617 simulator-reserved break instructions.
1618 * gencode.c (build_instruction): Ditto.
1619 * interp.c (signal_exception): Code moved from here. Non-
1620 reserved instructions now use exception vector, rather
1622 * sim-main.h: Moved magic constants to here.
1624 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1626 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1627 register upon non-zero interrupt event level, clear upon zero
1629 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1630 by passing zero event value.
1631 (*_io_{read,write}_buffer): Endianness fixes.
1632 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1633 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1635 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1636 serial I/O and timer module at base address 0xFFFF0000.
1638 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1640 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1643 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1645 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1647 * configure: Update.
1649 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1651 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1652 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1653 * configure.in: Include tx3904tmr in hw_device list.
1654 * configure: Rebuilt.
1655 * interp.c (sim_open): Instantiate three timer instances.
1656 Fix address typo of tx3904irc instance.
1658 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1660 * interp.c (signal_exception): SystemCall exception now uses
1661 the exception vector.
1663 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1665 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1668 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1670 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1672 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1674 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1676 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1677 sim-main.h. Declare a struct hw_descriptor instead of struct
1678 hw_device_descriptor.
1680 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1682 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1683 right bits and then re-align left hand bytes to correct byte
1684 lanes. Fix incorrect computation in do_store_left when loading
1685 bytes from second word.
1687 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1689 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1690 * interp.c (sim_open): Only create a device tree when HW is
1693 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1694 * interp.c (signal_exception): Ditto.
1696 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1698 * gencode.c: Mark BEGEZALL as LIKELY.
1700 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1702 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1703 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1705 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1707 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1708 modules. Recognize TX39 target with "mips*tx39" pattern.
1709 * configure: Rebuilt.
1710 * sim-main.h (*): Added many macros defining bits in
1711 TX39 control registers.
1712 (SignalInterrupt): Send actual PC instead of NULL.
1713 (SignalNMIReset): New exception type.
1714 * interp.c (board): New variable for future use to identify
1715 a particular board being simulated.
1716 (mips_option_handler,mips_options): Added "--board" option.
1717 (interrupt_event): Send actual PC.
1718 (sim_open): Make memory layout conditional on board setting.
1719 (signal_exception): Initial implementation of hardware interrupt
1720 handling. Accept another break instruction variant for simulator
1722 (decode_coproc): Implement RFE instruction for TX39.
1723 (mips.igen): Decode RFE instruction as such.
1724 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1725 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1726 bbegin to implement memory map.
1727 * dv-tx3904cpu.c: New file.
1728 * dv-tx3904irc.c: New file.
1730 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
1732 * mips.igen (check_mt_hilo): Create a separate r3900 version.
1734 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
1736 * tx.igen (madd,maddu): Replace calls to check_op_hilo
1737 with calls to check_div_hilo.
1739 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
1741 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1742 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1743 Add special r3900 version of do_mult_hilo.
1744 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1745 with calls to check_mult_hilo.
1746 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1747 with calls to check_div_hilo.
1749 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
1751 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1752 Document a replacement.
1754 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
1756 * interp.c (sim_monitor): Make mon_printf work.
1758 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
1760 * sim-main.h (INSN_NAME): New arg `cpu'.
1762 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
1764 * configure: Regenerated to track ../common/aclocal.m4 changes.
1766 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
1768 * configure: Regenerated to track ../common/aclocal.m4 changes.
1771 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
1773 * acconfig.h: New file.
1774 * configure.in: Reverted change of Apr 24; use sinclude again.
1776 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
1778 * configure: Regenerated to track ../common/aclocal.m4 changes.
1781 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
1783 * configure.in: Don't call sinclude.
1785 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
1787 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1789 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1791 * mips.igen (ERET): Implement.
1793 * interp.c (decode_coproc): Return sign-extended EPC.
1795 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1797 * interp.c (signal_exception): Do not ignore Trap.
1798 (signal_exception): On TRAP, restart at exception address.
1799 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1800 (signal_exception): Update.
1801 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1802 so that TRAP instructions are caught.
1804 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
1806 * sim-main.h (struct hilo_access, struct hilo_history): Define,
1807 contains HI/LO access history.
1808 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1809 (HIACCESS, LOACCESS): Delete, replace with
1810 (HIHISTORY, LOHISTORY): New macros.
1811 (CHECKHILO): Delete all, moved to mips.igen
1813 * gencode.c (build_instruction): Do not generate checks for
1814 correct HI/LO register usage.
1816 * interp.c (old_engine_run): Delete checks for correct HI/LO
1819 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1820 check_mf_cycles): New functions.
1821 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1822 do_divu, domultx, do_mult, do_multu): Use.
1824 * tx.igen ("madd", "maddu"): Use.
1826 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
1828 * mips.igen (DSRAV): Use function do_dsrav.
1829 (SRAV): Use new function do_srav.
1831 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1832 (B): Sign extend 11 bit immediate.
1833 (EXT-B*): Shift 16 bit immediate left by 1.
1834 (ADDIU*): Don't sign extend immediate value.
1836 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1838 * m16run.c (sim_engine_run): Restore CIA after handling an event.
1840 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1843 * mips.igen (delayslot32, nullify_next_insn): New functions.
1844 (m16.igen): Always include.
1845 (do_*): Add more tracing.
1847 * m16.igen (delayslot16): Add NIA argument, could be called by a
1848 32 bit MIPS16 instruction.
1850 * interp.c (ifetch16): Move function from here.
1851 * sim-main.c (ifetch16): To here.
1853 * sim-main.c (ifetch16, ifetch32): Update to match current
1854 implementations of LH, LW.
1855 (signal_exception): Don't print out incorrect hex value of illegal
1858 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1860 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1863 * m16.igen: Implement MIPS16 instructions.
1865 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1866 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1867 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1868 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1869 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
1870 bodies of corresponding code from 32 bit insn to these. Also used
1871 by MIPS16 versions of functions.
1873 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1874 (IMEM16): Drop NR argument from macro.
1876 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1878 * Makefile.in (SIM_OBJS): Add sim-main.o.
1880 * sim-main.h (address_translation, load_memory, store_memory,
1881 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1883 (pr_addr, pr_uword64): Declare.
1884 (sim-main.c): Include when H_REVEALS_MODULE_P.
1886 * interp.c (address_translation, load_memory, store_memory,
1887 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1889 * sim-main.c: To here. Fix compilation problems.
1891 * configure.in: Enable inlining.
1892 * configure: Re-config.
1894 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1896 * configure: Regenerated to track ../common/aclocal.m4 changes.
1898 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1900 * mips.igen: Include tx.igen.
1901 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1902 * tx.igen: New file, contains MADD and MADDU.
1904 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1905 the hardwired constant `7'.
1906 (store_memory): Ditto.
1907 (LOADDRMASK): Move definition to sim-main.h.
1909 mips.igen (MTC0): Enable for r3900.
1912 mips.igen (do_load_byte): Delete.
1913 (do_load, do_store, do_load_left, do_load_write, do_store_left,
1914 do_store_right): New functions.
1915 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1917 configure.in: Let the tx39 use igen again.
1920 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1922 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1923 not an address sized quantity. Return zero for cache sizes.
1925 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
1927 * mips.igen (r3900): r3900 does not support 64 bit integer
1930 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
1932 * configure.in (mipstx39*-*-*): Use gencode simulator rather
1934 * configure : Rebuild.
1936 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
1938 * configure: Regenerated to track ../common/aclocal.m4 changes.
1940 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1942 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1944 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
1946 * configure: Regenerated to track ../common/aclocal.m4 changes.
1947 * config.in: Regenerated to track ../common/aclocal.m4 changes.
1949 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
1951 * configure: Regenerated to track ../common/aclocal.m4 changes.
1953 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
1955 * interp.c (Max, Min): Comment out functions. Not yet used.
1957 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
1959 * configure: Regenerated to track ../common/aclocal.m4 changes.
1961 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
1963 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
1964 configurable settings for stand-alone simulator.
1966 * configure.in: Added X11 search, just in case.
1968 * configure: Regenerated.
1970 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
1972 * interp.c (sim_write, sim_read, load_memory, store_memory):
1973 Replace sim_core_*_map with read_map, write_map, exec_map resp.
1975 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
1977 * sim-main.h (GETFCC): Return an unsigned value.
1979 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1981 * mips.igen (DIV): Fix check for -1 / MIN_INT.
1982 (DADD): Result destination is RD not RT.
1984 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1986 * sim-main.h (HIACCESS, LOACCESS): Always define.
1988 * mdmx.igen (Maxi, Mini): Rename Max, Min.
1990 * interp.c (sim_info): Delete.
1992 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
1994 * interp.c (DECLARE_OPTION_HANDLER): Use it.
1995 (mips_option_handler): New argument `cpu'.
1996 (sim_open): Update call to sim_add_option_table.
1998 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2000 * mips.igen (CxC1): Add tracing.
2002 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2004 * sim-main.h (Max, Min): Declare.
2006 * interp.c (Max, Min): New functions.
2008 * mips.igen (BC1): Add tracing.
2010 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2012 * interp.c Added memory map for stack in vr4100
2014 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2016 * interp.c (load_memory): Add missing "break"'s.
2018 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2020 * interp.c (sim_store_register, sim_fetch_register): Pass in
2021 length parameter. Return -1.
2023 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2025 * interp.c: Added hardware init hook, fixed warnings.
2027 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2029 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2031 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2033 * interp.c (ifetch16): New function.
2035 * sim-main.h (IMEM32): Rename IMEM.
2036 (IMEM16_IMMED): Define.
2038 (DELAY_SLOT): Update.
2040 * m16run.c (sim_engine_run): New file.
2042 * m16.igen: All instructions except LB.
2043 (LB): Call do_load_byte.
2044 * mips.igen (do_load_byte): New function.
2045 (LB): Call do_load_byte.
2047 * mips.igen: Move spec for insn bit size and high bit from here.
2048 * Makefile.in (tmp-igen, tmp-m16): To here.
2050 * m16.dc: New file, decode mips16 instructions.
2052 * Makefile.in (SIM_NO_ALL): Define.
2053 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2055 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2057 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2058 point unit to 32 bit registers.
2059 * configure: Re-generate.
2061 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2063 * configure.in (sim_use_gen): Make IGEN the default simulator
2064 generator for generic 32 and 64 bit mips targets.
2065 * configure: Re-generate.
2067 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2069 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2072 * interp.c (sim_fetch_register, sim_store_register): Read/write
2073 FGR from correct location.
2074 (sim_open): Set size of FGR's according to
2075 WITH_TARGET_FLOATING_POINT_BITSIZE.
2077 * sim-main.h (FGR): Store floating point registers in a separate
2080 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2082 * configure: Regenerated to track ../common/aclocal.m4 changes.
2084 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2086 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2088 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2090 * interp.c (pending_tick): New function. Deliver pending writes.
2092 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2093 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2094 it can handle mixed sized quantites and single bits.
2096 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2098 * interp.c (oengine.h): Do not include when building with IGEN.
2099 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2100 (sim_info): Ditto for PROCESSOR_64BIT.
2101 (sim_monitor): Replace ut_reg with unsigned_word.
2102 (*): Ditto for t_reg.
2103 (LOADDRMASK): Define.
2104 (sim_open): Remove defunct check that host FP is IEEE compliant,
2105 using software to emulate floating point.
2106 (value_fpr, ...): Always compile, was conditional on HASFPU.
2108 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2110 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2113 * interp.c (SD, CPU): Define.
2114 (mips_option_handler): Set flags in each CPU.
2115 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2116 (sim_close): Do not clear STATE, deleted anyway.
2117 (sim_write, sim_read): Assume CPU zero's vm should be used for
2119 (sim_create_inferior): Set the PC for all processors.
2120 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2122 (mips16_entry): Pass correct nr of args to store_word, load_word.
2123 (ColdReset): Cold reset all cpu's.
2124 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2125 (sim_monitor, load_memory, store_memory, signal_exception): Use
2126 `CPU' instead of STATE_CPU.
2129 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2132 * sim-main.h (signal_exception): Add sim_cpu arg.
2133 (SignalException*): Pass both SD and CPU to signal_exception.
2134 * interp.c (signal_exception): Update.
2136 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2138 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2139 address_translation): Ditto
2140 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2142 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2144 * configure: Regenerated to track ../common/aclocal.m4 changes.
2146 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2148 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2150 * mips.igen (model): Map processor names onto BFD name.
2152 * sim-main.h (CPU_CIA): Delete.
2153 (SET_CIA, GET_CIA): Define
2155 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2157 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2160 * configure.in (default_endian): Configure a big-endian simulator
2162 * configure: Re-generate.
2164 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2166 * configure: Regenerated to track ../common/aclocal.m4 changes.
2168 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2170 * interp.c (sim_monitor): Handle Densan monitor outbyte
2171 and inbyte functions.
2173 1997-12-29 Felix Lee <flee@cygnus.com>
2175 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2177 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2179 * Makefile.in (tmp-igen): Arrange for $zero to always be
2180 reset to zero after every instruction.
2182 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2184 * configure: Regenerated to track ../common/aclocal.m4 changes.
2187 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2189 * mips.igen (MSUB): Fix to work like MADD.
2190 * gencode.c (MSUB): Similarly.
2192 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2194 * configure: Regenerated to track ../common/aclocal.m4 changes.
2196 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2198 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2200 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2202 * sim-main.h (sim-fpu.h): Include.
2204 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2205 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2206 using host independant sim_fpu module.
2208 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2210 * interp.c (signal_exception): Report internal errors with SIGABRT
2213 * sim-main.h (C0_CONFIG): New register.
2214 (signal.h): No longer include.
2216 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2218 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2220 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2222 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2224 * mips.igen: Tag vr5000 instructions.
2225 (ANDI): Was missing mipsIV model, fix assembler syntax.
2226 (do_c_cond_fmt): New function.
2227 (C.cond.fmt): Handle mips I-III which do not support CC field
2229 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2230 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2232 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2233 vr5000 which saves LO in a GPR separatly.
2235 * configure.in (enable-sim-igen): For vr5000, select vr5000
2236 specific instructions.
2237 * configure: Re-generate.
2239 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2241 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2243 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2244 fmt_uninterpreted_64 bit cases to switch. Convert to
2247 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2249 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2250 as specified in IV3.2 spec.
2251 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2253 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2255 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2256 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2257 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2258 PENDING_FILL versions of instructions. Simplify.
2260 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2262 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2264 (MTHI, MFHI): Disable code checking HI-LO.
2266 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2268 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2270 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2272 * gencode.c (build_mips16_operands): Replace IPC with cia.
2274 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2275 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2277 (UndefinedResult): Replace function with macro/function
2279 (sim_engine_run): Don't save PC in IPC.
2281 * sim-main.h (IPC): Delete.
2284 * interp.c (signal_exception, store_word, load_word,
2285 address_translation, load_memory, store_memory, cache_op,
2286 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2287 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2288 current instruction address - cia - argument.
2289 (sim_read, sim_write): Call address_translation directly.
2290 (sim_engine_run): Rename variable vaddr to cia.
2291 (signal_exception): Pass cia to sim_monitor
2293 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2294 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2295 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2297 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2298 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2301 * interp.c (signal_exception): Pass restart address to
2304 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2305 idecode.o): Add dependency.
2307 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2309 (DELAY_SLOT): Update NIA not PC with branch address.
2310 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2312 * mips.igen: Use CIA not PC in branch calculations.
2313 (illegal): Call SignalException.
2314 (BEQ, ADDIU): Fix assembler.
2316 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2318 * m16.igen (JALX): Was missing.
2320 * configure.in (enable-sim-igen): New configuration option.
2321 * configure: Re-generate.
2323 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2325 * interp.c (load_memory, store_memory): Delete parameter RAW.
2326 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2327 bypassing {load,store}_memory.
2329 * sim-main.h (ByteSwapMem): Delete definition.
2331 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2333 * interp.c (sim_do_command, sim_commands): Delete mips specific
2334 commands. Handled by module sim-options.
2336 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2337 (WITH_MODULO_MEMORY): Define.
2339 * interp.c (sim_info): Delete code printing memory size.
2341 * interp.c (mips_size): Nee sim_size, delete function.
2343 (monitor, monitor_base, monitor_size): Delete global variables.
2344 (sim_open, sim_close): Delete code creating monitor and other
2345 memory regions. Use sim-memopts module, via sim_do_commandf, to
2346 manage memory regions.
2347 (load_memory, store_memory): Use sim-core for memory model.
2349 * interp.c (address_translation): Delete all memory map code
2350 except line forcing 32 bit addresses.
2352 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2354 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2357 * interp.c (logfh, logfile): Delete globals.
2358 (sim_open, sim_close): Delete code opening & closing log file.
2359 (mips_option_handler): Delete -l and -n options.
2360 (OPTION mips_options): Ditto.
2362 * interp.c (OPTION mips_options): Rename option trace to dinero.
2363 (mips_option_handler): Update.
2365 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2367 * interp.c (fetch_str): New function.
2368 (sim_monitor): Rewrite using sim_read & sim_write.
2369 (sim_open): Check magic number.
2370 (sim_open): Write monitor vectors into memory using sim_write.
2371 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2372 (sim_read, sim_write): Simplify - transfer data one byte at a
2374 (load_memory, store_memory): Clarify meaning of parameter RAW.
2376 * sim-main.h (isHOST): Defete definition.
2377 (isTARGET): Mark as depreciated.
2378 (address_translation): Delete parameter HOST.
2380 * interp.c (address_translation): Delete parameter HOST.
2382 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2386 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2387 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2389 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2391 * mips.igen: Add model filter field to records.
2393 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2395 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2397 interp.c (sim_engine_run): Do not compile function sim_engine_run
2398 when WITH_IGEN == 1.
2400 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2401 target architecture.
2403 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2404 igen. Replace with configuration variables sim_igen_flags /
2407 * m16.igen: New file. Copy mips16 insns here.
2408 * mips.igen: From here.
2410 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2412 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2414 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2416 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2418 * gencode.c (build_instruction): Follow sim_write's lead in using
2419 BigEndianMem instead of !ByteSwapMem.
2421 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2423 * configure.in (sim_gen): Dependent on target, select type of
2424 generator. Always select old style generator.
2426 configure: Re-generate.
2428 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2430 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2431 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2432 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2433 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2434 SIM_@sim_gen@_*, set by autoconf.
2436 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2438 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2440 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2441 CURRENT_FLOATING_POINT instead.
2443 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2444 (address_translation): Raise exception InstructionFetch when
2445 translation fails and isINSTRUCTION.
2447 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2448 sim_engine_run): Change type of of vaddr and paddr to
2450 (address_translation, prefetch, load_memory, store_memory,
2451 cache_op): Change type of vAddr and pAddr to address_word.
2453 * gencode.c (build_instruction): Change type of vaddr and paddr to
2456 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2458 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2459 macro to obtain result of ALU op.
2461 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2463 * interp.c (sim_info): Call profile_print.
2465 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2467 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2469 * sim-main.h (WITH_PROFILE): Do not define, defined in
2470 common/sim-config.h. Use sim-profile module.
2471 (simPROFILE): Delete defintion.
2473 * interp.c (PROFILE): Delete definition.
2474 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2475 (sim_close): Delete code writing profile histogram.
2476 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2478 (sim_engine_run): Delete code profiling the PC.
2480 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2482 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2484 * interp.c (sim_monitor): Make register pointers of type
2487 * sim-main.h: Make registers of type unsigned_word not
2490 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2492 * interp.c (sync_operation): Rename from SyncOperation, make
2493 global, add SD argument.
2494 (prefetch): Rename from Prefetch, make global, add SD argument.
2495 (decode_coproc): Make global.
2497 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2499 * gencode.c (build_instruction): Generate DecodeCoproc not
2500 decode_coproc calls.
2502 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2503 (SizeFGR): Move to sim-main.h
2504 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2505 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2506 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2508 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2509 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2510 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2511 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2512 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2513 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2515 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2517 (sim-alu.h): Include.
2518 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2519 (sim_cia): Typedef to instruction_address.
2521 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2523 * Makefile.in (interp.o): Rename generated file engine.c to
2528 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2530 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2532 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2534 * gencode.c (build_instruction): For "FPSQRT", output correct
2535 number of arguments to Recip.
2537 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2539 * Makefile.in (interp.o): Depends on sim-main.h
2541 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2543 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2544 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2545 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2546 STATE, DSSTATE): Define
2547 (GPR, FGRIDX, ..): Define.
2549 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2550 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2551 (GPR, FGRIDX, ...): Delete macros.
2553 * interp.c: Update names to match defines from sim-main.h
2555 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2557 * interp.c (sim_monitor): Add SD argument.
2558 (sim_warning): Delete. Replace calls with calls to
2560 (sim_error): Delete. Replace calls with sim_io_error.
2561 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2562 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2563 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2565 (mips_size): Rename from sim_size. Add SD argument.
2567 * interp.c (simulator): Delete global variable.
2568 (callback): Delete global variable.
2569 (mips_option_handler, sim_open, sim_write, sim_read,
2570 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2571 sim_size,sim_monitor): Use sim_io_* not callback->*.
2572 (sim_open): ZALLOC simulator struct.
2573 (PROFILE): Do not define.
2575 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2577 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2578 support.h with corresponding code.
2580 * sim-main.h (word64, uword64), support.h: Move definition to
2582 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2585 * Makefile.in: Update dependencies
2586 * interp.c: Do not include.
2588 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2590 * interp.c (address_translation, load_memory, store_memory,
2591 cache_op): Rename to from AddressTranslation et.al., make global,
2594 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2597 * interp.c (SignalException): Rename to signal_exception, make
2600 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2602 * sim-main.h (SignalException, SignalExceptionInterrupt,
2603 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2604 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2605 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2608 * interp.c, support.h: Use.
2610 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2612 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2613 to value_fpr / store_fpr. Add SD argument.
2614 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2615 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2617 * sim-main.h (ValueFPR, StoreFPR): Define.
2619 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2621 * interp.c (sim_engine_run): Check consistency between configure
2622 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2625 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2626 (mips_fpu): Configure WITH_FLOATING_POINT.
2627 (mips_endian): Configure WITH_TARGET_ENDIAN.
2628 * configure: Update.
2630 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2632 * configure: Regenerated to track ../common/aclocal.m4 changes.
2634 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2636 * configure: Regenerated.
2638 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2640 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2642 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2644 * gencode.c (print_igen_insn_models): Assume certain architectures
2645 include all mips* instructions.
2646 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2649 * Makefile.in (tmp.igen): Add target. Generate igen input from
2652 * gencode.c (FEATURE_IGEN): Define.
2653 (main): Add --igen option. Generate output in igen format.
2654 (process_instructions): Format output according to igen option.
2655 (print_igen_insn_format): New function.
2656 (print_igen_insn_models): New function.
2657 (process_instructions): Only issue warnings and ignore
2658 instructions when no FEATURE_IGEN.
2660 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2662 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2665 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2667 * configure: Regenerated to track ../common/aclocal.m4 changes.
2669 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2671 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2672 SIM_RESERVED_BITS): Delete, moved to common.
2673 (SIM_EXTRA_CFLAGS): Update.
2675 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2677 * configure.in: Configure non-strict memory alignment.
2678 * configure: Regenerated to track ../common/aclocal.m4 changes.
2680 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2682 * configure: Regenerated to track ../common/aclocal.m4 changes.
2684 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2686 * gencode.c (SDBBP,DERET): Added (3900) insns.
2687 (RFE): Turn on for 3900.
2688 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2689 (dsstate): Made global.
2690 (SUBTARGET_R3900): Added.
2691 (CANCELDELAYSLOT): New.
2692 (SignalException): Ignore SystemCall rather than ignore and
2693 terminate. Add DebugBreakPoint handling.
2694 (decode_coproc): New insns RFE, DERET; and new registers Debug
2695 and DEPC protected by SUBTARGET_R3900.
2696 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2698 * Makefile.in,configure.in: Add mips subtarget option.
2699 * configure: Update.
2701 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2703 * gencode.c: Add r3900 (tx39).
2706 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2708 * gencode.c (build_instruction): Don't need to subtract 4 for
2711 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2713 * interp.c: Correct some HASFPU problems.
2715 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2717 * configure: Regenerated to track ../common/aclocal.m4 changes.
2719 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2721 * interp.c (mips_options): Fix samples option short form, should
2724 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2726 * interp.c (sim_info): Enable info code. Was just returning.
2728 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2730 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2733 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
2735 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2737 (build_instruction): Ditto for LL.
2739 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
2741 * configure: Regenerated to track ../common/aclocal.m4 changes.
2743 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2745 * configure: Regenerated to track ../common/aclocal.m4 changes.
2748 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
2750 * interp.c (sim_open): Add call to sim_analyze_program, update
2753 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
2755 * interp.c (sim_kill): Delete.
2756 (sim_create_inferior): Add ABFD argument. Set PC from same.
2757 (sim_load): Move code initializing trap handlers from here.
2758 (sim_open): To here.
2759 (sim_load): Delete, use sim-hload.c.
2761 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2763 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2765 * configure: Regenerated to track ../common/aclocal.m4 changes.
2768 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2770 * interp.c (sim_open): Add ABFD argument.
2771 (sim_load): Move call to sim_config from here.
2772 (sim_open): To here. Check return status.
2774 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
2776 * gencode.c (build_instruction): Two arg MADD should
2777 not assign result to $0.
2779 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
2781 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2782 * sim/mips/configure.in: Regenerate.
2784 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
2786 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2787 signed8, unsigned8 et.al. types.
2789 * interp.c (SUB_REG_FETCH): Handle both little and big endian
2790 hosts when selecting subreg.
2792 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
2794 * interp.c (sim_engine_run): Reset the ZERO register to zero
2795 regardless of FEATURE_WARN_ZERO.
2796 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2798 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2800 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2801 (SignalException): For BreakPoints ignore any mode bits and just
2803 (SignalException): Always set the CAUSE register.
2805 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
2807 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2808 exception has been taken.
2810 * interp.c: Implement the ERET and mt/f sr instructions.
2812 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
2814 * interp.c (SignalException): Don't bother restarting an
2817 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2819 * interp.c (SignalException): Really take an interrupt.
2820 (interrupt_event): Only deliver interrupts when enabled.
2822 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2824 * interp.c (sim_info): Only print info when verbose.
2825 (sim_info) Use sim_io_printf for output.
2827 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2829 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2832 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2834 * interp.c (sim_do_command): Check for common commands if a
2835 simulator specific command fails.
2837 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
2839 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2840 and simBE when DEBUG is defined.
2842 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
2844 * interp.c (interrupt_event): New function. Pass exception event
2845 onto exception handler.
2847 * configure.in: Check for stdlib.h.
2848 * configure: Regenerate.
2850 * gencode.c (build_instruction): Add UNUSED attribute to tempS
2851 variable declaration.
2852 (build_instruction): Initialize memval1.
2853 (build_instruction): Add UNUSED attribute to byte, bigend,
2855 (build_operands): Ditto.
2857 * interp.c: Fix GCC warnings.
2858 (sim_get_quit_code): Delete.
2860 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2861 * Makefile.in: Ditto.
2862 * configure: Re-generate.
2864 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2866 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2868 * interp.c (mips_option_handler): New function parse argumes using
2870 (myname): Replace with STATE_MY_NAME.
2871 (sim_open): Delete check for host endianness - performed by
2873 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2874 (sim_open): Move much of the initialization from here.
2875 (sim_load): To here. After the image has been loaded and
2877 (sim_open): Move ColdReset from here.
2878 (sim_create_inferior): To here.
2879 (sim_open): Make FP check less dependant on host endianness.
2881 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2883 * interp.c (sim_set_callbacks): Delete.
2885 * interp.c (membank, membank_base, membank_size): Replace with
2886 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2887 (sim_open): Remove call to callback->init. gdb/run do this.
2891 * sim-main.h (SIM_HAVE_FLATMEM): Define.
2893 * interp.c (big_endian_p): Delete, replaced by
2894 current_target_byte_order.
2896 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2898 * interp.c (host_read_long, host_read_word, host_swap_word,
2899 host_swap_long): Delete. Using common sim-endian.
2900 (sim_fetch_register, sim_store_register): Use H2T.
2901 (pipeline_ticks): Delete. Handled by sim-events.
2903 (sim_engine_run): Update.
2905 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
2907 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2909 (SignalException): To here. Signal using sim_engine_halt.
2910 (sim_stop_reason): Delete, moved to common.
2912 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
2914 * interp.c (sim_open): Add callback argument.
2915 (sim_set_callbacks): Delete SIM_DESC argument.
2918 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2920 * Makefile.in (SIM_OBJS): Add common modules.
2922 * interp.c (sim_set_callbacks): Also set SD callback.
2923 (set_endianness, xfer_*, swap_*): Delete.
2924 (host_read_word, host_read_long, host_swap_word, host_swap_long):
2925 Change to functions using sim-endian macros.
2926 (control_c, sim_stop): Delete, use common version.
2927 (simulate): Convert into.
2928 (sim_engine_run): This function.
2929 (sim_resume): Delete.
2931 * interp.c (simulation): New variable - the simulator object.
2932 (sim_kind): Delete global - merged into simulation.
2933 (sim_load): Cleanup. Move PC assignment from here.
2934 (sim_create_inferior): To here.
2936 * sim-main.h: New file.
2937 * interp.c (sim-main.h): Include.
2939 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
2941 * configure: Regenerated to track ../common/aclocal.m4 changes.
2943 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
2945 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2947 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
2949 * gencode.c (build_instruction): DIV instructions: check
2950 for division by zero and integer overflow before using
2951 host's division operation.
2953 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
2955 * Makefile.in (SIM_OBJS): Add sim-load.o.
2956 * interp.c: #include bfd.h.
2957 (target_byte_order): Delete.
2958 (sim_kind, myname, big_endian_p): New static locals.
2959 (sim_open): Set sim_kind, myname. Move call to set_endianness to
2960 after argument parsing. Recognize -E arg, set endianness accordingly.
2961 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
2962 load file into simulator. Set PC from bfd.
2963 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
2964 (set_endianness): Use big_endian_p instead of target_byte_order.
2966 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
2968 * interp.c (sim_size): Delete prototype - conflicts with
2969 definition in remote-sim.h. Correct definition.
2971 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2973 * configure: Regenerated to track ../common/aclocal.m4 changes.
2976 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
2978 * interp.c (sim_open): New arg `kind'.
2980 * configure: Regenerated to track ../common/aclocal.m4 changes.
2982 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2984 * configure: Regenerated to track ../common/aclocal.m4 changes.
2986 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
2988 * interp.c (sim_open): Set optind to 0 before calling getopt.
2990 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2992 * configure: Regenerated to track ../common/aclocal.m4 changes.
2994 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
2996 * interp.c : Replace uses of pr_addr with pr_uword64
2997 where the bit length is always 64 independent of SIM_ADDR.
2998 (pr_uword64) : added.
3000 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3002 * configure: Re-generate.
3004 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3006 * configure: Regenerate to track ../common/aclocal.m4 changes.
3008 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3010 * interp.c (sim_open): New SIM_DESC result. Argument is now
3012 (other sim_*): New SIM_DESC argument.
3014 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3016 * interp.c: Fix printing of addresses for non-64-bit targets.
3017 (pr_addr): Add function to print address based on size.
3019 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3021 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3023 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3025 * gencode.c (build_mips16_operands): Correct computation of base
3026 address for extended PC relative instruction.
3028 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3030 * interp.c (mips16_entry): Add support for floating point cases.
3031 (SignalException): Pass floating point cases to mips16_entry.
3032 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3034 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3036 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3037 and then set the state to fmt_uninterpreted.
3038 (COP_SW): Temporarily set the state to fmt_word while calling
3041 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3043 * gencode.c (build_instruction): The high order may be set in the
3044 comparison flags at any ISA level, not just ISA 4.
3046 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3048 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3049 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3050 * configure.in: sinclude ../common/aclocal.m4.
3051 * configure: Regenerated.
3053 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3055 * configure: Rebuild after change to aclocal.m4.
3057 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3059 * configure configure.in Makefile.in: Update to new configure
3060 scheme which is more compatible with WinGDB builds.
3061 * configure.in: Improve comment on how to run autoconf.
3062 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3063 * Makefile.in: Use autoconf substitution to install common
3066 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3068 * gencode.c (build_instruction): Use BigEndianCPU instead of
3071 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3073 * interp.c (sim_monitor): Make output to stdout visible in
3074 wingdb's I/O log window.
3076 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3078 * support.h: Undo previous change to SIGTRAP
3081 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3083 * interp.c (store_word, load_word): New static functions.
3084 (mips16_entry): New static function.
3085 (SignalException): Look for mips16 entry and exit instructions.
3086 (simulate): Use the correct index when setting fpr_state after
3087 doing a pending move.
3089 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3091 * interp.c: Fix byte-swapping code throughout to work on
3092 both little- and big-endian hosts.
3094 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3096 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3097 with gdb/config/i386/xm-windows.h.
3099 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3101 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3102 that messes up arithmetic shifts.
3104 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3106 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3107 SIGTRAP and SIGQUIT for _WIN32.
3109 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3111 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3112 force a 64 bit multiplication.
3113 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3114 destination register is 0, since that is the default mips16 nop
3117 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3119 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3120 (build_endian_shift): Don't check proc64.
3121 (build_instruction): Always set memval to uword64. Cast op2 to
3122 uword64 when shifting it left in memory instructions. Always use
3123 the same code for stores--don't special case proc64.
3125 * gencode.c (build_mips16_operands): Fix base PC value for PC
3127 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3129 * interp.c (simJALDELAYSLOT): Define.
3130 (JALDELAYSLOT): Define.
3131 (INDELAYSLOT, INJALDELAYSLOT): Define.
3132 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3134 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3136 * interp.c (sim_open): add flush_cache as a PMON routine
3137 (sim_monitor): handle flush_cache by ignoring it
3139 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3141 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3143 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3144 (BigEndianMem): Rename to ByteSwapMem and change sense.
3145 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3146 BigEndianMem references to !ByteSwapMem.
3147 (set_endianness): New function, with prototype.
3148 (sim_open): Call set_endianness.
3149 (sim_info): Use simBE instead of BigEndianMem.
3150 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3151 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3152 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3153 ifdefs, keeping the prototype declaration.
3154 (swap_word): Rewrite correctly.
3155 (ColdReset): Delete references to CONFIG. Delete endianness related
3156 code; moved to set_endianness.
3158 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3160 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3161 * interp.c (CHECKHILO): Define away.
3162 (simSIGINT): New macro.
3163 (membank_size): Increase from 1MB to 2MB.
3164 (control_c): New function.
3165 (sim_resume): Rename parameter signal to signal_number. Add local
3166 variable prev. Call signal before and after simulate.
3167 (sim_stop_reason): Add simSIGINT support.
3168 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3170 (sim_warning): Delete call to SignalException. Do call printf_filtered
3172 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3173 a call to sim_warning.
3175 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3177 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3178 16 bit instructions.
3180 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3182 Add support for mips16 (16 bit MIPS implementation):
3183 * gencode.c (inst_type): Add mips16 instruction encoding types.
3184 (GETDATASIZEINSN): Define.
3185 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3186 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3188 (MIPS16_DECODE): New table, for mips16 instructions.
3189 (bitmap_val): New static function.
3190 (struct mips16_op): Define.
3191 (mips16_op_table): New table, for mips16 operands.
3192 (build_mips16_operands): New static function.
3193 (process_instructions): If PC is odd, decode a mips16
3194 instruction. Break out instruction handling into new
3195 build_instruction function.
3196 (build_instruction): New static function, broken out of
3197 process_instructions. Check modifiers rather than flags for SHIFT
3198 bit count and m[ft]{hi,lo} direction.
3199 (usage): Pass program name to fprintf.
3200 (main): Remove unused variable this_option_optind. Change
3201 ``*loptarg++'' to ``loptarg++''.
3202 (my_strtoul): Parenthesize && within ||.
3203 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3204 (simulate): If PC is odd, fetch a 16 bit instruction, and
3205 increment PC by 2 rather than 4.
3206 * configure.in: Add case for mips16*-*-*.
3207 * configure: Rebuild.
3209 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3211 * interp.c: Allow -t to enable tracing in standalone simulator.
3212 Fix garbage output in trace file and error messages.
3214 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3216 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3217 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3218 * configure.in: Simplify using macros in ../common/aclocal.m4.
3219 * configure: Regenerated.
3220 * tconfig.in: New file.
3222 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3224 * interp.c: Fix bugs in 64-bit port.
3225 Use ansi function declarations for msvc compiler.
3226 Initialize and test file pointer in trace code.
3227 Prevent duplicate definition of LAST_EMED_REGNUM.
3229 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3231 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3233 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3235 * interp.c (SignalException): Check for explicit terminating
3237 * gencode.c: Pass instruction value through SignalException()
3238 calls for Trap, Breakpoint and Syscall.
3240 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3242 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3243 only used on those hosts that provide it.
3244 * configure.in: Add sqrt() to list of functions to be checked for.
3245 * config.in: Re-generated.
3246 * configure: Re-generated.
3248 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3250 * gencode.c (process_instructions): Call build_endian_shift when
3251 expanding STORE RIGHT, to fix swr.
3252 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3253 clear the high bits.
3254 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3255 Fix float to int conversions to produce signed values.
3257 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3259 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3260 (process_instructions): Correct handling of nor instruction.
3261 Correct shift count for 32 bit shift instructions. Correct sign
3262 extension for arithmetic shifts to not shift the number of bits in
3263 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3264 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3266 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3267 It's OK to have a mult follow a mult. What's not OK is to have a
3268 mult follow an mfhi.
3269 (Convert): Comment out incorrect rounding code.
3271 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3273 * interp.c (sim_monitor): Improved monitor printf
3274 simulation. Tidied up simulator warnings, and added "--log" option
3275 for directing warning message output.
3276 * gencode.c: Use sim_warning() rather than WARNING macro.
3278 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3280 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3281 getopt1.o, rather than on gencode.c. Link objects together.
3282 Don't link against -liberty.
3283 (gencode.o, getopt.o, getopt1.o): New targets.
3284 * gencode.c: Include <ctype.h> and "ansidecl.h".
3285 (AND): Undefine after including "ansidecl.h".
3286 (ULONG_MAX): Define if not defined.
3287 (OP_*): Don't define macros; now defined in opcode/mips.h.
3288 (main): Call my_strtoul rather than strtoul.
3289 (my_strtoul): New static function.
3291 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3293 * gencode.c (process_instructions): Generate word64 and uword64
3294 instead of `long long' and `unsigned long long' data types.
3295 * interp.c: #include sysdep.h to get signals, and define default
3297 * (Convert): Work around for Visual-C++ compiler bug with type
3299 * support.h: Make things compile under Visual-C++ by using
3300 __int64 instead of `long long'. Change many refs to long long
3301 into word64/uword64 typedefs.
3303 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3305 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3306 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3308 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3309 (AC_PROG_INSTALL): Added.
3310 (AC_PROG_CC): Moved to before configure.host call.
3311 * configure: Rebuilt.
3313 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3315 * configure.in: Define @SIMCONF@ depending on mips target.
3316 * configure: Rebuild.
3317 * Makefile.in (run): Add @SIMCONF@ to control simulator
3319 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3320 * interp.c: Remove some debugging, provide more detailed error
3321 messages, update memory accesses to use LOADDRMASK.
3323 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3325 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3326 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3328 * configure: Rebuild.
3329 * config.in: New file, generated by autoheader.
3330 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3331 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3332 HAVE_ANINT and HAVE_AINT, as appropriate.
3333 * Makefile.in (run): Use @LIBS@ rather than -lm.
3334 (interp.o): Depend upon config.h.
3335 (Makefile): Just rebuild Makefile.
3336 (clean): Remove stamp-h.
3337 (mostlyclean): Make the same as clean, not as distclean.
3338 (config.h, stamp-h): New targets.
3340 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3342 * interp.c (ColdReset): Fix boolean test. Make all simulator
3345 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3347 * interp.c (xfer_direct_word, xfer_direct_long,
3348 swap_direct_word, swap_direct_long, xfer_big_word,
3349 xfer_big_long, xfer_little_word, xfer_little_long,
3350 swap_word,swap_long): Added.
3351 * interp.c (ColdReset): Provide function indirection to
3352 host<->simulated_target transfer routines.
3353 * interp.c (sim_store_register, sim_fetch_register): Updated to
3354 make use of indirected transfer routines.
3356 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3358 * gencode.c (process_instructions): Ensure FP ABS instruction
3360 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3361 system call support.
3363 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3365 * interp.c (sim_do_command): Complain if callback structure not
3368 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3370 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3371 support for Sun hosts.
3372 * Makefile.in (gencode): Ensure the host compiler and libraries
3373 used for cross-hosted build.
3375 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3377 * interp.c, gencode.c: Some more (TODO) tidying.
3379 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3381 * gencode.c, interp.c: Replaced explicit long long references with
3382 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3383 * support.h (SET64LO, SET64HI): Macros added.
3385 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3387 * configure: Regenerate with autoconf 2.7.
3389 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3391 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3392 * support.h: Remove superfluous "1" from #if.
3393 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3395 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3397 * interp.c (StoreFPR): Control UndefinedResult() call on
3398 WARN_RESULT manifest.
3400 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3402 * gencode.c: Tidied instruction decoding, and added FP instruction
3405 * interp.c: Added dineroIII, and BSD profiling support. Also
3406 run-time FP handling.
3408 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3410 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3411 gencode.c, interp.c, support.h: created.