sim/mn10300/ChangeLog

   1 Tue May  6 13:24:36 1997  Jeffrey A Law  (law@cygnus.com)
   2
   3         * interp.c: Improve hashing routine to avoid long list
   4         traversals for common instructions.  Add HASH_STAT support.
   5         Rewrite opcode dispatch code using a big switch instead of
   6         cascaded if/else statements.  Avoid useless calls to load_mem.
   7
   8 Mon May  5 18:07:48 1997  Jeffrey A Law  (law@cygnus.com)
   9
  10         * mn10300_sim.h (struct _state): Add space for mdrq register.
  11         (REG_MDRQ): Define.
  12         * simops.c: Don't abort for trap.  Add support for the extended
  13         instructions, "getx", "putx", "mulq", "mulqu", "sat16", "sat24",
  14         and "bsch".
  15
  16 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
  17
  18         * configure: Regenerated to track ../common/aclocal.m4 changes.
  19
  20 Fri Apr 18 14:04:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  21
  22         * interp.c (sim_stop): Add stub function.
  23
  24 Thu Apr 17 03:26:59 1997  Doug Evans  <dje@canuck.cygnus.com>
  25
  26         * Makefile.in (SIM_OBJS): Add sim-load.o.
  27         * interp.c (sim_kind, myname): New static locals.
  28         (sim_open): Set sim_kind, myname.  Ignore -E arg.
  29         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
  30         load file into simulator.  Set start address from bfd.
  31         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
  32
  33 Wed Apr 16 19:30:44 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  34
  35         * simops.c (OP_F020): SYS_execv, SYS_time, SYS_times, SYS_utime
  36         only include if implemented by host.
  37         (OP_F020): Typecast arg passed to time function;
  38
  39 Mon Apr  7 23:57:49 1997  Jeffrey A Law  (law@cygnus.com)
  40
  41         * simops.c (syscall): Handle new mn10300 calling conventions.
  42
  43 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
  44
  45         * configure: Regenerated to track ../common/aclocal.m4 changes.
  46         * config.in: Ditto.
  47
  48 Fri Apr  4 20:02:37 1997  Ian Lance Taylor  <ian@cygnus.com>
  49
  50         * Makefile.in: Change mn10300-opc.o to m10300-opc.o, to match
  51         corresponding change in opcodes directory.
  52
  53 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
  54
  55         * interp.c (sim_open): New arg `kind'.
  56
  57         * configure: Regenerated to track ../common/aclocal.m4 changes.
  58
  59 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
  60
  61         * configure: Regenerated to track ../common/aclocal.m4 changes.
  62
  63 Thu Mar 20 11:58:02 1997  Jeffrey A Law  (law@cygnus.com)
  64
  65         * simops.c: Fix register extraction for a two "movbu" variants.
  66         Somewhat simplify "sub" instructions.
  67         Correctly sign extend operands for "mul".  Put the correct
  68         half of the result in MDR for "mul" and "mulu".
  69         Implement remaining instructions.
  70         Tweak opcode for "syscall".
  71
  72 Tue Mar 18 14:21:21 1997  Jeffrey A Law  (law@cygnus.com)
  73
  74         * simops.c: Do syscall emulation in "syscall" instruction.  Add
  75         dummy "trap" instruction.
  76
  77 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
  78
  79         * configure: Regenerated to track ../common/aclocal.m4 changes.
  80
  81 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
  82
  83         * configure: Re-generate.
  84
  85 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
  86
  87         * configure: Regenerate to track ../common/aclocal.m4 changes.
  88
  89 Thu Mar 13 12:54:45 1997  Doug Evans  <dje@canuck.cygnus.com>
  90
  91         * interp.c (sim_open): New SIM_DESC result.  Argument is now
  92         in argv form.
  93         (other sim_*): New SIM_DESC argument.
  94
  95 Wed Mar 12 15:04:00 1997  Jeffrey A Law  (law@cygnus.com)
  96
  97         * simops.c: Fix carry bit computation for "add" instructions.
  98
  99         * simops.c: Fix typos in bset insns.  Fix arguments to store_mem
 100         for bset imm8,(d8,an) and bclr imm8,(d8,an).
 101
 102 Wed Mar  5 15:00:10 1997  Jeffrey A Law  (law@cygnus.com)
 103
 104         * simops.c: Fix register references when computing Z and N bits
 105         for lsr imm8,dn.
 106
 107 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
 108
 109         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
 110         COMMON_{PRE,POST}_CONFIG_FRAG instead.
 111         * configure.in: sinclude ../common/aclocal.m4.
 112         * configure: Regenerated.
 113
 114 Fri Jan 24 10:47:25 1997  Jeffrey A Law  (law@cygnus.com)
 115
 116         * interp.c (init_system): Allocate 2^19 bytes of space for the
 117         simulator.
 118
 119 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
 120
 121         * configure configure.in Makefile.in:  Update to new configure
 122         scheme which is more compatible with WinGDB builds.
 123         * configure.in:  Improve comment on how to run autoconf.
 124         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
 125         * Makefile.in:  Use autoconf substitution to install common
 126         makefile fragment.
 127
 128 Tue Jan 21 15:03:04 1997  Jeffrey A Law  (law@cygnus.com)
 129
 130         * simops.c: Undo last change to "rol" and "ror", original code
 131         was correct!
 132
 133 Thu Jan 16 11:28:14 1997  Jeffrey A Law  (law@cygnus.com)
 134
 135         * simops.c: Fix "rol" and "ror".
 136
 137 Wed Jan 15 06:45:58 1997  Jeffrey A Law  (law@cygnus.com)
 138
 139         * simops.c: Fix typo in last change.
 140
 141 Mon Jan 13 13:22:35 1997  Jeffrey A Law  (law@cygnus.com)
 142
 143         * simops.c: Use REG macros in few places not using them yet.
 144
 145 Mon Jan  6 16:21:19 1997  Jeffrey A Law  (law@cygnus.com)
 146
 147         * mn10300_sim.h (struct _state): Fix number of registers!
 148
 149 Tue Dec 31 16:20:41 1996  Jeffrey A Law  (law@cygnus.com)
 150
 151         * mn10300_sim.h (struct _state): Put all registers into a single
 152         array to make gdb implementation easier.
 153         (REG_*): Add definitions for all registers in the state array.
 154         (SEXT32, SEXT40, SEXT44, SEXT60): Remove unused macros.
 155         * simops.c: Related changes.
 156
 157 Wed Dec 18 10:10:45 1996  Jeffrey A Law  (law@cygnus.com)
 158
 159         * interp.c (sim_resume): Handle 0xff as a single byte insn.
 160
 161         * simops.c: Fix overflow computation for "add" and "inc"
 162         instructions.
 163
 164 Mon Dec 16 10:03:52 1996  Jeffrey A Law  (law@cygnus.com)
 165
 166         * simops.c: Handle "break" instruction.
 167
 168         * simops.c: Fix restoring the PC for "ret" and "retf" instructions.
 169
 170 Wed Dec 11 09:53:10 1996  Jeffrey A Law  (law@cygnus.com)
 171
 172         * gencode.c (write_opcodes): Also write out the format of the
 173         opcode.
 174         * mn10300_sim.h (simops): Add "format" field.
 175         * interp.c (sim_resume): Deal with endianness issues here.
 176
 177 Tue Dec 10 15:05:37 1996  Jeffrey A Law  (law@cygnus.com)
 178
 179         * simops.c (REG0_4): Define.
 180         Use REG0_4 for indexed loads/stores.
 181
 182 Sat Dec  7 09:50:28 1996  Jeffrey A Law  (law@cygnus.com)
 183
 184         * simops.c (REG0_16): Fix typo.
 185
 186 Fri Dec  6 14:13:34 1996  Jeffrey A Law  (law@cygnus.com)
 187
 188         * simops.c: Call abort for any instruction that's not currently
 189         simulated.
 190
 191         * simops.c: Define accessor macros to extract register
 192         values from instructions.  Use them consistently.
 193
 194         * interp.c: Delete unused global variable "OP".
 195         (sim_resume): Remove unused variable "opcode".
 196         * simops.c: Fix some uninitialized variable problems, add
 197         parens to fix various -Wall warnings.
 198
 199         * gencode.c (write_header): Add "insn" and "extension" arguments
 200         to the OP_* declarations.
 201         (write_template): Similarly for function templates.
 202         * interp.c (insn, extension): Remove global variables.  Instead
 203         pass them as arguments to the OP_* functions.
 204         * mn10300_sim.h: Remove decls for "insn" and "extension".
 205         * simops.c (OP_*): Accept "insn" and "extension" as arguments
 206         instead of using globals.
 207
 208 Thu Dec  5 22:26:31 1996  Jeffrey A Law  (law@cygnus.com)
 209
 210         * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)"
 211
 212         * simops.c: Fix thinkos in last change to "inc dn".
 213
 214 Wed Dec  4 10:57:53 1996  Jeffrey A Law  (law@cygnus.com)
 215
 216         * simops.c: "add imm,sp" does not effect the condition codes.
 217         "inc dn" does effect the condition codes.
 218
 219 Tue Dec  3 17:37:45 1996  Jeffrey A Law  (law@cygnus.com)
 220
 221         * simops.c: Treat both operands as signed values for
 222         "div" instruction.
 223
 224         * simops.c: Fix simulation of division instructions.
 225         Fix typos/thinkos in several "cmp" and "sub" instructions.
 226
 227 Mon Dec  2 12:31:40 1996  Jeffrey A Law  (law@cygnus.com)
 228
 229         * simops.c: Fix carry bit handling in "sub" and "cmp"
 230         instructions.
 231
 232         * simops.c: Fix "mov imm8,an" and "mov imm16,dn".
 233
 234 Sun Dec  1 16:05:42 1996  Jeffrey A Law  (law@cygnus.com)
 235
 236         * simops.c: Fix overflow computation for many instructions.
 237
 238         * simops.c: Fix "mov dm, an", "movbu dm, (an)", and "movhu dm, (an)".
 239
 240         * simops.c: Fix "mov am, dn".
 241
 242         * simops.c: Fix more bugs in "add imm,an" and
 243         "add imm,dn".
 244
 245 Wed Nov 27 09:20:42 1996  Jeffrey A Law  (law@cygnus.com)
 246
 247         * simops.c: Fix bugs in "movm" and "add imm,an".
 248
 249         * simops.c: Don't lose the upper 24 bits of the return
 250         pointer in "call" and "calls" instructions.  Rough cut
 251         at emulated system calls.
 252
 253         * simops.c: Implement the remaining 5, 6 and 7 byte instructions.
 254
 255         * simops.c: Implement remaining 4 byte instructions.
 256
 257         * simops.c: Implement remaining 3 byte instructions.
 258
 259         * simops.c: Implement remaining 2 byte instructions.  Call
 260         abort for instructions we're not implementing now.
 261
 262 Tue Nov 26 15:43:41 1996  Jeffrey A Law  (law@cygnus.com)
 263
 264         * simops.c: Implement lots of random instructions.
 265
 266         * simops.c: Implement "movm" and "bCC" insns.
 267
 268         * mn10300_sim.h (_state): Add another register (MDR).
 269         (REG_MDR): Define.
 270         * simops.c: Implement "cmp", "calls", "rets", "jmp" and
 271         a few additional random insns.
 272
 273         * mn10300_sim.h (PSW_*): Define for CC status tracking.
 274         (REG_D0, REG_A0, REG_SP): Define.
 275         * simops.c: Implement "add", "addc" and a few other random
 276         instructions.
 277
 278         * gencode.c, interp.c: Snapshot current simulator code.
 279
 280 Mon Nov 25 12:46:38 1996  Jeffrey A Law  (law@cygnus.com)
 281
 282         * Makefile.in, config.in, configure, configure.in: New files.
 283         * gencode.c, interp.c, mn10300_sim.h, simops.c: New files.
 284