x86-64: adjust recently added tests
[binutils-gdb.git] / sim / or1k / Makefile.in
1 # Makefile template for configure for the or1k simulator
2 # Copyright (C) 2017-2021 Free Software Foundation, Inc.
3 #
4 # This file is part of GDB, the GNU debugger.
5 #
6 # This program is free software; you can redistribute it and/or modify
7 # it under the terms of the GNU General Public License as published by
8 # the Free Software Foundation; either version 3 of the License, or
9 # (at your option) any later version.
10 #
11 # This program is distributed in the hope that it will be useful,
12 # but WITHOUT ANY WARRANTY; without even the implied warranty of
13 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 # GNU General Public License for more details.
15 #
16 # You should have received a copy of the GNU General Public License
17 # along with this program. If not, see <http://www.gnu.org/licenses/>.
18
19 ## COMMON_PRE_CONFIG_FRAG
20
21 OR1K_OBJS = \
22 or1k.o \
23 arch.o \
24 cpu.o \
25 decode.o \
26 model.o \
27 sem.o \
28 mloop.o \
29 sim-if.o \
30 traps.o
31
32 SIM_OBJS = \
33 $(SIM_NEW_COMMON_OBJS) \
34 cgen-utils.o \
35 cgen-trace.o \
36 cgen-scache.o \
37 cgen-run.o \
38 cgen-fpu.o \
39 cgen-accfp.o
40
41 SIM_OBJS += $(OR1K_OBJS)
42
43 # Extra headers included by sim-main.h.
44 SIM_EXTRA_DEPS = \
45 $(CGEN_INCLUDE_DEPS) \
46 or1k-sim.h \
47 $(srcdir)/../../opcodes/or1k-desc.h \
48 arch.h \
49 cpuall.h \
50 decode.h
51
52 SIM_EXTRA_CFLAGS =
53
54 SIM_EXTRA_LIBS = -lm
55
56 SIM_EXTRA_CLEAN = or1k-clean
57
58 ## COMMON_POST_CONFIG_FRAG
59
60 arch = or1k
61
62 # or1k32bf
63
64 OR1K32BF_INCLUDE_DEPS = \
65 $(CGEN_MAIN_CPU_DEPS) \
66 cpu.h \
67 decode.h \
68 eng.h
69
70 mloop.c eng.h: stamp-mloop ; @true
71 stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
72 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
73 -mono -fast -pbb -switch sem-switch.c \
74 -cpu or1k32bf -infile $(srcdir)/mloop.in
75 $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
76 $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
77 touch stamp-mloop
78 or1k.o: or1k.c $(OR1K32BF_INCLUDE_DEPS)
79 $(COMPILE) $<
80 $(POSTCOMPILE)
81
82 sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h eng.h
83 $(COMPILE) $<
84 $(POSTCOMPILE)
85
86 traps.o: traps.c $(SIM_MAIN_DEPS) eng.h
87 $(COMPILE) $<
88 $(POSTCOMPILE)
89
90 or1k-clean:
91 rm -f mloop.c eng.h stamp-mloop
92
93 # cgen support, enable with --enable-cgen-maint
94 CGEN_MAINT = ; @true
95 # The following line is commented in or out depending upon --enable-cgen-maint.
96 @CGEN_MAINT@CGEN_MAINT =
97
98 stamps: stamp-arch stamp-cpu stamp-mloop
99
100 # NOTE: Generated source files are specified as full paths,
101 # e.g. $(srcdir)/arch.c, because make may decide the files live
102 # in objdir otherwise.
103
104 OR1K_CGEN_DEPS = \
105 $(CPU_DIR)/or1k.cpu \
106 $(CPU_DIR)/or1k.opc \
107 $(CPU_DIR)/or1kcommon.cpu \
108 $(CPU_DIR)/or1korbis.cpu \
109 $(CPU_DIR)/or1korfpx.cpu \
110 Makefile
111
112 stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(OR1K_CGEN_DEPS)
113 $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) \
114 mach=or32,or32nd \
115 archfile=$(CPU_DIR)/or1k.cpu \
116 FLAGS="with-scache"
117 touch $@
118 $(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch
119 @true
120
121 stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(OR1K_CGEN_DEPS)
122 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
123 cpu=or1k32bf \
124 mach=or32,or32nd \
125 archfile=$(CPU_DIR)/or1k.cpu \
126 FLAGS="with-scache" \
127 EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
128 touch $@
129 $(srcdir)/cpu.h $(srcdir)/cpu.c $(srcdir)/model.c $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu
130 @true