sim: mips: move arch-specific file compilation to top-level
[binutils-gdb.git] / sim / ppc / cpu.h
1 /* This file is part of the program psim.
2
3 Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 3 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, see <http://www.gnu.org/licenses/>.
17
18 */
19
20
21 #ifndef _CPU_H_
22 #define _CPU_H_
23
24 #include "basics.h"
25 #include "registers.h"
26 #include "device.h"
27 #include "corefile.h"
28 #include "vm.h"
29 #include "events.h"
30 #include "interrupts.h"
31 #include "psim.h"
32 #include "idecode.h"
33 #include "itable.h"
34 #include "os_emul.h"
35 #include "mon.h"
36 #include "model.h"
37 #include "ansidecl.h"
38 #include "libiberty.h"
39
40 #ifndef CONST_ATTRIBUTE
41 #define CONST_ATTRIBUTE __attribute__((__const__))
42 #endif
43
44 /* typedef struct _cpu cpu;
45
46 Declared in basics.h because it is used opaquely throughout the
47 code */
48
49
50 /* Create a cpu object */
51
52 INLINE_CPU\
53 (cpu *) cpu_create
54 (psim *system,
55 core *memory,
56 cpu_mon *monitor,
57 os_emul *cpu_emulation,
58 int cpu_nr);
59
60 INLINE_CPU\
61 (void) cpu_init
62 (cpu *processor);
63
64 /* Find our way home */
65
66 INLINE_CPU\
67 (psim *) cpu_system
68 (cpu *processor) CONST_ATTRIBUTE;
69
70 INLINE_CPU\
71 (cpu_mon *) cpu_monitor
72 (cpu *processor) CONST_ATTRIBUTE;
73
74 INLINE_CPU\
75 (os_emul *) cpu_os_emulation
76 (cpu *processor);
77
78 INLINE_CPU\
79 (int) cpu_nr
80 (cpu *processor) CONST_ATTRIBUTE;
81
82
83 /* manipulate the processors program counter and execution state.
84
85 The program counter is not included in the register file. Instead
86 it is extracted and then later restored (set, reset, halt). This
87 is to give the user of the cpu (and the compiler) the chance to
88 minimize the need to load/store the cpu's PC value. (Especially in
89 the case of a single processor) */
90
91 INLINE_CPU\
92 (void) cpu_set_program_counter
93 (cpu *processor,
94 unsigned_word new_program_counter);
95
96 INLINE_CPU\
97 (unsigned_word) cpu_get_program_counter
98 (cpu *processor);
99
100 INLINE_CPU\
101 (void) cpu_restart
102 (cpu *processor,
103 unsigned_word nia);
104
105 INLINE_CPU\
106 (void) cpu_halt
107 (cpu *processor,
108 unsigned_word nia,
109 stop_reason reason,
110 int signal);
111
112 EXTERN_CPU\
113 (void) cpu_error
114 (cpu *processor,
115 unsigned_word cia,
116 const char *fmt,
117 ...) ATTRIBUTE_PRINTF_3;
118
119
120 /* The processors local concept of time */
121
122 INLINE_CPU\
123 (int64_t) cpu_get_time_base
124 (cpu *processor);
125
126 INLINE_CPU\
127 (void) cpu_set_time_base
128 (cpu *processor,
129 int64_t time_base);
130
131 INLINE_CPU\
132 (int32_t) cpu_get_decrementer
133 (cpu *processor);
134
135 INLINE_CPU\
136 (void) cpu_set_decrementer
137 (cpu *processor,
138 int32_t decrementer);
139
140
141 #if WITH_IDECODE_CACHE_SIZE
142 /* Return the cache entry that matches the given CIA. No guarentee
143 that the cache entry actually contains the instruction for that
144 address */
145
146 INLINE_CPU\
147 (idecode_cache) *cpu_icache_entry
148 (cpu *processor,
149 unsigned_word cia);
150
151 INLINE_CPU\
152 (void) cpu_flush_icache
153 (cpu *processor);
154 #endif
155
156
157 /* reveal the processors VM:
158
159 At first sight it may seem better to, instead of exposing the cpu's
160 inner vm maps, to have the cpu its self provide memory manipulation
161 functions. (eg cpu_instruction_fetch() cpu_data_read_4())
162
163 Unfortunatly in addition to these functions is the need (for the
164 debugger) to be able to read/write to memory in ways that violate
165 the vm protection (eg store breakpoint instruction in the
166 instruction map). */
167
168 INLINE_CPU\
169 (vm_data_map *) cpu_data_map
170 (cpu *processor);
171
172 INLINE_CPU\
173 (vm_instruction_map *) cpu_instruction_map
174 (cpu *processor);
175
176 INLINE_CPU\
177 (void) cpu_page_tlb_invalidate_entry
178 (cpu *processor,
179 unsigned_word ea);
180
181 INLINE_CPU\
182 (void) cpu_page_tlb_invalidate_all
183 (cpu *processor);
184
185
186 /* reveal the processors interrupt state */
187
188 INLINE_CPU\
189 (interrupts *) cpu_interrupts
190 (cpu *processor);
191
192
193 /* grant access to the reservation information */
194
195 typedef struct _memory_reservation {
196 int valid;
197 unsigned_word addr;
198 unsigned_word data;
199 } memory_reservation;
200
201 INLINE_CPU\
202 (memory_reservation *) cpu_reservation
203 (cpu *processor);
204
205
206 /* Registers:
207
208 This model exploits the PowerPC's requirement for a synchronization
209 to occure after (or before) the update of any context controlling
210 register. All context sync points must call the sync function
211 below to when ever a synchronization point is reached */
212
213 INLINE_CPU\
214 (registers *) cpu_registers
215 (cpu *processor) CONST_ATTRIBUTE;
216
217 INLINE_CPU\
218 (void) cpu_synchronize_context
219 (cpu *processor,
220 unsigned_word cia);
221
222 #define IS_PROBLEM_STATE(PROCESSOR) \
223 (CURRENT_ENVIRONMENT == OPERATING_ENVIRONMENT \
224 ? (cpu_registers(PROCESSOR)->msr & msr_problem_state) \
225 : 1)
226
227 #define IS_64BIT_MODE(PROCESSOR) \
228 (WITH_TARGET_WORD_BITSIZE == 64 \
229 ? (CURRENT_ENVIRONMENT == OPERATING_ENVIRONMENT \
230 ? (cpu_registers(PROCESSOR)->msr & msr_64bit_mode) \
231 : 1) \
232 : 0)
233
234 #define IS_FP_AVAILABLE(PROCESSOR) \
235 (CURRENT_ENVIRONMENT == OPERATING_ENVIRONMENT \
236 ? (cpu_registers(PROCESSOR)->msr & msr_floating_point_available) \
237 : 1)
238
239
240
241 INLINE_CPU\
242 (void) cpu_print_info
243 (cpu *processor,
244 int verbose);
245
246 INLINE_CPU\
247 (model_data *) cpu_model
248 (cpu *processor) CONST_ATTRIBUTE;
249
250
251 #if (CPU_INLINE & INCLUDE_MODULE)
252 # include "cpu.c"
253 #endif
254
255 #endif