sim/ppc/std-config.h

   1 /*  This file is part of the program psim.
   2
   3     Copyright 1994, 1995, 2002 Andrew Cagney <cagney@highland.com.au>
   4
   5     This program is free software; you can redistribute it and/or modify
   6     it under the terms of the GNU General Public License as published by
   7     the Free Software Foundation; either version 3 of the License, or
   8     (at your option) any later version.
   9
  10     This program is distributed in the hope that it will be useful,
  11     but WITHOUT ANY WARRANTY; without even the implied warranty of
  12     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13     GNU General Public License for more details.
  14
  15     You should have received a copy of the GNU General Public License
  16     along with this program; if not, see <http://www.gnu.org/licenses/>.
  17
  18     */
  19
  20
  21 #ifndef _PSIM_CONFIG_H_
  22 #define _PSIM_CONFIG_H_
  23
  24
  25 /* endianness of the host/target:
  26
  27    If the build process is aware (at compile time) of the endianness
  28    of the host/target it is able to eliminate slower generic endian
  29    handling code.
  30
  31    Possible values are 0 (unknown), LITTLE_ENDIAN, BIG_ENDIAN */
  32
  33 #ifndef WITH_HOST_BYTE_ORDER
  34 #define WITH_HOST_BYTE_ORDER            0 /*unknown*/
  35 #endif
  36
  37 #ifndef WITH_TARGET_BYTE_ORDER
  38 #define WITH_TARGET_BYTE_ORDER          0 /*unknown*/
  39 #endif
  40
  41 extern int current_host_byte_order;
  42 #define CURRENT_HOST_BYTE_ORDER (WITH_HOST_BYTE_ORDER \
  43                                  ? WITH_HOST_BYTE_ORDER \
  44                                  : current_host_byte_order)
  45 extern int current_target_byte_order;
  46 #define CURRENT_TARGET_BYTE_ORDER (WITH_TARGET_BYTE_ORDER \
  47                                    ? WITH_TARGET_BYTE_ORDER \
  48                                    : current_target_byte_order)
  49
  50
  51 /* PowerPC XOR endian.
  52
  53    In addition to the above, the simulator can support the PowerPC's
  54    horrible XOR endian mode.  This feature makes it possible to
  55    control the endian mode of a processor using the MSR. */
  56
  57 #ifndef WITH_XOR_ENDIAN
  58 #define WITH_XOR_ENDIAN         8
  59 #endif
  60
  61
  62 /* SMP support:
  63
  64    Sets a limit on the number of processors that can be simulated.  If
  65    WITH_SMP is set to zero (0), the simulator is restricted to
  66    suporting only on processor (and as a consequence leaves the SMP
  67    code out of the build process).
  68
  69    The actual number of processors is taken from the device
  70    /options/smp@<nr-cpu> */
  71
  72 #ifndef WITH_SMP
  73 #define WITH_SMP                        5
  74 #endif
  75 #if WITH_SMP
  76 #define MAX_NR_PROCESSORS               WITH_SMP
  77 #else
  78 #define MAX_NR_PROCESSORS               1
  79 #endif
  80
  81
  82 /* Word size of host/target:
  83
  84    Set these according to your host and target requirements.  At this
  85    point in time, I've only compiled (not run) for a 64bit and never
  86    built for a 64bit host.  This will always remain a compile time
  87    option */
  88
  89 #ifndef WITH_TARGET_WORD_BITSIZE
  90 #define WITH_TARGET_WORD_BITSIZE        32 /* compiled only */
  91 #endif
  92
  93 #ifndef WITH_HOST_WORD_BITSIZE
  94 #define WITH_HOST_WORD_BITSIZE          32 /* 64bit ready? */
  95 #endif
  96
  97
  98 /* Program environment:
  99
 100    Three environments are available - UEA (user), VEA (virtual) and
 101    OEA (perating).  The former two are environment that users would
 102    expect to see (VEA includes things like coherency and the time
 103    base) while OEA is what an operating system expects to see.  By
 104    setting these to specific values, the build process is able to
 105    eliminate non relevent environment code
 106
 107    CURRENT_ENVIRONMENT specifies which of vea or oea is required for
 108    the current runtime. */
 109
 110 #define USER_ENVIRONMENT                1
 111 #define VIRTUAL_ENVIRONMENT             2
 112 #define OPERATING_ENVIRONMENT           3
 113
 114 #ifndef WITH_ENVIRONMENT
 115 #define WITH_ENVIRONMENT                0
 116 #endif
 117
 118 extern int current_environment;
 119 #define CURRENT_ENVIRONMENT (WITH_ENVIRONMENT \
 120                              ? WITH_ENVIRONMENT \
 121                              : current_environment)
 122
 123
 124 /* Optional VEA/OEA code:
 125
 126    The below, required for the OEA model may also be included in the
 127    VEA model however, as far as I can tell only make things
 128    slower... */
 129
 130
 131 /* Events.  Devices modeling real H/W need to be able to efficiently
 132    schedule things to do at known times in the future.  The event
 133    queue implements this.  Unfortunatly this adds the need to check
 134    for any events once each full instruction cycle. */
 135
 136 #define WITH_EVENTS                     (WITH_ENVIRONMENT != USER_ENVIRONMENT)
 137
 138
 139 /* Time base:
 140
 141    The PowerPC architecture includes the addition of both a time base
 142    register and a decrement timer.  Like events adds to the overhead
 143    of of some instruction cycles. */
 144
 145 #ifndef WITH_TIME_BASE
 146 #define WITH_TIME_BASE                  (WITH_ENVIRONMENT != USER_ENVIRONMENT)
 147 #endif
 148
 149
 150 /* Callback/Default Memory.
 151
 152    Core includes a builtin memory type (raw_memory) that is
 153    implemented using an array.  raw_memory does not require any
 154    additional functions etc.
 155
 156    Callback memory is where the core calls a core device for the data
 157    it requires.
 158
 159    Default memory is an extenstion of this where for addresses that do
 160    not map into either a callback or core memory range a default map
 161    can be used.
 162
 163    The OEA model uses callback memory for devices and default memory
 164    for buses.
 165
 166    The VEA model uses callback memory to capture `page faults'.
 167
 168    While it may be possible to eliminate callback/default memory (and
 169    hence also eliminate an additional test per memory fetch) it
 170    probably is not worth the effort.
 171
 172    BTW, while raw_memory could have been implemented as a callback,
 173    profiling has shown that there is a biger win (at least for the
 174    x86) in eliminating a function call for the most common
 175    (raw_memory) case. */
 176
 177 #define WITH_CALLBACK_MEMORY            1
 178
 179
 180 /* Alignment:
 181
 182    The PowerPC may or may not handle miss aligned transfers.  An
 183    implementation normally handles miss aligned transfers in big
 184    endian mode but generates an exception in little endian mode.
 185
 186    This model.  Instead allows both little and big endian modes to
 187    either take exceptions or handle miss aligned transfers.
 188
 189    If 0 is specified then for big-endian mode miss alligned accesses
 190    are permitted (NONSTRICT_ALIGNMENT) while in little-endian mode the
 191    processor will fault on them (STRICT_ALIGNMENT). */
 192
 193 #define NONSTRICT_ALIGNMENT             1
 194 #define STRICT_ALIGNMENT                2
 195
 196 #ifndef WITH_ALIGNMENT
 197 #define WITH_ALIGNMENT                  0
 198 #endif
 199
 200 extern int current_alignment;
 201 #define CURRENT_ALIGNMENT (WITH_ALIGNMENT \
 202                            ? WITH_ALIGNMENT \
 203                            : current_alignment)
 204
 205
 206 /* Floating point suport:
 207
 208    Still under development. */
 209
 210 #define SOFT_FLOATING_POINT             1
 211 #define HARD_FLOATING_POINT             2
 212
 213 #ifndef WITH_FLOATING_POINT
 214 #define WITH_FLOATING_POINT             HARD_FLOATING_POINT
 215 #endif
 216 extern int current_floating_point;
 217 #define CURRENT_FLOATING_POINT (WITH_FLOATING_POINT \
 218                                 ? WITH_FLOATING_POINT \
 219                                 : current_floating_point)
 220
 221
 222 /* Debugging:
 223
 224    Control the inclusion of debugging code. */
 225
 226 /* Include the tracing code.  Disabling this eliminates all tracing
 227    code */
 228
 229 #ifndef WITH_TRACE
 230 #define WITH_TRACE                      1
 231 #endif
 232
 233 /* include code that checks assertions scattered through out the
 234    program */
 235
 236 #ifndef WITH_ASSERT
 237 #define WITH_ASSERT                     1
 238 #endif
 239
 240 /* Whether to check instructions for reserved bits being set */
 241
 242 #ifndef WITH_RESERVED_BITS
 243 #define WITH_RESERVED_BITS              1
 244 #endif
 245
 246 /* include monitoring code */
 247
 248 #define MONITOR_INSTRUCTION_ISSUE       1
 249 #define MONITOR_LOAD_STORE_UNIT         2
 250 #ifndef WITH_MON
 251 #define WITH_MON                        (MONITOR_LOAD_STORE_UNIT \
 252                                          | MONITOR_INSTRUCTION_ISSUE)
 253 #endif
 254
 255 /* Current CPU model (models are in the generated models.h include file)  */
 256 #ifndef WITH_MODEL
 257 #define WITH_MODEL                      0
 258 #endif
 259
 260 #define CURRENT_MODEL (WITH_MODEL       \
 261                        ? WITH_MODEL     \
 262                        : current_model)
 263
 264 #ifndef WITH_DEFAULT_MODEL
 265 #define WITH_DEFAULT_MODEL              DEFAULT_MODEL
 266 #endif
 267
 268 #define MODEL_ISSUE_IGNORE              (-1)
 269 #define MODEL_ISSUE_PROCESS             1
 270
 271 #ifndef WITH_MODEL_ISSUE
 272 #define WITH_MODEL_ISSUE                0
 273 #endif
 274
 275 extern int current_model_issue;
 276 #define CURRENT_MODEL_ISSUE (WITH_MODEL_ISSUE   \
 277                              ? WITH_MODEL_ISSUE \
 278                              : current_model_issue)
 279
 280 /* Whether or not input/output just uses stdio, or uses printf_filtered for
 281    output, and polling input for input.  */
 282
 283 #define DONT_USE_STDIO                  2
 284 #define DO_USE_STDIO                    1
 285
 286 #ifndef WITH_STDIO
 287 #define WITH_STDIO                      0
 288 #endif
 289
 290 extern int current_stdio;
 291 #define CURRENT_STDIO (WITH_STDIO       \
 292                        ? WITH_STDIO     \
 293                        : current_stdio)
 294
 295
 296
 297 /* INLINE CODE SELECTION:
 298
 299    GCC -O3 attempts to inline any function or procedure in scope.  The
 300    options below facilitate fine grained control over what is and what
 301    isn't made inline.  For instance it can control things down to a
 302    specific modules static routines.  Doing this allows the compiler
 303    to both eliminate the overhead of function calls and (as a
 304    consequence) also eliminate further dead code.
 305
 306    On a CISC (x86) I've found that I can achieve an order of magnitude
 307    speed improvement (x3-x5).  In the case of RISC (sparc) while the
 308    performance gain isn't as great it is still significant.
 309
 310    Each module is controled by the macro <module>_INLINE which can
 311    have the values described below
 312
 313        0  Do not inline any thing for the given module
 314
 315    The following additional values are `bit fields' and can be
 316    combined.
 317
 318       REVEAL_MODULE:
 319
 320          Include the C file for the module into the file being compiled
 321          but do not make the functions within the module inline.
 322
 323          While of no apparent benefit, this makes it possible for the
 324          included module, when compiled to inline its calls to what
 325          would otherwize be external functions.
 326
 327       INLINE_MODULE:
 328
 329          Make external functions within the module `inline'.  Thus if
 330          the module is included into a file being compiled, calls to
 331          its funtions can be eliminated. 2 implies 1.
 332
 333       PSIM_INLINE_LOCALS:
 334
 335          Make internal (static) functions within the module `inline'.
 336
 337    The following abreviations are available:
 338
 339       INCLUDE_MODULE == (REVEAL_MODULE | INLINE_MODULE)
 340
 341       ALL_INLINE == (REVEAL_MODULE | INLINE_MODULE | PSIM_INLINE_LOCALS)
 342
 343    In addition to this, modules have been put into two categories.
 344
 345          Simple modules - eg sim-endian.h bits.h
 346
 347          Because these modules are small and simple and do not have
 348          any complex interpendencies they are configured, if
 349          <module>_INLINE is so enabled, to inline themselves in all
 350          modules that include those files.
 351
 352          For the default build, this is a real win as all byte
 353          conversion and bit manipulation functions are inlined.
 354
 355          Complex modules - the rest
 356
 357          These are all handled using the files inline.h and inline.c.
 358          psim.c includes the above which in turn include any remaining
 359          code.
 360
 361    IMPLEMENTATION:
 362
 363    The inline ability is enabled by prefixing every data / function
 364    declaration and definition with one of the following:
 365
 366
 367        INLINE_<module>
 368
 369        Prefix to any global function that is a candidate for being
 370        inline.
 371
 372        values - `', `static', `static INLINE'
 373
 374
 375        EXTERN_<module>
 376
 377        Prefix to any global data structures for the module.  Global
 378        functions that are not to be inlined shall also be prefixed
 379        with this.
 380
 381        values - `', `static', `static'
 382
 383
 384        STATIC_INLINE_<module>
 385
 386        Prefix to any local (static) function that is a candidate for
 387        being made inline.
 388
 389        values - `static', `static INLINE'
 390
 391
 392        static
 393
 394        Prefix all local data structures.  Local functions that are not
 395        to be inlined shall also be prefixed with this.
 396
 397        values - `static', `static'
 398
 399        nb: will not work for modules that are being inlined for every
 400        use (white lie).
 401
 402
 403        extern
 404        #ifndef _INLINE_C_
 405        #endif
 406
 407        Prefix to any declaration of a global object (function or
 408        variable) that should not be inlined and should have only one
 409        definition.  The #ifndef wrapper goes around the definition
 410        propper to ensure that only one copy is generated.
 411
 412        nb: this will not work when a module is being inlined for every
 413        use.
 414
 415
 416        STATIC_<module>
 417
 418        Replaced by either `static' or `EXTERN_MODULE'.
 419
 420
 421    REALITY CHECK:
 422
 423    This is not for the faint hearted.  I've seen GCC get up to 500mb
 424    trying to compile what this can create.
 425
 426    Some of the modules do not yet implement the WITH_INLINE_STATIC
 427    option.  Instead they use the macro STATIC_INLINE to control their
 428    local function.
 429
 430    Because of the way that GCC parses __attribute__(), the macro's
 431    need to be adjacent to the function name rather than at the start
 432    of the line vis:
 433
 434         int STATIC_INLINE_MODULE f(void);
 435         void INLINE_MODULE *g(void);
 436
 437    */
 438
 439 #define REVEAL_MODULE                   1
 440 #define INLINE_MODULE                   2
 441 #define INCLUDE_MODULE                  (INLINE_MODULE | REVEAL_MODULE)
 442 #define PSIM_INLINE_LOCALS                      4
 443 #define ALL_INLINE                      7
 444
 445 /* Your compilers inline reserved word */
 446
 447 #ifndef INLINE
 448 #if defined(__GNUC__) && defined(__OPTIMIZE__)
 449 #define INLINE __inline__
 450 #else
 451 #define INLINE /*inline*/
 452 #endif
 453 #endif
 454
 455
 456 /* Default prefix for static functions */
 457
 458 #ifndef STATIC_INLINE
 459 #define STATIC_INLINE static INLINE
 460 #endif
 461
 462 /* Default macro to simplify control several of key the inlines */
 463
 464 #ifndef DEFAULT_INLINE
 465 #define DEFAULT_INLINE                  PSIM_INLINE_LOCALS
 466 #endif
 467
 468 /* Code that converts between hosts and target byte order.  Used on
 469    every memory access (instruction and data).  See sim-endian.h for
 470    additional byte swapping configuration information.  This module
 471    can inline for all callers */
 472
 473 #ifndef SIM_ENDIAN_INLINE
 474 #define SIM_ENDIAN_INLINE               (DEFAULT_INLINE ? ALL_INLINE : 0)
 475 #endif
 476
 477 /* Low level bit manipulation routines. This module can inline for all
 478    callers */
 479
 480 #ifndef BITS_INLINE
 481 #define BITS_INLINE                     (DEFAULT_INLINE ? ALL_INLINE : 0)
 482 #endif
 483
 484 /* Code that gives access to various CPU internals such as registers.
 485    Used every time an instruction is executed */
 486
 487 #ifndef CPU_INLINE
 488 #define CPU_INLINE                      (DEFAULT_INLINE ? ALL_INLINE : 0)
 489 #endif
 490
 491 /* Code that translates between an effective and real address.  Used
 492    by every load or store. */
 493
 494 #ifndef VM_INLINE
 495 #define VM_INLINE                       DEFAULT_INLINE
 496 #endif
 497
 498 /* Code that loads/stores data to/from the memory data structure.
 499    Used by every load or store */
 500
 501 #ifndef CORE_INLINE
 502 #define CORE_INLINE                     DEFAULT_INLINE
 503 #endif
 504
 505 /* Code to check for and process any events scheduled in the future.
 506    Called once per instruction cycle */
 507
 508 #ifndef EVENTS_INLINE
 509 #define EVENTS_INLINE                   (DEFAULT_INLINE ? ALL_INLINE : 0)
 510 #endif
 511
 512 /* Code monotoring the processors performance.  It counts events on
 513    every instruction cycle */
 514
 515 #ifndef MON_INLINE
 516 #define MON_INLINE                      (DEFAULT_INLINE ? ALL_INLINE : 0)
 517 #endif
 518
 519 /* Code called on the rare occasions that an interrupt occures. */
 520
 521 #ifndef INTERRUPTS_INLINE
 522 #define INTERRUPTS_INLINE               DEFAULT_INLINE
 523 #endif
 524
 525 /* Code called on the rare occasion that either gdb or the device tree
 526    need to manipulate a register within a processor */
 527
 528 #ifndef REGISTERS_INLINE
 529 #define REGISTERS_INLINE                DEFAULT_INLINE
 530 #endif
 531
 532 /* Code called on the rare occasion that a processor is manipulating
 533    real hardware instead of RAM.
 534
 535    Also, most of the functions in devices.c are always called through
 536    a jump table. */
 537
 538 #ifndef DEVICE_INLINE
 539 #define DEVICE_INLINE                   (DEFAULT_INLINE ? PSIM_INLINE_LOCALS : 0)
 540 #endif
 541
 542 /* Code called used while the device tree is being built.
 543
 544    Inlining this is of no benefit */
 545
 546 #ifndef TREE_INLINE
 547 #define TREE_INLINE                     (DEFAULT_INLINE ? PSIM_INLINE_LOCALS : 0)
 548 #endif
 549
 550 /* Code called whenever information on a Special Purpose Register is
 551    required.  Called by the mflr/mtlr pseudo instructions */
 552
 553 #ifndef SPREG_INLINE
 554 #define SPREG_INLINE                    DEFAULT_INLINE
 555 #endif
 556
 557 /* Functions modeling the semantics of each instruction.  Two cases to
 558    consider, firstly of idecode is implemented with a switch then this
 559    allows the idecode function to inline each semantic function
 560    (avoiding a call).  The second case is when idecode is using a
 561    table, even then while the semantic functions can't be inlined,
 562    setting it to one still enables each semantic function to inline
 563    anything they call (if that code is marked for being inlined).
 564
 565    WARNING: you need lots (like 200mb of swap) of swap.  Setting this
 566    to 1 is useful when using a table as it enables the sematic code to
 567    inline all of their called functions */
 568
 569 #ifndef SEMANTICS_INLINE
 570 #define SEMANTICS_INLINE                (DEFAULT_INLINE & ~INLINE_MODULE)
 571 #endif
 572
 573 /* When using the instruction cache, code to decode an instruction and
 574    install it into the cache.  Normally called when ever there is a
 575    miss in the instruction cache. */
 576
 577 #ifndef ICACHE_INLINE
 578 #define ICACHE_INLINE                   (DEFAULT_INLINE & ~INLINE_MODULE)
 579 #endif
 580
 581 /* General functions called by semantics functions but part of the
 582    instruction table.  Although called by the semantic functions the
 583    frequency of calls is low.  Consequently the need to inline this
 584    code is reduced. */
 585
 586 #ifndef SUPPORT_INLINE
 587 #define SUPPORT_INLINE                  PSIM_INLINE_LOCALS
 588 #endif
 589
 590 /* Model specific code used in simulating functional units.  Note, it actaully
 591    pays NOT to inline the PowerPC model functions (at least on the x86).  This
 592    is because if it is inlined, each PowerPC instruction gets a separate copy
 593    of the code, which is not friendly to the cache.  */
 594
 595 #ifndef MODEL_INLINE
 596 #define MODEL_INLINE                    (DEFAULT_INLINE & ~INLINE_MODULE)
 597 #endif
 598
 599 /* Code to print out what options we were compiled with.  Because this
 600    is called at process startup, it doesn't have to be inlined, but
 601    if it isn't brought in and the model routines are inline, the model
 602    routines will be pulled in twice.  */
 603
 604 #ifndef OPTIONS_INLINE
 605 #define OPTIONS_INLINE                  MODEL_INLINE
 606 #endif
 607
 608 /* idecode acts as the hub of the system, everything else is imported
 609    into this file */
 610
 611 #ifndef IDECOCE_INLINE
 612 #define IDECODE_INLINE                  PSIM_INLINE_LOCALS
 613 #endif
 614
 615 /* psim, isn't actually inlined */
 616
 617 #ifndef PSIM_INLINE
 618 #define PSIM_INLINE                     PSIM_INLINE_LOCALS
 619 #endif
 620
 621 /* Code to emulate os or rom compatibility.  This code is called via a
 622    table and hence there is little benefit in making it inline */
 623
 624 #ifndef OS_EMUL_INLINE
 625 #define OS_EMUL_INLINE                  0
 626 #endif
 627
 628 #endif /* _PSIM_CONFIG_H */