Don't schedule tickEvent if it's already been scheduled.
[gem5.git] / sim / system.hh
1 /*
2 * Copyright (c) 2003 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #ifndef __SYSTEM_HH__
30 #define __SYSTEM_HH__
31
32 #include <string>
33 #include <vector>
34
35 #include "sim/sim_object.hh"
36 #include "cpu/pc_event.hh"
37 #include "base/loader/symtab.hh"
38
39 class MemoryController;
40 class PhysicalMemory;
41 class RemoteGDB;
42 class GDBListener;
43
44 class ExecContext;
45
46 class System : public SimObject
47 {
48 public:
49 const uint64_t init_param;
50 MemoryController *memCtrl;
51 PhysicalMemory *physmem;
52
53 PCEventQueue pcEventQueue;
54
55 std::vector<ExecContext *> execContexts;
56
57 virtual int registerExecContext(ExecContext *xc);
58 virtual void replaceExecContext(int xcIndex, ExecContext *xc);
59
60 public:
61 System(const std::string _name, const uint64_t _init_param,
62 MemoryController *, PhysicalMemory *);
63 ~System();
64
65 virtual Addr getKernelStart() const = 0;
66 virtual Addr getKernelEnd() const = 0;
67 virtual Addr getKernelEntry() const = 0;
68 virtual bool breakpoint() = 0;
69
70
71 public:
72 ////////////////////////////////////////////
73 //
74 // STATIC GLOBAL SYSTEM LIST
75 //
76 ////////////////////////////////////////////
77
78 static std::vector<System *> systemList;
79 static int numSystemsRunning;
80
81 static void printSystems();
82 };
83
84 #endif // __SYSTEM_HH__