sim/testsuite/aarch64/uzp.s

   1 # mach: aarch64
   2
   3 # Check the unzip instructions: uzp1, uzp2.
   4
   5 .include "testutils.inc"
   6
   7         .data
   8         .align 4
   9 input1:
  10         .word 0x04030201
  11         .word 0x08070605
  12         .word 0x0c0b0a09
  13         .word 0x100f0e0d
  14 input2:
  15         .word 0x14131211
  16         .word 0x18171615
  17         .word 0x1c1b1a19
  18         .word 0x201f1e1d
  19 zl8b:
  20         .word 0x07050301
  21         .word 0x17151311
  22 zu8b:
  23         .word 0x08060402
  24         .word 0x18161412
  25 zl16b:
  26         .word 0x07050301
  27         .word 0x0f0d0b09
  28         .word 0x17151311
  29         .word 0x1f1d1b19
  30 zu16b:
  31         .word 0x08060402
  32         .word 0x100e0c0a
  33         .word 0x18161412
  34         .word 0x201e1c1a
  35 zl4h:
  36         .word 0x06050201
  37         .word 0x16151211
  38 zu4h:
  39         .word 0x08070403
  40         .word 0x18171413
  41 zl8h:
  42         .word 0x06050201
  43         .word 0x0e0d0a09
  44         .word 0x16151211
  45         .word 0x1e1d1a19
  46 zu8h:
  47         .word 0x08070403
  48         .word 0x100f0c0b
  49         .word 0x18171413
  50         .word 0x201f1c1b
  51 zl2s:
  52         .word 0x04030201
  53         .word 0x14131211
  54 zu2s:
  55         .word 0x08070605
  56         .word 0x18171615
  57 zl4s:
  58         .word 0x04030201
  59         .word 0x0c0b0a09
  60         .word 0x14131211
  61         .word 0x1c1b1a19
  62 zu4s:
  63         .word 0x08070605
  64         .word 0x100f0e0d
  65         .word 0x18171615
  66         .word 0x201f1e1d
  67 zl2d:
  68         .word 0x04030201
  69         .word 0x08070605
  70         .word 0x14131211
  71         .word 0x18171615
  72 zu2d:
  73         .word 0x0c0b0a09
  74         .word 0x100f0e0d
  75         .word 0x1c1b1a19
  76         .word 0x201f1e1d
  77
  78         start
  79         adrp x0, input1
  80         ldr q0, [x0, #:lo12:input1]
  81         adrp x0, input2
  82         ldr q1, [x0, #:lo12:input2]
  83
  84         uzp1 v2.8b, v0.8b, v1.8b
  85         mov x1, v2.d[0]
  86         adrp x3, zl8b
  87         ldr x4, [x3, #:lo12:zl8b]
  88         cmp x1, x4
  89         bne .Lfailure
  90
  91         uzp2 v2.8b, v0.8b, v1.8b
  92         mov x1, v2.d[0]
  93         adrp x3, zu8b
  94         ldr x4, [x3, #:lo12:zu8b]
  95         cmp x1, x4
  96         bne .Lfailure
  97
  98         uzp1 v2.16b, v0.16b, v1.16b
  99         mov x1, v2.d[0]
 100         mov x2, v2.d[1]
 101         adrp x3, zl16b
 102         ldr x4, [x3, #:lo12:zl16b]
 103         cmp x1, x4
 104         bne .Lfailure
 105         ldr x5, [x3, #:lo12:zl16b+8]
 106         cmp x2, x5
 107         bne .Lfailure
 108
 109         uzp2 v2.16b, v0.16b, v1.16b
 110         mov x1, v2.d[0]
 111         mov x2, v2.d[1]
 112         adrp x3, zu16b
 113         ldr x4, [x3, #:lo12:zu16b]
 114         cmp x1, x4
 115         bne .Lfailure
 116         ldr x5, [x3, #:lo12:zu16b+8]
 117         cmp x2, x5
 118         bne .Lfailure
 119
 120         uzp1 v2.4h, v0.4h, v1.4h
 121         mov x1, v2.d[0]
 122         adrp x3, zl4h
 123         ldr x4, [x3, #:lo12:zl4h]
 124         cmp x1, x4
 125         bne .Lfailure
 126
 127         uzp2 v2.4h, v0.4h, v1.4h
 128         mov x1, v2.d[0]
 129         adrp x3, zu4h
 130         ldr x4, [x3, #:lo12:zu4h]
 131         cmp x1, x4
 132         bne .Lfailure
 133
 134         uzp1 v2.8h, v0.8h, v1.8h
 135         mov x1, v2.d[0]
 136         mov x2, v2.d[1]
 137         adrp x3, zl8h
 138         ldr x4, [x3, #:lo12:zl8h]
 139         cmp x1, x4
 140         bne .Lfailure
 141         ldr x5, [x3, #:lo12:zl8h+8]
 142         cmp x2, x5
 143         bne .Lfailure
 144
 145         uzp2 v2.8h, v0.8h, v1.8h
 146         mov x1, v2.d[0]
 147         mov x2, v2.d[1]
 148         adrp x3, zu8h
 149         ldr x4, [x3, #:lo12:zu8h]
 150         cmp x1, x4
 151         bne .Lfailure
 152         ldr x5, [x3, #:lo12:zu8h+8]
 153         cmp x2, x5
 154         bne .Lfailure
 155
 156         uzp1 v2.2s, v0.2s, v1.2s
 157         mov x1, v2.d[0]
 158         adrp x3, zl2s
 159         ldr x4, [x3, #:lo12:zl2s]
 160         cmp x1, x4
 161         bne .Lfailure
 162
 163         uzp2 v2.2s, v0.2s, v1.2s
 164         mov x1, v2.d[0]
 165         adrp x3, zu2s
 166         ldr x4, [x3, #:lo12:zu2s]
 167         cmp x1, x4
 168         bne .Lfailure
 169
 170         uzp1 v2.4s, v0.4s, v1.4s
 171         mov x1, v2.d[0]
 172         mov x2, v2.d[1]
 173         adrp x3, zl4s
 174         ldr x4, [x3, #:lo12:zl4s]
 175         cmp x1, x4
 176         bne .Lfailure
 177         ldr x5, [x3, #:lo12:zl4s+8]
 178         cmp x2, x5
 179         bne .Lfailure
 180
 181         uzp2 v2.4s, v0.4s, v1.4s
 182         mov x1, v2.d[0]
 183         mov x2, v2.d[1]
 184         adrp x3, zu4s
 185         ldr x4, [x3, #:lo12:zu4s]
 186         cmp x1, x4
 187         bne .Lfailure
 188         ldr x5, [x3, #:lo12:zu4s+8]
 189         cmp x2, x5
 190         bne .Lfailure
 191
 192         uzp1 v2.2d, v0.2d, v1.2d
 193         mov x1, v2.d[0]
 194         mov x2, v2.d[1]
 195         adrp x3, zl2d
 196         ldr x4, [x3, #:lo12:zl2d]
 197         cmp x1, x4
 198         bne .Lfailure
 199         ldr x5, [x3, #:lo12:zl2d+8]
 200         cmp x2, x5
 201         bne .Lfailure
 202
 203         uzp2 v2.2d, v0.2d, v1.2d
 204         mov x1, v2.d[0]
 205         mov x2, v2.d[1]
 206         adrp x3, zu2d
 207         ldr x4, [x3, #:lo12:zu2d]
 208         cmp x1, x4
 209         bne .Lfailure
 210         ldr x5, [x3, #:lo12:zu2d+8]
 211         cmp x2, x5
 212         bne .Lfailure
 213
 214         pass
 215 .Lfailure:
 216         fail