sim/testsuite/h8300/testutils.inc

   1 # Support macros for the Hitachi H8 assembly test cases.
   2
   3 ; Set up a minimal machine state
   4         .macro start
   5         .equ    h8300,  0
   6         .equ    h8300h, 1
   7         .equ    h8300s, 2
   8         .equ    h8sx,   3
   9         .if (sim_cpu == h8300s)
  10         .h8300s
  11         .else
  12         .if (sim_cpu == h8300h)
  13         .h8300h
  14         .else
  15         .if (sim_cpu == h8sx)
  16         .h8300sx
  17         .endif
  18         .endif
  19         .endif
  20
  21         .text
  22         .align 2
  23         .global _start
  24 _start:
  25         jmp     _main
  26
  27         .data
  28         .align 2
  29         .global pass_str
  30         .global fail_str
  31         .global ok_str
  32         .global pass_loc
  33         .global fail_loc
  34         .global ok_loc
  35 pass_str:
  36         .ascii "pass\n"
  37 fail_str:
  38         .ascii "fail\n"
  39 ok_str:
  40         .ascii "ok\n"
  41 pass_loc16:
  42         .word pass_str
  43 pass_loc32:
  44         .long pass_str
  45 fail_loc16:
  46         .word fail_str
  47 fail_loc32:
  48         .long fail_str
  49 ok_loc16:
  50         .word ok_str
  51 ok_loc32:
  52         .long ok_str
  53         .text
  54
  55         .global _write_and_exit
  56 _write_and_exit:
  57 ;ssize_t write(int fd, const void *buf, size_t count);
  58 ;Integer arguments have to be zero extended.
  59 .if (sim_cpu)
  60 #if __INT_MAX__ == 32767
  61         extu.l  er0
  62 #endif
  63 .endif
  64         jsr     @@0xc7
  65         mov     #0, r0
  66         jmp     _exit
  67
  68         .global _exit
  69 _exit:
  70         mov.b   r0l, r0h
  71         mov.w   #0xdead, r1
  72         mov.w   #0xbeef, r2
  73         sleep
  74
  75         .global _main
  76 _main:
  77         .endm
  78
  79
  80 ; Exit with an exit code
  81         .macro exit code
  82         mov.w   #\code, r0
  83         jmp     _exit
  84         .endm
  85
  86 ; Output "pass\n"
  87         .macro pass
  88         mov.w   #0, r0          ; fd == stdout
  89 .if (sim_cpu == h8300)
  90         mov.w   #pass_str, r1   ; buf == "pass\n"
  91         mov.w   #5, r2          ; len == 5
  92 .else
  93         mov.l   #pass_str, er1  ; buf == "pass\n"
  94         mov.l   #5, er2         ; len == 5
  95 .endif
  96         jmp     _write_and_exit
  97         .endm
  98
  99 ; Output "fail\n"
 100         .macro fail
 101         mov.w   #0, r0          ; fd == stdout
 102 .if (sim_cpu == h8300)
 103         mov.w   #fail_str, r1   ; buf == "fail\n"
 104         mov.w   #5, r2          ; len == 5
 105 .else
 106         mov.l   #fail_str, er1  ; buf == "fail\n"
 107         mov.l   #5, er2         ; len == 5
 108 .endif
 109         jmp     _write_and_exit
 110         .endm
 111
 112
 113 ; Load an 8-bit immediate value into a general register
 114 ; (reg must be r0l - r7l or r0h - r7h)
 115         .macro mvi_h_gr8 val reg
 116         mov.b   #\val, \reg
 117         .endm
 118
 119 ; Load a 16-bit immediate value into a general register
 120 ; (reg must be r0 - r7)
 121         .macro mvi_h_gr16 val reg
 122         mov.w   #\val, \reg
 123         .endm
 124
 125 ; Load a 32-bit immediate value into a general register
 126 ; (reg must be er0 - er7)
 127         .macro mvi_h_gr32 val reg
 128         mov.l   #\val, \reg
 129         .endm
 130
 131 ; Test the value of an 8-bit immediate against a general register
 132 ; (reg must be r0l - r7l or r0h - r7h)
 133         .macro test_h_gr8 val reg
 134         cmp.b   #\val, \reg
 135         beq     .Ltest_gr8\@
 136         fail
 137 .Ltest_gr8\@:
 138         .endm
 139
 140 ; Test the value of a 16-bit immediate against a general register
 141 ; (reg must be r0 - r7)
 142         .macro test_h_gr16 val reg h=h l=l
 143         .if (sim_cpu == h8300)
 144         test_h_gr8 (\val >> 8) \reg\h
 145         test_h_gr8 (\val & 0xff) \reg\l
 146         .else
 147         cmp.w   #\val, \reg
 148         beq     .Ltest_gr16\@
 149         fail
 150 .Ltest_gr16\@:
 151         .endif
 152         .endm
 153
 154 ; Test the value of a 32-bit immediate against a general register
 155 ; (reg must be er0 - er7)
 156         .macro test_h_gr32 val reg
 157         cmp.l   #\val, \reg
 158         beq     .Ltest_gr32\@
 159         fail
 160 .Ltest_gr32\@:
 161         .endm
 162
 163 ; Set a general register to the fixed pattern 'a5a5a5a5'
 164         .macro set_gr_a5a5 reg
 165         .if (sim_cpu == 0)
 166         ; h8300
 167         mov.w   #0xa5a5, r\reg
 168         .else
 169         mov.l   #0xa5a5a5a5, er\reg
 170         .endif
 171         .endm
 172
 173 ; Set all general registers to the fixed pattern 'a5a5a5a5'
 174         .macro set_grs_a5a5
 175         .if (sim_cpu == 0)
 176         ; h8300
 177         mov.w   #0xa5a5, r0
 178         mov.w   #0xa5a5, r1
 179         mov.w   #0xa5a5, r2
 180         mov.w   #0xa5a5, r3
 181         mov.w   #0xa5a5, r4
 182         mov.w   #0xa5a5, r5
 183         mov.w   #0xa5a5, r6
 184         mov.w   #0xa5a5, r7
 185         .else
 186         mov.l   #0xa5a5a5a5, er0
 187         mov.l   #0xa5a5a5a5, er1
 188         mov.l   #0xa5a5a5a5, er2
 189         mov.l   #0xa5a5a5a5, er3
 190         mov.l   #0xa5a5a5a5, er4
 191         mov.l   #0xa5a5a5a5, er5
 192         mov.l   #0xa5a5a5a5, er6
 193         mov.l   #0xa5a5a5a5, er7
 194         .endif
 195         .endm
 196
 197 ; Test that a general register contains the fixed pattern 'a5a5a5a5'
 198         .macro test_gr_a5a5 reg
 199         .if (sim_cpu == 0)
 200         ; h8300
 201         test_h_gr16 0xa5a5 r\reg
 202         .else
 203         test_h_gr32 0xa5a5a5a5 er\reg
 204         .endif
 205         .endm
 206
 207 ; Test that all general regs contain the fixed pattern 'a5a5a5a5'
 208         .macro test_grs_a5a5
 209         test_gr_a5a5 0
 210         test_gr_a5a5 1
 211         test_gr_a5a5 2
 212         test_gr_a5a5 3
 213         test_gr_a5a5 4
 214         test_gr_a5a5 5
 215         test_gr_a5a5 6
 216         test_gr_a5a5 7
 217         .endm
 218
 219 ; Set condition code register to an explicit value
 220         .macro set_ccr val
 221         ldc     #\val, ccr
 222         .endm
 223
 224 ; Set all condition code flags to zero
 225         .macro set_ccr_zero
 226         ldc     #0, ccr
 227         .endm
 228
 229 ; Set carry flag true
 230         .macro set_carry_flag
 231         orc     #1, ccr
 232         .endm
 233
 234 ; Clear carry flag
 235         .macro clear_carry_flag
 236         andc    0xfe, ccr
 237         .endm
 238
 239 ; Set zero flag true
 240         .macro set_zero_flag
 241         orc     #4, ccr
 242         .endm
 243
 244 ; Clear zero flag
 245         .macro clear_zero_flag
 246         andc    0xfb, ccr
 247         .endm
 248
 249 ; Set neg flag true
 250         .macro set_neg_flag
 251         orc     #8, ccr
 252         .endm
 253
 254 ; Clear neg flag
 255         .macro clear_neg_flag
 256         andc    0xf7, ccr
 257         .endm
 258
 259 ; Test that carry flag is clear
 260         .macro test_carry_clear
 261         bcc     .Lcc\@
 262         fail    ; carry flag not clear
 263 .Lcc\@:
 264         .endm
 265
 266 ; Test that carry flag is set
 267         .macro test_carry_set
 268         bcs     .Lcs\@
 269         fail    ; carry flag not clear
 270 .Lcs\@:
 271         .endm
 272
 273 ; Test that overflow flag is clear
 274         .macro test_ovf_clear
 275         bvc     .Lvc\@
 276         fail    ; overflow flag not clear
 277 .Lvc\@:
 278         .endm
 279
 280 ; Test that overflow flag is set
 281         .macro test_ovf_set
 282         bvs     .Lvs\@
 283         fail    ; overflow flag not clear
 284 .Lvs\@:
 285         .endm
 286
 287 ; Test that zero flag is clear
 288         .macro test_zero_clear
 289         bne     .Lne\@
 290         fail    ; zero flag not clear
 291 .Lne\@:
 292         .endm
 293
 294 ; Test that zero flag is set
 295         .macro test_zero_set
 296         beq     .Leq\@
 297         fail    ; zero flag not clear
 298 .Leq\@:
 299         .endm
 300
 301 ; Test that neg flag is clear
 302         .macro test_neg_clear
 303         bpl     .Lneg\@
 304         fail    ; negative flag not clear
 305 .Lneg\@:
 306         .endm
 307
 308 ; Test that neg flag is set
 309         .macro test_neg_set
 310         bmi     .Lneg\@
 311         fail    ; negative flag not clear
 312 .Lneg\@:
 313         .endm
 314
 315 ; Test ccr against an explicit value
 316         .macro test_ccr val
 317         .data
 318 tccr\@: .byte   0
 319         .text
 320         mov.b   r0l, @tccr\@
 321         stc     ccr, r0l
 322         cmp.b   #\val, r0l
 323         bne .Ltcc\@
 324         fail
 325 .Ltcc\@:
 326         mov.b   @tccr\@, r0l
 327         .endm
 328
 329 ; Test that all (accessable) condition codes are clear
 330         .macro test_cc_clear
 331         test_carry_clear
 332         test_ovf_clear
 333         test_zero_clear
 334         test_neg_clear
 335                 ; leaves H, I, U, and UI untested
 336         .endm
 337
 338 ; Compare memory, fail if not equal (h8sx only, len > 0).
 339         .macro memcmp src dst len
 340         mov.l   #\src, er5
 341         mov.l   #\dst, er6
 342         mov.l   #\len, er4
 343 .Lmemcmp_\@:
 344         cmp.b   @er5+, @er6+
 345         beq     .Lmemcmp2_\@
 346         fail
 347 .Lmemcmp2_\@:
 348         dec.l   #1, er4
 349         bne     .Lmemcmp_\@
 350         .endm
 351